DMAREQ Bit FieldsDevices > EFR32MG13P932F512GM48 > Bit Fields > DMAREQ

Macros

#define DMAREQ_ADC0_SCAN   ((8 << 16) + 1)
 
#define DMAREQ_ADC0_SINGLE   ((8 << 16) + 0)
 
#define DMAREQ_CRYPTO0_DATA0RD   ((49 << 16) + 2)
 
#define DMAREQ_CRYPTO0_DATA0WR   ((49 << 16) + 0)
 
#define DMAREQ_CRYPTO0_DATA0XWR   ((49 << 16) + 1)
 
#define DMAREQ_CRYPTO0_DATA1RD   ((49 << 16) + 4)
 
#define DMAREQ_CRYPTO0_DATA1WR   ((49 << 16) + 3)
 
#define DMAREQ_CRYPTO1_DATA0RD   ((52 << 16) + 2)
 
#define DMAREQ_CRYPTO1_DATA0WR   ((52 << 16) + 0)
 
#define DMAREQ_CRYPTO1_DATA0XWR   ((52 << 16) + 1)
 
#define DMAREQ_CRYPTO1_DATA1RD   ((52 << 16) + 4)
 
#define DMAREQ_CRYPTO1_DATA1WR   ((52 << 16) + 3)
 
#define DMAREQ_CRYPTO_DATA0RD   DMAREQ_CRYPTO0_DATA0RD
 
#define DMAREQ_CRYPTO_DATA0WR   DMAREQ_CRYPTO0_DATA0WR
 
#define DMAREQ_CRYPTO_DATA0XWR   DMAREQ_CRYPTO0_DATA0XWR
 
#define DMAREQ_CRYPTO_DATA1RD   DMAREQ_CRYPTO0_DATA1RD
 
#define DMAREQ_CRYPTO_DATA1WR   DMAREQ_CRYPTO0_DATA1WR
 
#define DMAREQ_I2C0_RXDATAV   ((20 << 16) + 0)
 
#define DMAREQ_I2C0_TXBL   ((20 << 16) + 1)
 
#define DMAREQ_I2C1_RXDATAV   ((21 << 16) + 0)
 
#define DMAREQ_I2C1_TXBL   ((21 << 16) + 1)
 
#define DMAREQ_LESENSE_BUFDATAV   ((51 << 16) + 0)
 
#define DMAREQ_LEUART0_RXDATAV   ((16 << 16) + 0)
 
#define DMAREQ_LEUART0_TXBL   ((16 << 16) + 1)
 
#define DMAREQ_LEUART0_TXEMPTY   ((16 << 16) + 2)
 
#define DMAREQ_MSC_WDATA   ((48 << 16) + 0)
 
#define DMAREQ_PRS_REQ0   ((1 << 16) + 0)
 
#define DMAREQ_PRS_REQ1   ((1 << 16) + 1)
 
#define DMAREQ_TIMER0_CC0   ((24 << 16) + 1)
 
#define DMAREQ_TIMER0_CC1   ((24 << 16) + 2)
 
#define DMAREQ_TIMER0_CC2   ((24 << 16) + 3)
 
#define DMAREQ_TIMER0_UFOF   ((24 << 16) + 0)
 
#define DMAREQ_TIMER1_CC0   ((25 << 16) + 1)
 
#define DMAREQ_TIMER1_CC1   ((25 << 16) + 2)
 
#define DMAREQ_TIMER1_CC2   ((25 << 16) + 3)
 
#define DMAREQ_TIMER1_CC3   ((25 << 16) + 4)
 
#define DMAREQ_TIMER1_UFOF   ((25 << 16) + 0)
 
#define DMAREQ_USART0_RXDATAV   ((12 << 16) + 0)
 
#define DMAREQ_USART0_TXBL   ((12 << 16) + 1)
 
#define DMAREQ_USART0_TXEMPTY   ((12 << 16) + 2)
 
#define DMAREQ_USART1_RXDATAV   ((13 << 16) + 0)
 
#define DMAREQ_USART1_RXDATAVRIGHT   ((13 << 16) + 3)
 
#define DMAREQ_USART1_TXBL   ((13 << 16) + 1)
 
#define DMAREQ_USART1_TXBLRIGHT   ((13 << 16) + 4)
 
#define DMAREQ_USART1_TXEMPTY   ((13 << 16) + 2)
 
#define DMAREQ_USART2_RXDATAV   ((14 << 16) + 0)
 
#define DMAREQ_USART2_TXBL   ((14 << 16) + 1)
 
#define DMAREQ_USART2_TXEMPTY   ((14 << 16) + 2)
 
#define DMAREQ_WTIMER0_CC0   ((26 << 16) + 1)
 
#define DMAREQ_WTIMER0_CC1   ((26 << 16) + 2)
 
#define DMAREQ_WTIMER0_CC2   ((26 << 16) + 3)
 
#define DMAREQ_WTIMER0_UFOF   ((26 << 16) + 0)
 

Macro Definition Documentation

#define DMAREQ_ADC0_SCAN   ((8 << 16) + 1)

DMA channel select for ADC0_SCAN

Definition at line 801 of file efr32mg13p932f512gm48.h.

#define DMAREQ_ADC0_SINGLE   ((8 << 16) + 0)

DMA channel select for ADC0_SINGLE

Definition at line 800 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO0_DATA0RD   ((49 << 16) + 2)

DMA channel select for CRYPTO0_DATA0RD

Definition at line 838 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO0_DATA0WR   ((49 << 16) + 0)

DMA channel select for CRYPTO0_DATA0WR

Definition at line 834 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO0_DATA0XWR   ((49 << 16) + 1)

DMA channel select for CRYPTO0_DATA0XWR

Definition at line 836 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO0_DATA1RD   ((49 << 16) + 4)

DMA channel select for CRYPTO0_DATA1RD

Definition at line 842 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO0_DATA1WR   ((49 << 16) + 3)

DMA channel select for CRYPTO0_DATA1WR

Definition at line 840 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO1_DATA0RD   ((52 << 16) + 2)

DMA channel select for CRYPTO1_DATA0RD

Definition at line 847 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO1_DATA0WR   ((52 << 16) + 0)

DMA channel select for CRYPTO1_DATA0WR

Definition at line 845 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO1_DATA0XWR   ((52 << 16) + 1)

DMA channel select for CRYPTO1_DATA0XWR

Definition at line 846 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO1_DATA1RD   ((52 << 16) + 4)

DMA channel select for CRYPTO1_DATA1RD

Definition at line 849 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO1_DATA1WR   ((52 << 16) + 3)

DMA channel select for CRYPTO1_DATA1WR

Definition at line 848 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO_DATA0RD   DMAREQ_CRYPTO0_DATA0RD

Alias for DMAREQ_CRYPTO0_DATA0RD

Definition at line 839 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO_DATA0WR   DMAREQ_CRYPTO0_DATA0WR

Alias for DMAREQ_CRYPTO0_DATA0WR

Definition at line 835 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO_DATA0XWR   DMAREQ_CRYPTO0_DATA0XWR

Alias for DMAREQ_CRYPTO0_DATA0XWR

Definition at line 837 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO_DATA1RD   DMAREQ_CRYPTO0_DATA1RD

Alias for DMAREQ_CRYPTO0_DATA1RD

Definition at line 843 of file efr32mg13p932f512gm48.h.

#define DMAREQ_CRYPTO_DATA1WR   DMAREQ_CRYPTO0_DATA1WR

Alias for DMAREQ_CRYPTO0_DATA1WR

Definition at line 841 of file efr32mg13p932f512gm48.h.

#define DMAREQ_I2C0_RXDATAV   ((20 << 16) + 0)

DMA channel select for I2C0_RXDATAV

Definition at line 816 of file efr32mg13p932f512gm48.h.

#define DMAREQ_I2C0_TXBL   ((20 << 16) + 1)

DMA channel select for I2C0_TXBL

Definition at line 817 of file efr32mg13p932f512gm48.h.

#define DMAREQ_I2C1_RXDATAV   ((21 << 16) + 0)

DMA channel select for I2C1_RXDATAV

Definition at line 818 of file efr32mg13p932f512gm48.h.

#define DMAREQ_I2C1_TXBL   ((21 << 16) + 1)

DMA channel select for I2C1_TXBL

Definition at line 819 of file efr32mg13p932f512gm48.h.

#define DMAREQ_LESENSE_BUFDATAV   ((51 << 16) + 0)

DMA channel select for LESENSE_BUFDATAV

Definition at line 844 of file efr32mg13p932f512gm48.h.

#define DMAREQ_LEUART0_RXDATAV   ((16 << 16) + 0)

DMA channel select for LEUART0_RXDATAV

Definition at line 813 of file efr32mg13p932f512gm48.h.

#define DMAREQ_LEUART0_TXBL   ((16 << 16) + 1)

DMA channel select for LEUART0_TXBL

Definition at line 814 of file efr32mg13p932f512gm48.h.

#define DMAREQ_LEUART0_TXEMPTY   ((16 << 16) + 2)

DMA channel select for LEUART0_TXEMPTY

Definition at line 815 of file efr32mg13p932f512gm48.h.

#define DMAREQ_MSC_WDATA   ((48 << 16) + 0)

DMA channel select for MSC_WDATA

Definition at line 833 of file efr32mg13p932f512gm48.h.

#define DMAREQ_PRS_REQ0   ((1 << 16) + 0)

DMA channel select for PRS_REQ0

Definition at line 798 of file efr32mg13p932f512gm48.h.

#define DMAREQ_PRS_REQ1   ((1 << 16) + 1)

DMA channel select for PRS_REQ1

Definition at line 799 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER0_CC0   ((24 << 16) + 1)

DMA channel select for TIMER0_CC0

Definition at line 821 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER0_CC1   ((24 << 16) + 2)

DMA channel select for TIMER0_CC1

Definition at line 822 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER0_CC2   ((24 << 16) + 3)

DMA channel select for TIMER0_CC2

Definition at line 823 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER0_UFOF   ((24 << 16) + 0)

DMA channel select for TIMER0_UFOF

Definition at line 820 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER1_CC0   ((25 << 16) + 1)

DMA channel select for TIMER1_CC0

Definition at line 825 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER1_CC1   ((25 << 16) + 2)

DMA channel select for TIMER1_CC1

Definition at line 826 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER1_CC2   ((25 << 16) + 3)

DMA channel select for TIMER1_CC2

Definition at line 827 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER1_CC3   ((25 << 16) + 4)

DMA channel select for TIMER1_CC3

Definition at line 828 of file efr32mg13p932f512gm48.h.

#define DMAREQ_TIMER1_UFOF   ((25 << 16) + 0)

DMA channel select for TIMER1_UFOF

Definition at line 824 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART0_RXDATAV   ((12 << 16) + 0)

DMA channel select for USART0_RXDATAV

Definition at line 802 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART0_TXBL   ((12 << 16) + 1)

DMA channel select for USART0_TXBL

Definition at line 803 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART0_TXEMPTY   ((12 << 16) + 2)

DMA channel select for USART0_TXEMPTY

Definition at line 804 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART1_RXDATAV   ((13 << 16) + 0)

DMA channel select for USART1_RXDATAV

Definition at line 805 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART1_RXDATAVRIGHT   ((13 << 16) + 3)

DMA channel select for USART1_RXDATAVRIGHT

Definition at line 808 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART1_TXBL   ((13 << 16) + 1)

DMA channel select for USART1_TXBL

Definition at line 806 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART1_TXBLRIGHT   ((13 << 16) + 4)

DMA channel select for USART1_TXBLRIGHT

Definition at line 809 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART1_TXEMPTY   ((13 << 16) + 2)

DMA channel select for USART1_TXEMPTY

Definition at line 807 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART2_RXDATAV   ((14 << 16) + 0)

DMA channel select for USART2_RXDATAV

Definition at line 810 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART2_TXBL   ((14 << 16) + 1)

DMA channel select for USART2_TXBL

Definition at line 811 of file efr32mg13p932f512gm48.h.

#define DMAREQ_USART2_TXEMPTY   ((14 << 16) + 2)

DMA channel select for USART2_TXEMPTY

Definition at line 812 of file efr32mg13p932f512gm48.h.

#define DMAREQ_WTIMER0_CC0   ((26 << 16) + 1)

DMA channel select for WTIMER0_CC0

Definition at line 830 of file efr32mg13p932f512gm48.h.

#define DMAREQ_WTIMER0_CC1   ((26 << 16) + 2)

DMA channel select for WTIMER0_CC1

Definition at line 831 of file efr32mg13p932f512gm48.h.

#define DMAREQ_WTIMER0_CC2   ((26 << 16) + 3)

DMA channel select for WTIMER0_CC2

Definition at line 832 of file efr32mg13p932f512gm48.h.

#define DMAREQ_WTIMER0_UFOF   ((26 << 16) + 0)

DMA channel select for WTIMER0_UFOF

Definition at line 829 of file efr32mg13p932f512gm48.h.