CoreDevices > EFR32BG12P433F1024GL125
Detailed Description
Processor and Core Peripheral Section.
Macros |
|
#define | __FPU_PRESENT 1U |
#define | __MPU_PRESENT 1U |
#define | __NVIC_PRIO_BITS 3U |
#define | __Vendor_SysTickConfig 0U |
#define | __VTOR_PRESENT 1U |
Macro Definition Documentation
#define __FPU_PRESENT 1U |
Presence of FPU
Definition at line
131
of file
efr32bg12p433f1024gl125.h
.
#define __MPU_PRESENT 1U |
Presence of MPU
Definition at line
130
of file
efr32bg12p433f1024gl125.h
.
#define __NVIC_PRIO_BITS 3U |
NVIC interrupt priority bits
Definition at line
133
of file
efr32bg12p433f1024gl125.h
.
Referenced by CORE_AtomicDisableIrq() , CORE_EnterAtomic() , CORE_IrqIsBlocked() , CORE_IrqIsDisabled() , CORE_YieldAtomic() , and LDMA_Init() .
#define __Vendor_SysTickConfig 0U |
Is 1 if different SysTick counter is used
Definition at line
134
of file
efr32bg12p433f1024gl125.h
.
#define __VTOR_PRESENT 1U |
Presence of VTOR register in SCB
Definition at line
132
of file
efr32bg12p433f1024gl125.h
.