PCNT
EMLIB

Detailed Description

Pulse Counter (PCNT) Peripheral API.

This module contains functions to control the PCNT peripheral of Silicon Labs 32-bit MCUs and SoCs. The PCNT decodes incoming pulses. The module has a quadrature mode which may be used to decode the speed and direction of a mechanical shaft.

Data Structures

struct PCNT_Init_TypeDef

Macros

#define PCNT0_CNT_SIZE (16) /* PCNT0 counter is 16 bits. */
#define PCNT1_CNT_SIZE (8) /* PCNT1 counter is 8 bits. */
#define PCNT2_CNT_SIZE (8) /* PCNT2 counter is 8 bits. */
#define PCNT_INIT_DEFAULT

Enumerations

enum PCNT_CntEvent_TypeDef {
pcntCntEventBoth = _PCNT_CTRL_CNTEV_BOTH,
pcntCntEventUp = _PCNT_CTRL_CNTEV_UP,
pcntCntEventDown = _PCNT_CTRL_CNTEV_DOWN,
pcntCntEventNone = _PCNT_CTRL_CNTEV_NONE
}
enum PCNT_Mode_TypeDef {
pcntModeDisable = _PCNT_CTRL_MODE_DISABLE,
pcntModeOvsSingle = _PCNT_CTRL_MODE_OVSSINGLE,
pcntModeExtSingle = _PCNT_CTRL_MODE_EXTCLKSINGLE,
pcntModeExtQuad = _PCNT_CTRL_MODE_EXTCLKQUAD
}
enum PCNT_PRSInput_TypeDef {
pcntPRSInputS0 = 0,
pcntPRSInputS1 = 1
}
enum PCNT_PRSSel_TypeDef {
pcntPRSCh0 = 0,
pcntPRSCh1 = 1,
pcntPRSCh2 = 2,
pcntPRSCh3 = 3,
pcntPRSCh4 = 4,
pcntPRSCh5 = 5,
pcntPRSCh6 = 6,
pcntPRSCh7 = 7,
pcntPRSCh8 = 8,
pcntPRSCh9 = 9,
pcntPRSCh10 = 10,
pcntPRSCh11 = 11
}

Functions

__STATIC_INLINE uint32_t PCNT_AuxCounterGet (PCNT_TypeDef *pcnt)
Get auxiliary counter value.
__STATIC_INLINE uint32_t PCNT_CounterGet (PCNT_TypeDef *pcnt)
Get pulse counter value.
void PCNT_CounterReset (PCNT_TypeDef *pcnt)
Reset PCNT counters and TOP register.
__STATIC_INLINE void PCNT_CounterSet (PCNT_TypeDef *pcnt, uint32_t count)
Set counter value.
void PCNT_CounterTopSet (PCNT_TypeDef *pcnt, uint32_t count, uint32_t top)
Set the counter and top values.
void PCNT_Enable (PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode)
Set PCNT operational mode.
void PCNT_FreezeEnable (PCNT_TypeDef *pcnt, bool enable)
PCNT register synchronization freeze control.
void PCNT_Init (PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init)
Initialize the pulse counter.
__STATIC_INLINE void PCNT_IntClear (PCNT_TypeDef *pcnt, uint32_t flags)
Clear one or more pending PCNT interrupts.
__STATIC_INLINE void PCNT_IntDisable (PCNT_TypeDef *pcnt, uint32_t flags)
Disable one or more PCNT interrupts.
__STATIC_INLINE void PCNT_IntEnable (PCNT_TypeDef *pcnt, uint32_t flags)
Enable one or more PCNT interrupts.
__STATIC_INLINE uint32_t PCNT_IntGet (PCNT_TypeDef *pcnt)
Get pending PCNT interrupt flags.
__STATIC_INLINE uint32_t PCNT_IntGetEnabled (PCNT_TypeDef *pcnt)
Get enabled and pending PCNT interrupt flags.
__STATIC_INLINE void PCNT_IntSet (PCNT_TypeDef *pcnt, uint32_t flags)
Set one or more pending PCNT interrupts from SW.
void PCNT_PRSInputEnable (PCNT_TypeDef *pcnt, PCNT_PRSInput_TypeDef prsInput, bool enable)
Enable/disable the selected PRS input of PCNT.
void PCNT_Reset (PCNT_TypeDef *pcnt)
Reset PCNT to the same state that it was in after a hardware reset.
__STATIC_INLINE uint32_t PCNT_TopBufferGet (PCNT_TypeDef *pcnt)
Get pulse counter top buffer value.
void PCNT_TopBufferSet (PCNT_TypeDef *pcnt, uint32_t val)
Set top buffer value.
__STATIC_INLINE uint32_t PCNT_TopGet (PCNT_TypeDef *pcnt)
Get pulse counter top value.
void PCNT_TopSet (PCNT_TypeDef *pcnt, uint32_t val)
Set the top value.

Macro Definition Documentation

#define PCNT0_CNT_SIZE   (16) /* PCNT0 counter is 16 bits. */

PCNT0 Counter register size.

Definition at line 60 of file em_pcnt.h .

Referenced by PCNT_CounterTopSet() , PCNT_Init() , and PCNT_TopSet() .

#define PCNT1_CNT_SIZE   (8) /* PCNT1 counter is 8 bits. */

PCNT1 Counter register size.

Definition at line 66 of file em_pcnt.h .

Referenced by PCNT_CounterTopSet() , PCNT_Init() , and PCNT_TopSet() .

#define PCNT2_CNT_SIZE   (8) /* PCNT2 counter is 8 bits. */

PCNT2 Counter register size.

Definition at line 75 of file em_pcnt.h .

Referenced by PCNT_CounterTopSet() , PCNT_Init() , and PCNT_TopSet() .

#define PCNT_INIT_DEFAULT
Value:
{ \
pcntModeDisable, /* Disabled by default. */ \
_PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
_PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
false, /* Use positive edge. */ \
false, /* Up-counting. */ \
false, /* Filter disabled. */ \
false, /* Hysteresis disabled. */ \
true, /* Counter direction is given by CNTDIR. */ \
pcntCntEventUp, /* Regular counter counts up on upcount events. */ \
pcntCntEventNone, /* Auxiliary counter doesn't respond to events. */ \
pcntPRSCh0, /* PRS channel 0 selected as S0IN. */ \
pcntPRSCh0 /* PRS channel 0 selected as S1IN. */ \
}

Default configuration for PCNT initialization structure.

Definition at line 244 of file em_pcnt.h .

Enumeration Type Documentation

enum PCNT_CntEvent_TypeDef

Counter event selection. Note: unshifted values are being used for enumeration because multiple configuration structure members use this type definition.

Enumerator
pcntCntEventBoth

Counts up on up-count and down on down-count events.

pcntCntEventUp

Only counts up on up-count events.

pcntCntEventDown

Only counts down on down-count events.

pcntCntEventNone

Never counts.

Definition at line 115 of file em_pcnt.h .

enum PCNT_Mode_TypeDef

Mode selection.

Enumerator
pcntModeDisable

Disable pulse counter.

pcntModeOvsSingle

Single input LFACLK oversampling mode (available in EM0-EM2).

pcntModeExtSingle

Externally clocked single input counter mode (available in EM0-EM3).

pcntModeExtQuad

Externally clocked quadrature decoder mode (available in EM0-EM3).

Definition at line 86 of file em_pcnt.h .

enum PCNT_PRSInput_TypeDef

PRS inputs of PCNT.

Enumerator
pcntPRSInputS1

PRS input 0.

Definition at line 164 of file em_pcnt.h .

enum PCNT_PRSSel_TypeDef

PRS sources for s0PRS and s1PRS .

Enumerator
pcntPRSCh0

PRS channel 0.

pcntPRSCh1

PRS channel 1.

pcntPRSCh2

PRS channel 2.

pcntPRSCh3

PRS channel 3.

pcntPRSCh4

PRS channel 4.

pcntPRSCh5

PRS channel 5.

pcntPRSCh6

PRS channel 6.

pcntPRSCh7

PRS channel 7.

pcntPRSCh8

PRS channel 8.

pcntPRSCh9

PRS channel 9.

pcntPRSCh10

PRS channel 10.

pcntPRSCh11

PRS channel 11.

Definition at line 132 of file em_pcnt.h .

Function Documentation

__STATIC_INLINE uint32_t PCNT_AuxCounterGet ( PCNT_TypeDef * pcnt )

Get auxiliary counter value.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
Returns
Current auxiliary counter value.

Definition at line 392 of file em_pcnt.h .

__STATIC_INLINE uint32_t PCNT_CounterGet ( PCNT_TypeDef * pcnt )

Get pulse counter value.

Default configuration for PCNT initialization structure.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
Returns
Current pulse counter value.

Definition at line 376 of file em_pcnt.h .

void PCNT_CounterReset ( PCNT_TypeDef * pcnt )

Reset PCNT counters and TOP register.

Note
Notice that special SYNCBUSY handling is not applicable for the RSTEN bit of the control register, so we don't need to wait for it when only modifying RSTEN. (It would mean undefined wait time if clocked by an external clock.) The SYNCBUSY bit will however be set, leading to a synchronization in the LF domain, with, in reality, no changes.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.

Definition at line 140 of file em_pcnt.c .

References BUS_RegBitWrite() .

__STATIC_INLINE void PCNT_CounterSet ( PCNT_TypeDef * pcnt,
uint32_t count
)

Set counter value.

Pulse counter is disabled while changing counter value, and re-enabled (if originally enabled) when counter value has been set.

Note
This function will stall until synchronization to low-frequency domain is completed. For that reason, it should normally not be used when using an external clock to clock the PCNT module since stall time may be undefined in that case. The counter should normally only be set when operating in (or about to enable) pcntModeOvsSingle mode.
Parameters
[in] pcnt Pointer to PCNT peripheral register block.
[in] count Value to set in counter register.

Definition at line 422 of file em_pcnt.h .

References PCNT_CounterTopSet() .

void PCNT_CounterTopSet ( PCNT_TypeDef * pcnt,
uint32_t count,
uint32_t top
)

Set the counter and top values.

The pulse counter is disabled while changing these values and reenabled (if originally enabled) when values have been set.

Note
This function will stall until synchronization to low-frequency domain is completed. For that reason, it should normally not be used when an external clock is used for the PCNT module, since stall time may be undefined. The counter should normally only be set when operating in (or about to enable) pcntModeOvsSingle mode.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] count A value to set in the counter register.
[in] top A value to set in the top register.

Definition at line 175 of file em_pcnt.c .

References PCNT0_CNT_SIZE , PCNT1_CNT_SIZE , and PCNT2_CNT_SIZE .

Referenced by PCNT_CounterSet() , and PCNT_Init() .

void PCNT_Enable ( PCNT_TypeDef * pcnt,
PCNT_Mode_TypeDef mode
)

Set PCNT operational mode.

Notice that this function does not do any configuration. Setting operational mode is normally only required after initialization is done, and if not done as part of initialization or if requiring to disable/reenable pulse counter.

Note
This function may stall until synchronization to low-frequency domain is completed. For that reason, it should normally not be used when an external clock is used for the PCNT module, since stall time may be undefined.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] mode An operational mode to use for PCNT.

Definition at line 270 of file em_pcnt.c .

void PCNT_FreezeEnable ( PCNT_TypeDef * pcnt,
bool enable
)

PCNT register synchronization freeze control.

Some PCNT registers require synchronization into the low-frequency (LF) domain. The freeze feature allows for several registers to be modified before passing them to the LF domain simultaneously, which takes place when the freeze mode is disabled.

Note
When enabling freeze mode, this function will wait for all current ongoing PCNT synchronization to the LF domain to complete (normally synchronization will not be in progress). However, for this reason, when using freeze mode, modifications of registers requiring the LF synchronization should be done within one freeze enable/disable block to avoid unnecessary stalling.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] enable
  • True - enable freeze, modified registers are not propagated to the LF domain.
  • False - disables freeze, modified registers are propagated to LF domain.

Definition at line 355 of file em_pcnt.c .

void PCNT_Init ( PCNT_TypeDef * pcnt,
const PCNT_Init_TypeDef * init
)

Initialize the pulse counter.

This function will configure the pulse counter. The clock selection is configured as follows, depending on operational mode:

Notice that the LFACLK must be enabled in all modes, since some basic setup is done with this clock even if the external pin clock usage mode is chosen. The pulse counter clock for the selected instance must also be enabled prior to initialization.

Notice that pins used by the PCNT module must be properly configured by the user explicitly through setting the ROUTE register for the PCNT to work as intended.

Writing to CNT will not occur in external clock modes (EXTCLKQUAD and EXTCLKSINGLE) because the external clock rate is unknown. The user should handle it manually depending on the application.

TOPB is written for all modes but in external clock mode it will take 3 external clock cycles to sync to TOP.

Note
Initializing requires synchronization into the low-frequency domain. This may cause a delay.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] init A pointer to the initialization structure.

Definition at line 415 of file em_pcnt.c .

References PCNT_Init_TypeDef::auxCntEvent , BUS_RegBitWrite() , CMU_PCNTClockExternalSet() , PCNT_Init_TypeDef::cntEvent , PCNT_Init_TypeDef::countDown , PCNT_Init_TypeDef::counter , PCNT_Init_TypeDef::filter , PCNT_Init_TypeDef::hyst , PCNT_Init_TypeDef::mode , PCNT_Init_TypeDef::negEdge , PCNT0_CNT_SIZE , PCNT1_CNT_SIZE , PCNT2_CNT_SIZE , PCNT_CounterTopSet() , pcntCntEventBoth , pcntCntEventDown , pcntCntEventNone , pcntCntEventUp , pcntModeExtQuad , pcntModeExtSingle , pcntModeOvsSingle , PCNT_Init_TypeDef::s0PRS , PCNT_Init_TypeDef::s1CntDir , PCNT_Init_TypeDef::s1PRS , and PCNT_Init_TypeDef::top .

__STATIC_INLINE void PCNT_IntClear ( PCNT_TypeDef * pcnt,
uint32_t flags
)

Clear one or more pending PCNT interrupts.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
[in] flags Pending PCNT interrupt source to clear. Use a bitwise logic OR combination of valid interrupt flags for the PCNT module (PCNT_IF_nnn).

Definition at line 455 of file em_pcnt.h .

__STATIC_INLINE void PCNT_IntDisable ( PCNT_TypeDef * pcnt,
uint32_t flags
)

Disable one or more PCNT interrupts.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
[in] flags PCNT interrupt sources to disable. Use a bitwise logic OR combination of valid interrupt flags for PCNT module (PCNT_IF_nnn).

Definition at line 471 of file em_pcnt.h .

__STATIC_INLINE void PCNT_IntEnable ( PCNT_TypeDef * pcnt,
uint32_t flags
)

Enable one or more PCNT interrupts.

Note
Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. To ignore a pending interrupt, consider using PCNT_IntClear() prior to enabling the interrupt.
Parameters
[in] pcnt Pointer to PCNT peripheral register block.
[in] flags PCNT interrupt sources to enable. Use a bitwise logic OR combination of valid interrupt flags for PCNT module (PCNT_IF_nnn).

Definition at line 492 of file em_pcnt.h .

__STATIC_INLINE uint32_t PCNT_IntGet ( PCNT_TypeDef * pcnt )

Get pending PCNT interrupt flags.

Note
The event bits are not cleared by the use of this function.
Parameters
[in] pcnt Pointer to PCNT peripheral register block.
Returns
PCNT interrupt sources pending. A bitwise logic OR combination of valid interrupt flags for PCNT module (PCNT_IF_nnn).

Definition at line 511 of file em_pcnt.h .

__STATIC_INLINE uint32_t PCNT_IntGetEnabled ( PCNT_TypeDef * pcnt )

Get enabled and pending PCNT interrupt flags.

Useful for handling more interrupt sources in the same interrupt handler.

Note
The event bits are not cleared by the use of this function.
Parameters
[in] pcnt Pointer to PCNT peripheral register block.
Returns
Pending and enabled PCNT interrupt sources. The return value is the bitwise AND combination of
  • the OR combination of enabled interrupt sources in PCNT_IEN_nnn register (PCNT_IEN_nnn) and
  • the OR combination of valid interrupt flags of the PCNT module (PCNT_IF_nnn).

Definition at line 537 of file em_pcnt.h .

__STATIC_INLINE void PCNT_IntSet ( PCNT_TypeDef * pcnt,
uint32_t flags
)

Set one or more pending PCNT interrupts from SW.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
[in] flags PCNT interrupt sources to set to pending. Use a bitwise logic OR combination of valid interrupt flags for PCNT module (PCNT_IF_nnn).

Definition at line 560 of file em_pcnt.h .

void PCNT_PRSInputEnable ( PCNT_TypeDef * pcnt,
PCNT_PRSInput_TypeDef prsInput,
bool enable
)

Enable/disable the selected PRS input of PCNT.

Notice that this function does not do any configuration.

Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] prsInput PRS input (S0 or S1) of the selected PCNT module.
[in] enable Set to true to enable, false to disable the selected PRS input.

Definition at line 302 of file em_pcnt.c .

References BUS_RegBitWrite() , and pcntPRSInputS1 .

void PCNT_Reset ( PCNT_TypeDef * pcnt )

Reset PCNT to the same state that it was in after a hardware reset.

Notice the LFACLK must be enabled, since some basic reset is done with this clock. The pulse counter clock for the selected instance must also be enabled prior to initialization.

Note
The ROUTE register is NOT reset by this function to allow for centralized setup of this feature.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.

Definition at line 611 of file em_pcnt.c .

References BUS_RegBitWrite() , CMU_PCNTClockExternalSet() , and PCNT_TopBufferSet() .

__STATIC_INLINE uint32_t PCNT_TopBufferGet ( PCNT_TypeDef * pcnt )

Get pulse counter top buffer value.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
Returns
Current pulse counter top buffer value.

Definition at line 577 of file em_pcnt.h .

void PCNT_TopBufferSet ( PCNT_TypeDef * pcnt,
uint32_t val
)

Set top buffer value.

Note
This function may stall until synchronization to low-frequency domain is completed. For that reason, it should normally not be used when an external clock is used for the PCNT module since stall time may be undefined.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] val A value to set in the top buffer register.

Definition at line 753 of file em_pcnt.c .

Referenced by PCNT_Reset() .

__STATIC_INLINE uint32_t PCNT_TopGet ( PCNT_TypeDef * pcnt )

Get pulse counter top value.

Parameters
[in] pcnt Pointer to PCNT peripheral register block.
Returns
Current pulse counter top value.

Definition at line 594 of file em_pcnt.h .

void PCNT_TopSet ( PCNT_TypeDef * pcnt,
uint32_t val
)

Set the top value.

Note
This function will stall until synchronization to low-frequency domain is completed. For that reason, it should normally not be used when an external clock is used for the PCNT module since stall time may be undefined.
Parameters
[in] pcnt A pointer to the PCNT peripheral register block.
[in] val A value to set in the top register.

Definition at line 778 of file em_pcnt.c .

References PCNT0_CNT_SIZE , PCNT1_CNT_SIZE , and PCNT2_CNT_SIZE .