Target Services#

Virtual UART all-headerall-header#

The Virtual UART (VUART) interface provides a pin‑efficient, buffered application data channel that does not require additional I/O pins beyond the debug interface. VUART is available on TCP/IP port 4900.

Target to Host#

Target‑to‑host communication uses the Serial Wire Output (SWO) pin via the Instrumentation Trace Macrocell (ITM) peripheral. This setup allows a low‑power (“sleepy”) target to enter deep energy modes and wake intermittently to emit data. The SWO baud rate is fixed at 875 kHz.

VUART uses ITM stimulus port 0 for general‑purpose printing. Silicon Labs’ networking stacks use ITM stimulus port 8 for structured debug output. Data sent on port 8 is additionally framed and appears in the Simplicity Studio Network Analyzer.

VUART data can also be injected via a custom DCH packet using the type code VIRTUAL_UART_TX, as defined in the DCH message type list. When sent this way, the same payload is available both as raw VUART data on TCP/IP port 4900 and as a DCH packet on TCP/IP port 4905.

Host to Target#

Host-to-target communication uses SEGGER's Real Time Transfer (RTT) technology. For a full explanation, see the J-Link/J-Trace User Guide (UM08001). RTT provides RAM‑resident circular buffers (the RTT Control Block) that the adapter writes into and the target application reads from.

VUART expects an RTT down channel (host→target) whose name is exactly: silabsvuartdown The adapter looks up this channel by name after it detects inbound data on TCP/IP port 4900. If the adapter cannot find a matching channel in the RTT Control Block, it returns an error to the connection. The RTT Control Block must be aligned on a 1024-byte boundary in RAM for the adapter to locate it.

After initializing the RTT connection, the target will only enter emulated EM2 and EM3, where power consumption remains similar to EM1. This is because RTT uses the debug interface, which requires high-frequency oscillators. Energy modes EM4S and EM4H will work as normal. When debugging energy consumption, it is important not to send data on TCP/IP port 4900 so as not to instantiate the RTT connection.

Limitations#

  • Because the SWO connection can be disabled by the debugger at any time, the target application should verify that SWO is enabled and configured before each transmission.

  • After initializing host-to-target communication over RTT by sending data on TCP/IP port 4900, the target application will be unable to enter EM2 and EM3. This is because RTT uses the target's debug connection.

  • VUART might not work reliably during an active debugging session due to contention over the target's debug interface. The adapter will defer accessing the target until it is made available by the host debugger.

  • VUART is designed with the assumption that only the adapter will access the RTT control block. If the target application uses RTT for other purposes, such as Segger SystemView, refrain from using VUART.

Virtual COM Port all-headerall-header#

The virtual COM port (VCOM) consists of a physical UART between the target device and the adapter, and a logical function in the adapter that makes the serial port available to the host PC over USB or Ethernet. You can use the Admin Console to configure serial port parameters (such as baud rate or flow control). By default, the VCOM serial port is configured to use 115200 8N1 (115.2 kbit/s, 8 data bits, 1 stop bit), with flow control disabled.

Auxiliary UART ek-dk-headerek-dk-header wpk-headerwpk-header#

The Auxiliary UART is a software-controlled UART that repurposes the RTS and CTS pins (normally used for VCOM) as TX and RX. When using the WPK, the baud rate is fixed at 115200. You can use the Admin Console to configure the Auxiliary UART.

Advanced Energy Monitor wstk-headerwstk-header wpk-headerwpk-header pk-headerpk-header#

The Advanced Energy Monitor (AEM) tool measures the voltage and current consumption of the connected target. The measured voltage rails, measurement precision, and sampling frequency depend on the hardware of each kit. For details about AEM circuitry, refer to the kit's user guide.

The current samples can be combined with the target processor's Program Counter (PC) sampling by utilizing a feature of the ARM CoreSight debug architecture. The ITM block can be programmed to sample the MCU's PC at periodic intervals and output these over SWO pin on ARM devices. When these two data streams are fused and correlated with the running application's memory map, an accurate statistical profile can be built that shows the energy profile of the running application in realtime.

The AEM continuously collects data, which can be retrieved using the Admin Console or by connecting to the DCH after enabling AEM messages. When AEM messages are enabled in the DCH, an AEM packet will be sent whenever the internal buffer is filled. The PC samples can also be retrieved from the DCH after enabling PC sample messages.

Packet Trace Interface wstk-headerwstk-header ek-dk-headerek-dk-header wpk-headerwpk-header#

The Packet Trace Interface (PTI) is a hardware feature integrated into many Silicon Labs wireless System-on-Chip (SoC) devices and modules. PTI provides a non-intrusive, PHY-level interface that allows you to capture, monitor, and log all radio packets transmitted and received by the device. This is especially useful for debugging and analyzing wireless network traffic without burdening the device’s processor.

PTI packets are collected by the adapter and can be retrieved using the Admin Console or by connecting to the DCH while PTI messages are enabled. PTI messages are enabled by default in the DCH.

The adapter can be configured to use different modes and baud rates to support a range of target devices. All adapters support baud rates from 9600 to 3200000. The number of PTI interfaces depends on the type of kit used.

Number of PTI Interfaces

Kit Type

1

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2

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Supported PTI modes:

  • One wire: Uses a single pin for 9-bit UART data. The 9th bit distinguishes control bytes from normal data, allowing the data stream to be parsed with only one wire. This is the default mode for EZR32 target devices.

  • EFR UART: Uses two pins: one for 8-bit UART data and one for a framing signal to indicate the start and end of packets. This is the default mode for EFR32 target devices.

  • Aux VUART: Repurposes the PTI data pin to be used as a regular UART to send data from the target device to the adapter. The data sent is handled as VUART by the adapter and is available on TCP/IP port 4900. This is the default mode for SiW917 target devices.

Configuration over SWO wstk-headerwstk-header wpk-headerwpk-header pk-headerpk-header#

The adapter supports configuration over SWO (CoS), which allows the target to automatically configure the adapter's serial and PTI settings. The packet format is described in Data Channel Details. This feature is also included in the Simplicity SDK.

Debugging all-headerall-header#

The adapter can be used as a debugger to program and debug other Silicon Labs devices. Depending on the kit's hardware configuration, you can connect to a target that is embedded or plugged into the kit, or to an external device through the debug connector.

Supported Debug Interfaces#

  • Serial Wire Debug: Supported by all EFM32, EFR32, and EZR32 devices

  • JTAG: Supported by EFR32 and some EFM32 devices.

  • C2 Debug: Supported by EFM8 devices.

Debug Modes#

The adapter supports multiple debug modes, depending on the kit's hardware configuration:

  • MCU: The debugger is connected to the target on the kit. The debug connector is isolated from both the debugger and the target device.

  • IN: The debugger is disconnected to allow an external debugger to debug the target through the debug connector.

  • OUT: The debugger is connected to the debug connector to debug an external target.

  • MINI: The debugger is connected to the Mini Simplicity connector. This connector supports debugging using SWD, VCOM, and PTI.

  • OFF: The debugger is not connected to the target or any of the external connectors.