Clock API Appendix#

This appendix provides supporting information, definitions, and extended examples for using the Clock Manager application programming interface (API) on the Silicon Labs SiWG917 System-on-Chip (SoC).

It includes a glossary, acronyms, code examples, key references, and frequently asked questions to help you use the Clock Manager API effectively in your applications.

Glossary#

The glossary defines key terms used throughout the Clock Manager API documentation. Use it as a quick reference when you configure clocks on the SiWG917.

• M4 core – The primary microcontroller core in the SiWG917, based on the ARM Cortex-M4 architecture. It runs the main application code.

• Core clock – The main clock signal driving the CPU or core logic. Also referred to as the processor clock.

• Clock tree – The hierarchical structure of all clock sources and how they distribute timing signals to subsystems.

• Phase-locked loop (PLL) – A circuit that generates stable, high-frequency clock signals from a lower-frequency reference.

• Oscillator – A circuit that produces a periodic signal, typically used as a clock source.

• Divider – Hardware logic that reduces a clock frequency by a specific ratio.

• Reference clock – The base signal used to derive other clock frequencies.

• Blocking delay – A delay mechanism that halts program execution for a defined duration.

Acronyms#

Common acronyms used in this documentation are listed below. Each is defined in full at first mention in the main guide.

Extended Examples#

The following example demonstrates dynamic clock source switching and runtime frequency adjustment using the Clock Manager API.

Use this example as a reference when implementing similar functionality in your application.

// Example: Dynamic clock source switching and frequency adjustment

// Initialize the Clock Manager
sl_status_t status = sl_si91x_clock_manager_init();
if (status != SL_STATUS_OK) {
  // Handle initialization error
}

// Set M4 core clock to use SoC PLL at 120 MHz
status = sl_si91x_clock_manager_m4_set_core_clk(M4_SOCPLLCLK, 120000000);
if (status != SL_STATUS_OK) {
  // Handle configuration error
}

// Change PLL frequency at runtime
status = sl_si91x_clock_manager_set_pll_freq(SOC_PLL, 80000000, PLL_REF_CLK_VAL_XTAL);
if (status != SL_STATUS_OK) {
  // Handle PLL error
}

// Read current core clock source and frequency
uint32_t freq = 0;
sl_si91x_m4_soc_clk_src_sel_t clk_src = sl_si91x_clock_manager_m4_get_core_clk_src_freq(&freq);

// Disable the PLL to save power
status = sl_si91x_clock_manager_control_pll(SOC_PLL, false);

// Add a 500-ms delay
sl_si91x_delay_ms(500);

Tip:
Always verify that the selected clock source is stable before performing source switching or frequency updates.

Next Steps and References#

Refer to the following documentation for more information about the Clock Manager and related subsystems:

• SiWG917 Clock Manager API Reference

• SiWG917 MCU Overview

• Power Manager API Reference

• Status Codes Documentation

• Developing with WiSeConnect SDK

Frequently Asked Questions (FAQ)#

Q: What is the purpose of the Clock Manager?
A: The Clock Manager configures and manages clock sources and dividers on the SiWG917, ensuring optimal performance and power efficiency.

Q: Can I change the clock source or frequency at runtime?
A: Yes. The Clock Manager APIs allow dynamic switching and frequency scaling during application execution.

Q: Do I need to reconfigure clocks when changing power states?
A: No. The Clock Manager works with the Power Manager to adjust clock settings automatically during transitions between active and low-power states (such as PS4, PS3, and PS2).

Q: What happens if I select an unstable clock source?
A: The system may behave unpredictably. Always verify clock stability before applying new clock configurations.

Q: How do I add a delay in my application?
A: Use sl_si91x_delay_ms(uint32_t milli_seconds) to insert a blocking delay calibrated to the current core clock.

Q: Where can I find error codes for Clock Manager APIs?
A: See the Status Codes Documentation for all error codes returned by API functions.