Pseudo-Static Random Access Memory (PSRAM) Debugging and Error Handling#

Debugging pseudo-static random access memory (PSRAM) on SiWx917 devices involves verifying:

• Correct initialization and configuration

• Reliable memory access over the quad serial peripheral interface (QSPI)

• Proper behavior across power-state transitions

This section provides practical methods to diagnose PSRAM issues and interpret error codes returned by the WiSeConnect PSRAM application programming interfaces (APIs).

Common Debugging Techniques#

When PSRAM does not behave as expected, focus on:

• Initialization sequence

• QSPI and timing configuration

• Runtime data integrity through read and write tests

Step 1. Use the Simplicity Studio Debugger#

The Simplicity Studio Debug perspective is the primary tool for analyzing PSRAM initialization, timing, and memory access.

• Inspect PSRAM memory

  • Set a breakpoint at the first PSRAM access.

  • Use the Memory View to write patterns , such as 0xAA, 0x55, or incrementing data.

  • Read them back to confirm data integrity.

• Step through initialization

  • Single-step through your PSRAM init routine.

  • Inspect QSPI and clock configuration registers in the Registers or Expressions view.

• Enable debug logging

  • Build the application with debug logging enabled.

  • Log key events, such as initialization start and end, clock settings, and API return codes.

Step 2. Verify Timing and Configuration#

Improper clock or timing configuration is one of the most common causes of PSRAM initialization failures.

Tip: Always cross-check timing parameters with the PSRAM manufacturer’s data sheet.

Error Code Reference#

The PSRAM APIs may return error codes that identify configuration or runtime failures. The following table lists common return values and their meanings.

Note: Always check return values from PSRAM APIs to ensure successful operations before performing read/write actions.

Best Practices for Debugging#

1. Initialize peripherals first. Initialize clocks, QSPI, and PSRAM in the correct order.

2. Validate the master boot record (MBR) configuration. Confirm that the MBR includes correct PSRAM timing and mode settings.

3. Use memory stress tests. Repeatedly write and read large buffers to detect intermittent failures.

4. Avoid simultaneous flash and PSRAM access. Schedule operations to prevent contention on the QSPI bus.

5. Enable logging selectively. Use conditional logging to reduce overhead while debugging time-sensitive applications.

6. Profile memory performance. Use performance counters or timestamps to monitor read and write throughput.

Troubleshooting Checklist#