PSRAM Driver#
Introduction#
PSRAM (Pseudo Static Random Access Memory) is a random-access memory whose internal structure is based on dynamic memory with refresh control signals generated internally, in the standby mode, so that it can mimic the functionality of a static memory. It combines the high density of DRAM with the ease-of-use of true SRAM. The M4 core communicates with the PSRAM via Quad SPI interface.
Configuration#
PSRAM Device Configuration#
The PSRAM Driver offers configuring the following:
Read-Write type
Normal: This supported only in SPI interface mode. Supports maximum frequency of 33MHz. Uses normal read and normal write command.
Fast: Supported in SPI and QPI mode. Uses fast read and normal write.
Quad IO: Supported in SPI and QPI mode. Uses fast quad read and write.
Interface mode
SPI Mode (Serial IO)
QPI Mode (Quad IO)
Operation frequency Source
Interface PLL Clock
ULP Reference Clock
SoC PLL Clock
M4_SOCCLKNOSWLSYNCCLKTREEGATED Clock
Linker configurations#
The text segment, data segment, bss, heap and stack can be placed in PSRAM by installing the respective components present under "PSRAM Linker Configurations" from "SOFTWARE COMPONENTS" GUI. Since PSRAM is already initialized in bootloader, these components can be installed and the respective segments can be placed in PSRAM without installing "PSRAM Core" component and without initializing psram from application.
For more information on configuring available parameters refer to the respective peripheral example readme document.
Usage#
PSRAM Driver and QSPI are initialized by bootloader with Quad IO read-write type and QPI interface. The application is not required to reinitialize PSRAM device and QSPI unless the configurations required are different from the default set by the bootloader.
The PSRAM device handle "PSRAM_Device" of type sl_psram_info_type_t is defined "in sl_si91x_psram_handle.c".
sl_si91x_psram_uninit assumes that PSRAM was initialized with QPI mode and exits QPI mode within definition. If the PSRAM configuration in bootcode has SPI mode enabled, user is expected to comment the exit QPI mode function call in sl_si91x_psram_uninit.
To reconfigure and initliaze PSRAM, set required configurations from PSRAM Core component and call sl_si91x_psram_init within application.
Modules#
Enumerations#
PSRAM return error code.
Variables#
PSRAM Device enum value.
Device ID struct.
Device Density in bits.
Max frequency for normal read.
Max frequency for fast read.
Read-Write type configuration.
SPI Config for QSPI interface.
Default burst wrap size.
Toggle Burst Wrap size.
Functions#
Initialize the PSRAM Device
Uninitialize the PSRAM Device
Reset the PSRAM Device.
Write data to PSRAM in manual mode.
Read data from PSRAM in manual mode.
Write data to PSRAM in manual mode using DMA.
Read data from PSRAM in manual mode using DMA.
Put PSRAM Device in sleep.
Exit PSRAM device from sleep
Enable CTR encryption-decryption on PSRAM.
Macros#
Read ID command.
Enter QPI interface mode command.
Exit QPI interface mode command.
Reset Enable command.
Reset command.
Burst Length Toggle command.
Mode Register Read command.
Mode Register Write command.
Sleep Entry command.
Sleep Exit chip select low pulse width in us.
Sleep Exit chip select low to CLK setup in us.
Minimum sleep duration in us.
Enumeration Documentation#
sl_psram_return_type_t#
sl_psram_return_type_t
PSRAM return error code.
| Enumerator | |
|---|---|
| PSRAM_SUCCESS | No error. |
| PSRAM_FAILURE | Generic error. |
| PSRAM_UNKNOWN | Unknown request. |
| PSRAM_UNKNOWN_DEVICE | Unknown PSRAM Device. |
| PSRAM_CLOCK_INIT_FAILURE | Clock init failure. |
| PSRAM_NOT_INITIALIZED | PSRAM not initialized. |
| PSRAM_SUPPORTED_DEVICE | PSRAM Device supported. |
| PSRAM_DEVICE_MISMATCH | PSRAM Device mismatch. |
| PSRAM_INVALID_HSIZE | Invalid size of element. |
| PSRAM_NULL_ADDRESS | Null address. |
| PSRAM_INVALID_ADDRESS_LENGTH | Invalid address length. |
| PSRAM_AUTO_MODE | PSRAM Auto mode. |
| PSRAM_MANUAL_MODE | PSRAM Manual mode. |
| PSRAM_UNSUPPORTED_SECURITY | Unsupported security. |
| PSRAM_MAX_SEC_SEGMENT_REACH | Maximum secure segment reached. |
78 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_psram_burst_size_type_t#
sl_psram_burst_size_type_t
Wrap burst size enum.
| Enumerator | |
|---|---|
| _WRAP16 | Burst wrap size 16 Bytes. |
| _WRAP32 | Burst wrap size 32 Bytes. |
| _WRAP64 | Burst wrap size 64 Bytes. |
| _WRAP512 | Burst wrap size 512 Bytes. |
97 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_psram_dma_status_type_t#
sl_psram_dma_status_type_t
PSRAM DMA status enum.
| Enumerator | |
|---|---|
| DMA_NONE | DMA status default. |
| DMA_DONE | DMA transfer completed. |
| DMA_FAIL | DMA transfer failed. |
105 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hVariable Documentation#
MFID#
uint8_t sl_psram_id_type_t::MFID
130 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hKGD#
uint8_t sl_psram_id_type_t::KGD
131 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hEID#
uint8_t sl_psram_id_type_t::EID[6]
132 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hdeviceName#
PSRAMDevType sl_psram_info_type_t::deviceName
PSRAM Device enum value.
137 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hdeviceID#
sl_psram_id_type_t sl_psram_info_type_t::deviceID
Device ID struct.
138 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hdevDensity#
uint32_t sl_psram_info_type_t::devDensity
Device Density in bits.
139 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hnormalReadMAXFrequency#
uint32_t sl_psram_info_type_t::normalReadMAXFrequency
Max frequency for normal read.
140 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hfastReadMAXFrequency#
uint32_t sl_psram_info_type_t::fastReadMAXFrequency
Max frequency for fast read.
141 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hrwType#
PSRAMRWType sl_psram_info_type_t::rwType
Read-Write type configuration.
142 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hspi_config#
spi_config_t sl_psram_info_type_t::spi_config
SPI Config for QSPI interface.
143 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hdefaultBurstWrapSize#
uint16_t sl_psram_info_type_t::defaultBurstWrapSize
Default burst wrap size.
144 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.htoggleBurstWrapSize#
uint16_t sl_psram_info_type_t::toggleBurstWrapSize
Toggle Burst Wrap size.
145 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hFunction Documentation#
sl_si91x_psram_init#
sl_psram_return_type_t sl_si91x_psram_init (void )
Initialize the PSRAM Device
| N/A |
Returns
Status Code of the operation
Note
The configurations for initialization are taken from the PSRAM Device config header file. The selection of configuration file happens implicitely based on the radio board selection.
206 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_uninit#
sl_psram_return_type_t sl_si91x_psram_uninit (void )
Uninitialize the PSRAM Device
| N/A |
Returns
Status Code of the operation
217 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_reset#
sl_psram_return_type_t sl_si91x_psram_reset (void )
Reset the PSRAM Device.
| N/A |
Returns
Status Code of the operation
224 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_manual_write_in_blocking_mode#
sl_psram_return_type_t sl_si91x_psram_manual_write_in_blocking_mode (uint32_t addr, void * SourceBuf, uint8_t hSize, uint32_t length)
Write data to PSRAM in manual mode.
| [in] | addr | PSRAM address for write operation |
| [in] | SourceBuf | Reference of the Source buffer |
| [in] | hSize | Size of each element |
| [in] | length | Number of elements for write operation |
Returns
Status Code of the operation
238 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_manual_read_in_blocking_mode#
sl_psram_return_type_t sl_si91x_psram_manual_read_in_blocking_mode (uint32_t addr, void * DestBuf, uint8_t hSize, uint32_t length)
Read data from PSRAM in manual mode.
| [in] | addr | PSRAM address for read operation |
| [in] | DestBuf | Size of each element |
| [in] | hSize | Number of elements for read operation |
| [out] | length | Reference of the Destination buffer |
Returns
Status Code of the operation
255 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_manual_write_in_dma_mode#
sl_psram_return_type_t sl_si91x_psram_manual_write_in_dma_mode (uint32_t addr, void * SourceBuf, uint8_t hSize, uint32_t length, sl_psram_dma_status_type_t * dmastatus)
Write data to PSRAM in manual mode using DMA.
| [in] | addr | PSRAM address for write operation |
| [in] | SourceBuf | Reference of the Source buffer |
| [in] | hSize | Size of each element |
| [in] | length | Number of elements for write operation |
| [out] | dmastatus | DMA operation completion status |
Returns
Status Code of the operation
274 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_manual_read_in_dma_mode#
sl_psram_return_type_t sl_si91x_psram_manual_read_in_dma_mode (uint32_t addr, void * DestBuf, uint8_t hSize, uint32_t length, sl_psram_dma_status_type_t * dmaStatus)
Read data from PSRAM in manual mode using DMA.
| [in] | addr | PSRAM address for read operation |
| [in] | DestBuf | Size of each element |
| [in] | hSize | Number of elements for read operation |
| [out] | length | Reference of the Destination buffer |
| [out] | dmaStatus | DMA operation completion status |
Returns
Status Code of the operation
294 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_sleep#
sl_psram_return_type_t sl_si91x_psram_sleep (void )
Put PSRAM Device in sleep.
| N/A |
Sleep mode is a feature which puts the PSRAM device in an ultra-low power state, while the stored data is retained. Returns
Status Code of the operation
307 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_wakeup#
sl_psram_return_type_t sl_si91x_psram_wakeup (void )
Exit PSRAM device from sleep
| N/A |
Returns
Status Code of the operation
Note
This function call re-initializes the PSRAM device after wakeup sequence.
315 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hsl_si91x_psram_enable_encry_decry#
sl_psram_return_type_t sl_si91x_psram_enable_encry_decry (uint16_t keySize)
Enable CTR encryption-decryption on PSRAM.
| [in] | keySize | Pass 128/256-Bit size |
Returns
Status Code of the operation
323 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hMacro Definition Documentation#
PSRAM_READ_ID#
#define PSRAM_READ_IDValue:
(0x9F)
Read ID command.
36 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_ENTER_QPI#
#define PSRAM_ENTER_QPIValue:
(0x35)
Enter QPI interface mode command.
37 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_EXIT_QPI#
#define PSRAM_EXIT_QPIValue:
(0xF5)
Exit QPI interface mode command.
38 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_RESET_EN#
#define PSRAM_RESET_ENValue:
(0x66)
Reset Enable command.
39 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_RESET#
#define PSRAM_RESETValue:
(0x99)
Reset command.
40 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_BURST_LEN#
#define PSRAM_BURST_LENValue:
(0xC0)
Burst Length Toggle command.
41 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_MODE_REG_READ#
#define PSRAM_MODE_REG_READValue:
(0xB5)
Mode Register Read command.
42 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_MODE_REG_WRITE#
#define PSRAM_MODE_REG_WRITEValue:
(0xB1)
Mode Register Write command.
43 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.hPSRAM_HALF_SLEEP#
#define PSRAM_HALF_SLEEPValue:
(0xC0)
Sleep Entry command.
44 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.htXPHS_US#
#define tXPHS_USValue:
(12)
Sleep Exit chip select low pulse width in us.
69 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.htXHS_US#
#define tXHS_USValue:
(160)
Sleep Exit chip select low to CLK setup in us.
70 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.htHS_US#
#define tHS_USValue:
(8)
Minimum sleep duration in us.
71 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.h