PSRAM GPIO Pin Sets#

Macros#

#define
PSRAM_GPIO_PIN_SET_52_TO_57 1

GPIO Pin Set 52 to 57.

#define
PSRAM_GPIO_PIN_SET_0_TO_5 2

GPIO Pin Set 0 to 5.

#define
PSRAM_GPIO_PIN_SET_46_TO_51_CS_0 3

GPIO Pin Set 46 to 51 with Chip Select 0.

#define
PSRAM_GPIO_PIN_SET_46_TO_51_CS_1 4

GPIO Pin Set 46 to 51 with Chip Select 1.

#define
PSRAM_GPIO_PIN_SET_46_TO_57_CS_0 5

GPIO Pin Set 46 to 57 with Chip Select 0.

#define
PSRAM_GPIO_PIN_SET_46_TO_57_CS_1 6

GPIO Pin Set 46 to 57 with Chip Select 1.

Macro Definition Documentation#

PSRAM_GPIO_PIN_SET_52_TO_57#

#define PSRAM_GPIO_PIN_SET_52_TO_57
Value:
1

GPIO Pin Set 52 to 57.


Definition at line 38 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h

PSRAM_GPIO_PIN_SET_0_TO_5#

#define PSRAM_GPIO_PIN_SET_0_TO_5
Value:
2

GPIO Pin Set 0 to 5.


Definition at line 39 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h

PSRAM_GPIO_PIN_SET_46_TO_51_CS_0#

#define PSRAM_GPIO_PIN_SET_46_TO_51_CS_0
Value:
3

GPIO Pin Set 46 to 51 with Chip Select 0.


Definition at line 40 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h

PSRAM_GPIO_PIN_SET_46_TO_51_CS_1#

#define PSRAM_GPIO_PIN_SET_46_TO_51_CS_1
Value:
4

GPIO Pin Set 46 to 51 with Chip Select 1.


Definition at line 41 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h

PSRAM_GPIO_PIN_SET_46_TO_57_CS_0#

#define PSRAM_GPIO_PIN_SET_46_TO_57_CS_0
Value:
5

GPIO Pin Set 46 to 57 with Chip Select 0.


Definition at line 42 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h

PSRAM_GPIO_PIN_SET_46_TO_57_CS_1#

#define PSRAM_GPIO_PIN_SET_46_TO_57_CS_1
Value:
6

GPIO Pin Set 46 to 57 with Chip Select 1.


Definition at line 43 of file components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h