CMU - Clock Management Unit

Description

Clock management unit (CMU) Peripheral API.

This module contains functions for the CMU peripheral of Silicon Labs 32-bit MCUs and SoCs. The CMU module controls oscillators, clocks gates, clock multiplexers, pre-scalers, calibration modules and wait-states.

Data Structures

struct CMU_LFXOInit_TypeDef
LFXO initialization structure.
struct CMU_HFXOInit_TypeDef
HFXO initialization structure.

Functions

void CMU_UpdateWaitStates (uint32_t freq, int vscale)
Configure various wait states to switch to a certain frequency and a certain voltage scale.
uint32_t getHfxoTuningMode (void)
Get the HFXO tuning mode.
void setHfxoTuningMode (uint32_t mode)
Set the HFXO tuning mode.
void syncReg (uint32_t mask)
Wait for an ongoing sync of register(s) to low-frequency domain to complete.
CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOBandGet (void)
Get the current AUXHFRCO frequency.
void CMU_AUXHFRCOBandSet ( CMU_AUXHFRCOFreq_TypeDef setFreq)
Set AUXHFRCO calibration for the selected target frequency.
uint32_t CMU_Calibrate (uint32_t HFCycles, CMU_Osc_TypeDef reference)
Calibrate the clock.
void CMU_CalibrateConfig (uint32_t downCycles, CMU_Osc_TypeDef downSel, CMU_Osc_TypeDef upSel)
Configure the clock calibration.
uint32_t CMU_CalibrateCountGet (void)
Get the calibration count register.
CMU_ClkDiv_TypeDef CMU_ClockDivGet ( CMU_Clock_TypeDef clock)
Get the clock divisor/prescaler.
void CMU_ClockDivSet ( CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div)
Set the clock divisor/prescaler.
void CMU_ClockEnable ( CMU_Clock_TypeDef clock, bool enable)
Enable/disable a clock.
uint32_t CMU_ClockFreqGet ( CMU_Clock_TypeDef clock)
Get the clock frequency for a clock point.
uint32_t CMU_ClockPrescGet ( CMU_Clock_TypeDef clock)
Get the clock prescaler.
void CMU_ClockPrescSet ( CMU_Clock_TypeDef clock, CMU_ClkPresc_TypeDef presc)
Set the clock prescaler.
CMU_Select_TypeDef CMU_ClockSelectGet ( CMU_Clock_TypeDef clock)
Get the currently selected reference clock used for a clock branch.
void CMU_ClockSelectSet ( CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
Select the reference clock/oscillator used for a clock branch.
uint16_t CMU_LF_ClockPrecisionGet ( CMU_Clock_TypeDef clock)
Gets the precision (in PPM) of the specified low frequency clock branch.
void CMU_FreezeEnable (bool enable)
CMU low frequency register synchronization freeze control.
CMU_HFRCOFreq_TypeDef CMU_HFRCOBandGet (void)
Get the current HFRCO frequency.
void CMU_HFRCOBandSet ( CMU_HFRCOFreq_TypeDef setFreq)
Set the HFRCO calibration for the selected target frequency.
void CMU_HFXOAutostartEnable (uint32_t userSel, bool enEM0EM1Start, bool enEM0EM1StartSel)
Enable or disable HFXO autostart.
void CMU_HFXOInit (const CMU_HFXOInit_TypeDef *hfxoInit)
Set HFXO control registers.
uint32_t CMU_LCDClkFDIVGet (void)
Get the LCD framerate divisor (FDIV) setting.
void CMU_LCDClkFDIVSet (uint32_t div)
Set the LCD framerate divisor (FDIV) setting.
void CMU_LFXOInit (const CMU_LFXOInit_TypeDef *lfxoInit)
Set LFXO control registers.
void CMU_LFXOPrecisionSet (uint16_t precision)
Sets LFXO's crystal precision, in PPM.
void CMU_OscillatorEnable ( CMU_Osc_TypeDef osc, bool enable, bool wait)
Enable/disable oscillator.
uint32_t CMU_OscillatorTuningGet ( CMU_Osc_TypeDef osc)
Get the oscillator frequency tuning setting.
void CMU_OscillatorTuningSet ( CMU_Osc_TypeDef osc, uint32_t val)
Set the oscillator frequency tuning control.
bool CMU_OscillatorTuningWait ( CMU_Osc_TypeDef osc, CMU_HFXOTuningMode_TypeDef mode)
Wait for the oscillator tuning optimization.
bool CMU_OscillatorTuningOptimize ( CMU_Osc_TypeDef osc, CMU_HFXOTuningMode_TypeDef mode, bool wait)
Start and optionally wait for the oscillator tuning optimization.
bool CMU_PCNTClockExternalGet (unsigned int instance)
Determine if the currently selected PCNTn clock used is external or LFBCLK.
void CMU_PCNTClockExternalSet (unsigned int instance, bool external)
Select the PCNTn clock.
void CMU_CalibrateCont (bool enable)
Configure continuous calibration mode.
void CMU_CalibrateStart (void)
Start calibration.
void CMU_CalibrateStop (void)
Stop the calibration counters.
uint32_t CMU_DivToLog2 ( CMU_ClkDiv_TypeDef div)
Convert dividend to logarithmic value.
void CMU_IntClear (uint32_t flags)
Clear one or more pending CMU interrupts.
void CMU_IntDisable (uint32_t flags)
Disable one or more CMU interrupts.
void CMU_IntEnable (uint32_t flags)
Enable one or more CMU interrupts.
uint32_t CMU_IntGet (void)
Get pending CMU interrupts.
uint32_t CMU_IntGetEnabled (void)
Get enabled and pending CMU interrupt flags.
void CMU_IntSet (uint32_t flags)
Set one or more pending CMU interrupts.
void CMU_Lock (void)
Lock the CMU to protect some of its registers against unintended modification.
uint32_t CMU_Log2ToDiv (uint32_t log2)
Convert logarithm of 2 prescaler to division factor.
void CMU_Unlock (void)
Unlock the CMU so that writing to locked registers again is possible.
CMU_HFRCOFreq_TypeDef CMU_HFRCOFreqGet (void)
Get the current HFRCO frequency.
void CMU_HFRCOFreqSet ( CMU_HFRCOFreq_TypeDef setFreq)
Set HFRCO calibration for the selected target frequency.
CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOFreqGet (void)
Get the current AUXHFRCO frequency.
void CMU_AUXHFRCOFreqSet ( CMU_AUXHFRCOFreq_TypeDef setFreq)
Set AUXHFRCO calibration for the selected target frequency.
uint32_t CMU_PrescToLog2 (uint32_t presc)
Convert prescaler dividend to a logarithmic value.

Macros

#define cmuClkDiv_1 1
Clock divisors.
#define cmuClkDiv_2 2
Divide clock by 2.
#define cmuClkDiv_4 4
Divide clock by 4.
#define cmuClkDiv_8 8
Divide clock by 8.
#define cmuClkDiv_16 16
Divide clock by 16.
#define cmuClkDiv_32 32
Divide clock by 32.
#define cmuClkDiv_64 64
Divide clock by 64.
#define cmuClkDiv_128 128
Divide clock by 128.
#define cmuClkDiv_256 256
Divide clock by 256.
#define cmuClkDiv_512 512
Divide clock by 512.
#define cmuClkDiv_1024 1024
Divide clock by 1024.
#define cmuClkDiv_2048 2048
Divide clock by 2048.
#define cmuClkDiv_4096 4096
Divide clock by 4096.
#define cmuClkDiv_8192 8192
Divide clock by 8192.
#define cmuClkDiv_16384 16384
Divide clock by 16384.
#define cmuClkDiv_32768 32768
Divide clock by 32768.
#define CMU_HFRCO_MIN cmuHFRCOFreq_1M0Hz
HFRCO minimum frequency.
#define CMU_HFRCO_MAX cmuHFRCOFreq_38M0Hz
HFRCO maximum frequency.
#define CMU_AUXHFRCO_MIN cmuAUXHFRCOFreq_1M0Hz
AUXHFRCO minimum frequency.
#define CMU_AUXHFRCO_MAX cmuAUXHFRCOFreq_38M0Hz
AUXHFRCO maximum frequency.
#define CMU_LFXOINIT_DEFAULT
Default LFXO initialization values.
#define CMU_LFXOINIT_EXTERNAL_CLOCK
Default LFXO initialization for external clock.
#define CMU_HFXOINIT_DEFAULT
Default HFXO initialization values for Platform 2 devices, which contain a separate HFXOCTRL register.
#define CMU_HFXOINIT_EXTERNAL_CLOCK
Init of HFXO with external clock.

Typedefs

typedef uint32_t CMU_ClkDiv_TypeDef
Clock divider configuration.
typedef uint32_t CMU_ClkPresc_TypeDef
Clockprescaler configuration.

Enumerations

enum CMU_HFRCOFreq_TypeDef {
cmuHFRCOFreq_1M0Hz = 1000000U,
cmuHFRCOFreq_2M0Hz = 2000000U,
cmuHFRCOFreq_4M0Hz = 4000000U,
cmuHFRCOFreq_7M0Hz = 7000000U,
cmuHFRCOFreq_13M0Hz = 13000000U,
cmuHFRCOFreq_16M0Hz = 16000000U,
cmuHFRCOFreq_19M0Hz = 19000000U,
cmuHFRCOFreq_26M0Hz = 26000000U,
cmuHFRCOFreq_32M0Hz = 32000000U,
cmuHFRCOFreq_38M0Hz = 38000000U,
cmuHFRCOFreq_UserDefined = 0
}
High-frequency system RCO bands.
enum CMU_AUXHFRCOFreq_TypeDef {
cmuAUXHFRCOFreq_1M0Hz = 1000000U,
cmuAUXHFRCOFreq_2M0Hz = 2000000U,
cmuAUXHFRCOFreq_4M0Hz = 4000000U,
cmuAUXHFRCOFreq_7M0Hz = 7000000U,
cmuAUXHFRCOFreq_13M0Hz = 13000000U,
cmuAUXHFRCOFreq_16M0Hz = 16000000U,
cmuAUXHFRCOFreq_19M0Hz = 19000000U,
cmuAUXHFRCOFreq_26M0Hz = 26000000U,
cmuAUXHFRCOFreq_32M0Hz = 32000000U,
cmuAUXHFRCOFreq_38M0Hz = 38000000U,
cmuAUXHFRCOFreq_UserDefined = 0
}
AUX high-frequency RCO bands.
enum CMU_Clock_TypeDef {
cmuClock_HF ,
cmuClock_DBG ,
cmuClock_AUX ,
cmuClock_EXPORT ,
cmuClock_BUS ,
cmuClock_CRYPTO ,
cmuClock_LDMA ,
cmuClock_GPCRC ,
cmuClock_GPIO ,
cmuClock_HFLE ,
cmuClock_PRS ,
cmuClock_HFPER ,
cmuClock_USART0 ,
cmuClock_USART1 ,
cmuClock_TIMER0 ,
cmuClock_TIMER1 ,
cmuClock_CRYOTIMER ,
cmuClock_ACMP0 ,
cmuClock_ACMP1 ,
cmuClock_IDAC0 ,
cmuClock_ADC0 ,
cmuClock_I2C0 ,
cmuClock_CORE ,
cmuClock_LFA ,
cmuClock_LETIMER0 ,
cmuClock_PCNT0 ,
cmuClock_LFB ,
cmuClock_LEUART0 ,
cmuClock_LFE ,
cmuClock_RTCC ,
cmuClock_ADC0ASYNC
}
Clock points in CMU.
enum CMU_Osc_TypeDef {
cmuOsc_LFXO ,
cmuOsc_LFRCO ,
cmuOsc_HFXO ,
cmuOsc_HFRCO ,
cmuOsc_AUXHFRCO ,
cmuOsc_ULFRCO
}
Oscillator types.
enum CMU_OscMode_TypeDef {
cmuOscMode_Crystal ,
cmuOscMode_AcCoupled ,
cmuOscMode_External
}
Oscillator modes.
enum CMU_Select_TypeDef {
cmuSelect_Error ,
cmuSelect_Disabled ,
cmuSelect_LFXO ,
cmuSelect_LFRCO ,
cmuSelect_HFXO ,
cmuSelect_HFRCO ,
cmuSelect_HFCLKLE ,
cmuSelect_AUXHFRCO ,
cmuSelect_HFSRCCLK ,
cmuSelect_HFCLK ,
cmuSelect_ULFRCO
}
Selectable clock sources.
enum CMU_HFXOTuningMode_TypeDef {
cmuHFXOTuningMode_Auto = 0,
cmuHFXOTuningMode_PeakDetectCommand = CMU_CMD_HFXOPEAKDETSTART,
cmuHFXOTuningMode_ShuntCommand = CMU_CMD_HFXOSHUNTOPTSTART,
cmuHFXOTuningMode_PeakShuntCommand
}
HFXO tuning modes.

Function Documentation

CMU_UpdateWaitStates()

void CMU_UpdateWaitStates ( uint32_t freq,
int vscale
)

Configure various wait states to switch to a certain frequency and a certain voltage scale.

This function will set up the necessary flash, bus, and RAM wait states. Updating the wait state configuration must be done before increasing the clock frequency and it must be done after decreasing the clock frequency. Updating the wait state configuration must be done before core voltage is decreased and it must be done after a core voltage is increased.

Parameters
[in] freq The core clock frequency to configure wait-states.
[in] vscale The voltage scale to configure wait-states. Expected values are 0 or 2, higher number is lower voltage.
  • 0 = 1.2 V (VSCALE2)
  • 2 = 1.0 V (VSCALE0)

getHfxoTuningMode()

uint32_t getHfxoTuningMode ( void )
inline

Get the HFXO tuning mode.

Returns
The current HFXO tuning mode from the HFXOCTRL register.

setHfxoTuningMode()

void setHfxoTuningMode ( uint32_t mode )
inline

Set the HFXO tuning mode.

Parameters
[in] mode The new HFXO tuning mode. This can be HFXO_TUNING_MODE_AUTO or HFXO_TUNING_MODE_CMD.

syncReg()

void syncReg ( uint32_t mask )
inline

Wait for an ongoing sync of register(s) to low-frequency domain to complete.

Parameters
[in] mask A bitmask corresponding to SYNCBUSY register defined bits, indicating registers that must complete any ongoing synchronization.

CMU_AUXHFRCOBandGet()

CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOBandGet ( void )

Get the current AUXHFRCO frequency.

Returns
AUXHFRCO frequency.

CMU_AUXHFRCOBandSet()

void CMU_AUXHFRCOBandSet ( CMU_AUXHFRCOFreq_TypeDef setFreq )

Set AUXHFRCO calibration for the selected target frequency.

Parameters
[in] setFreq AUXHFRCO frequency to set

CMU_Calibrate()

uint32_t CMU_Calibrate ( uint32_t HFCycles,
CMU_Osc_TypeDef reference
)

Calibrate the clock.

Run a calibration for HFCLK against a selectable reference clock. See the reference manual, CMU chapter, for more details.

Note
This function will not return until the calibration measurement is completed.
Parameters
[in] HFCycles The number of HFCLK cycles to run the calibration. Increasing this number increases precision but the calibration will take more time.
[in] reference The reference clock used to compare HFCLK.
Returns
The number of ticks the reference clock after HFCycles ticks on the HF clock.

CMU_CalibrateConfig()

void CMU_CalibrateConfig ( uint32_t downCycles,
CMU_Osc_TypeDef downSel,
CMU_Osc_TypeDef upSel
)

Configure the clock calibration.

Configure a calibration for a selectable clock source against another selectable reference clock. See the reference manual, CMU chapter, for more details.

Note
After configuration, a call to CMU_CalibrateStart() is required and the resulting calibration value can be read out with the CMU_CalibrateCountGet() function call.
Parameters
[in] downCycles The number of downSel clock cycles to run the calibration. Increasing this number increases precision but the calibration will take more time.
[in] downSel The clock, which will be counted down downCycles.
[in] upSel The reference clock; the number of cycles generated by this clock will be counted and added up and the result can be given with the CMU_CalibrateCountGet() function call.

CMU_CalibrateCountGet()

uint32_t CMU_CalibrateCountGet ( void )

Get the calibration count register.

Note
If continuous calibration mode is active, calibration busy will almost always be off and only the value needs to be read. In a normal case, this function call is triggered by the CALRDY interrupt flag.
Returns
The calibration count, the number of UPSEL clocks in the period of DOWNSEL oscillator clock cycles configured by a previous write operation to CMU->CALCNT.

CMU_ClockDivGet()

Get the clock divisor/prescaler.

Parameters
[in] clock A clock point to get the divisor/prescaler for. Notice that not all clock points have a divisor/prescaler. See the CMU overview in the reference manual.
Returns
The current clock point divisor/prescaler. 1 is returned if clock specifies a clock point without a divisor/prescaler.

CMU_ClockDivSet()

void CMU_ClockDivSet ( CMU_Clock_TypeDef clock,
CMU_ClkDiv_TypeDef div
)

Set the clock divisor/prescaler.

Note
If setting an LF clock prescaler, synchronization into the low-frequency domain is required. If the same register is modified before a previous update has completed, this function will stall until the previous synchronization has completed. See CMU_FreezeEnable() for a suggestion on how to reduce the stalling time in some use cases.

HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.

Parameters
[in] clock Clock point to set divisor/prescaler for. Notice that not all clock points have a divisor/prescaler. See the CMU overview in the reference manual.
[in] div The clock divisor to use (<= cmuClkDiv_512).

CMU_ClockEnable()

void CMU_ClockEnable ( CMU_Clock_TypeDef clock,
bool enable
)

Enable/disable a clock.

In general, module clocking is disabled after a reset. If a module clock is disabled, the registers of that module are not accessible and reading from such registers may return undefined values. Writing to registers of clock-disabled modules has no effect. Avoid accessing module registers of a module with a disabled clock.

Note
If enabling/disabling an LF clock, synchronization into the low-frequency domain is required. If the same register is modified before a previous update has completed, this function will stall until the previous synchronization has completed. See CMU_FreezeEnable() for a suggestion on how to reduce the stalling time in some use cases.

HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.

Parameters
[in] clock The clock to enable/disable. Notice that not all defined clock points have separate enable/disable control. See the CMU overview in the reference manual.
[in] enable
  • true - enable specified clock.
  • false - disable specified clock.

CMU_ClockFreqGet()

uint32_t CMU_ClockFreqGet ( CMU_Clock_TypeDef clock )

Get the clock frequency for a clock point.

Parameters
[in] clock A clock point to fetch the frequency for.
Returns
The current frequency in Hz.

CMU_ClockPrescGet()

uint32_t CMU_ClockPrescGet ( CMU_Clock_TypeDef clock )

Get the clock prescaler.

Parameters
[in] clock A clock point to get the prescaler for. Notice that not all clock points have a prescaler. See the CMU overview in the reference manual.
Returns
The prescaler value of the current clock point. 0 is returned if clock specifies a clock point without a prescaler.

CMU_ClockPrescSet()

void CMU_ClockPrescSet ( CMU_Clock_TypeDef clock,
CMU_ClkPresc_TypeDef presc
)

Set the clock prescaler.

Note
If setting an LF clock prescaler, synchronization into the low-frequency domain is required. If the same register is modified before a previous update has completed, this function will stall until the previous synchronization has completed. See CMU_FreezeEnable() for a suggestion on how to reduce the stalling time in some use cases.

HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.

Parameters
[in] clock A clock point to set the prescaler for. Notice that not all clock points have a prescaler. See the CMU overview in the reference manual.
[in] presc The clock prescaler.

CMU_ClockSelectGet()

CMU_Select_TypeDef CMU_ClockSelectGet ( CMU_Clock_TypeDef clock )

Get the currently selected reference clock used for a clock branch.

Parameters
[in] clock Clock branch to fetch selected ref. clock for. One of:
Returns
The reference clock used for clocking the selected branch, cmuSelect_Error if invalid clock provided.

CMU_ClockSelectSet()

void CMU_ClockSelectSet ( CMU_Clock_TypeDef clock,
CMU_Select_TypeDef ref
)

Select the reference clock/oscillator used for a clock branch.

Notice that if a selected reference is not enabled prior to selecting its use, it will be enabled and this function will wait for the selected oscillator to be stable. It will however NOT be disabled if another reference clock is selected later.

This feature is particularly important if selecting a new reference clock for the clock branch clocking the core. Otherwise, the system may halt.

Note
HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.
Parameters
[in] clock A clock branch to select reference clock for. One of:
[in] ref A reference selected for clocking. See the reference manual for details about references available for a specific clock branch.

CMU_LF_ClockPrecisionGet()

uint16_t CMU_LF_ClockPrecisionGet ( CMU_Clock_TypeDef clock )

Gets the precision (in PPM) of the specified low frequency clock branch.

Parameters
[in] clock Clock branch.
Returns
Precision, in PPM, of the specified clock branch.
Note
This function is only for internal usage.
The current implementation of this function is used to determine if the clock has a precision <= 500 ppm or not (which is the minimum required for BLE). Future version of this function should provide more accurate precision numbers to allow for further optimizations from the stacks.

CMU_FreezeEnable()

void CMU_FreezeEnable ( bool enable )

CMU low frequency register synchronization freeze control.

Some CMU registers require synchronization into the low-frequency (LF) domain. The freeze feature allows for several such registers to be modified before passing them to the LF domain simultaneously (which takes place when the freeze mode is disabled).

Another use case for this feature is using an API (such as the CMU API) for modifying several bit fields consecutively in the same register. If freeze mode is enabled during this sequence, stalling can be avoided.

Note
When enabling freeze mode, this function will wait for all current ongoing CMU synchronization to LF domain to complete (normally synchronization will not be in progress.) However, for this reason, when using freeze mode, modifications of registers requiring LF synchronization should be done within one freeze enable/disable block to avoid unnecessary stalling.
Parameters
[in] enable
  • true - enable freeze, modified registers are not propagated to the LF domain
  • false - disable freeze, modified registers are propagated to the LF domain