VDAC_Init_TypeDef Struct Reference

VDAC initialization structure, common for both channels.

#include <em_vdac.h>

Data Fields

bool mainCalibration
 Selects between main and alternate output path calibration values.
 
bool asyncClockMode
 Selects clock from asynchronous or synchronous (with respect to peripheral clock) source.
 
bool warmupKeepOn
 Warm-up mode, keep VDAC on (in idle) - or shutdown between conversions.
 
VDAC_Refresh_TypeDef refresh
 Channel refresh period.
 
uint32_t prescaler
 Prescaler for VDAC clock.
 
VDAC_Ref_TypeDef reference
 Reference voltage to use.
 
bool ch0ResetPre
 Enable/disable reset of prescaler on CH 0 start.
 
bool outEnablePRS
 Enable/disable output enable control by CH1 PRS signal.
 
bool sineEnable
 Enable/disable sine mode.
 
bool diff
 Select if single ended or differential output mode.
 

VDAC initialization structure, common for both channels.

Field Documentation

◆ mainCalibration

bool VDAC_Init_TypeDef::mainCalibration

Selects between main and alternate output path calibration values.

◆ asyncClockMode

bool VDAC_Init_TypeDef::asyncClockMode

Selects clock from asynchronous or synchronous (with respect to peripheral clock) source.

◆ warmupKeepOn

bool VDAC_Init_TypeDef::warmupKeepOn

Warm-up mode, keep VDAC on (in idle) - or shutdown between conversions.

◆ refresh

VDAC_Refresh_TypeDef VDAC_Init_TypeDef::refresh

Channel refresh period.

◆ prescaler

uint32_t VDAC_Init_TypeDef::prescaler

Prescaler for VDAC clock.

Clock is source clock divided by prescaler+1.

◆ reference

VDAC_Ref_TypeDef VDAC_Init_TypeDef::reference

Reference voltage to use.

◆ ch0ResetPre

bool VDAC_Init_TypeDef::ch0ResetPre

Enable/disable reset of prescaler on CH 0 start.

◆ outEnablePRS

bool VDAC_Init_TypeDef::outEnablePRS

Enable/disable output enable control by CH1 PRS signal.

◆ sineEnable

bool VDAC_Init_TypeDef::sineEnable

Enable/disable sine mode.

◆ diff

bool VDAC_Init_TypeDef::diff

Select if single ended or differential output mode.