CMU_TypeDef Struct ReferenceDevices > CMU

CMU Register Declaration

Definition at line 49 of file efr32fg1p_cmu.h .

#include < efr32fg1p_cmu.h >

Data Fields

__IOM uint32_t ADCCTRL
__IOM uint32_t AUXHFRCOCTRL
__IOM uint32_t CALCNT
__IOM uint32_t CALCTRL
__IOM uint32_t CMD
__IOM uint32_t CTRL
__IOM uint32_t DBGCLKSEL
__IOM uint32_t FREEZE
__IOM uint32_t HFBUSCLKEN0
__IOM uint32_t HFCLKSEL
__IM uint32_t HFCLKSTATUS
__IOM uint32_t HFCOREPRESC
__IOM uint32_t HFEXPPRESC
__IOM uint32_t HFPERCLKEN0
__IOM uint32_t HFPERPRESC
__IOM uint32_t HFPRESC
__IOM uint32_t HFRCOCTRL
__IOM uint32_t HFXOCTRL
__IOM uint32_t HFXOCTRL1
__IOM uint32_t HFXOSTARTUPCTRL
__IOM uint32_t HFXOSTEADYSTATECTRL
__IOM uint32_t HFXOTIMEOUTCTRL
__IM uint32_t HFXOTRIMSTATUS
__IOM uint32_t IEN
__IM uint32_t IF
__IOM uint32_t IFC
__IOM uint32_t IFS
__IOM uint32_t LFACLKEN0
__IOM uint32_t LFACLKSEL
__IOM uint32_t LFAPRESC0
__IOM uint32_t LFBCLKEN0
__IOM uint32_t LFBCLKSEL
__IOM uint32_t LFBPRESC0
__IOM uint32_t LFECLKEN0
__IOM uint32_t LFECLKSEL
__IOM uint32_t LFEPRESC0
__IOM uint32_t LFRCOCTRL
__IOM uint32_t LFXOCTRL
__IOM uint32_t LOCK
__IOM uint32_t OSCENCMD
__IOM uint32_t PCNTCTRL
uint32_t RESERVED0 [3U]
uint32_t RESERVED1 [1U]
uint32_t RESERVED10 [7U]
uint32_t RESERVED11 [1U]
uint32_t RESERVED12 [1U]
uint32_t RESERVED13 [3U]
uint32_t RESERVED14 [1U]
uint32_t RESERVED15 [1U]
uint32_t RESERVED16 [2U]
uint32_t RESERVED17 [1U]
uint32_t RESERVED18 [1U]
uint32_t RESERVED19 [3U]
uint32_t RESERVED2 [1U]
uint32_t RESERVED20 [2U]
uint32_t RESERVED21 [2U]
uint32_t RESERVED22 [4U]
uint32_t RESERVED23 [2U]
uint32_t RESERVED3 [4U]
uint32_t RESERVED4 [2U]
uint32_t RESERVED5 [2U]
uint32_t RESERVED6 [2U]
uint32_t RESERVED7 [1U]
uint32_t RESERVED8 [1U]
uint32_t RESERVED9 [3U]
__IOM uint32_t ROUTELOC0
__IOM uint32_t ROUTEPEN
__IM uint32_t STATUS
__IM uint32_t SYNCBUSY
__IOM uint32_t ULFRCOCTRL

Field Documentation

__IOM uint32_t CMU_TypeDef::ADCCTRL

ADC Control Register

Definition at line 127 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::AUXHFRCOCTRL

AUXHFRCO Control Register

Definition at line 56 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::CALCNT

Calibration Counter Register

Definition at line 70 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::CALCTRL

Calibration Control Register

Definition at line 69 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::CMD

Command Register

Definition at line 73 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::CTRL

CMU Control Register

Definition at line 50 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::DBGCLKSEL

Debug Trace Clock Select

Definition at line 75 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::FREEZE

Freeze Register

Definition at line 122 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFBUSCLKEN0

High Frequency Bus Clock Enable Register 0

Definition at line 91 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFCLKSEL

High Frequency Clock Select Command Register

Definition at line 76 of file efr32fg1p_cmu.h .

__IM uint32_t CMU_TypeDef::HFCLKSTATUS

HFCLK Status Register

Definition at line 84 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFCOREPRESC

High Frequency Core Clock Prescaler Register

Definition at line 107 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFEXPPRESC

High Frequency Export Clock Prescaler Register

Definition at line 111 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFPERCLKEN0

High Frequency Peripheral Clock Enable Register 0

Definition at line 94 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFPERPRESC

High Frequency Peripheral Clock Prescaler Register

Definition at line 108 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFPRESC

High Frequency Clock Prescaler Register

Definition at line 104 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFRCOCTRL

HFRCO Control Register

Definition at line 53 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFXOCTRL

HFXO Control Register

Definition at line 60 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFXOCTRL1

HFXO Control 1

Definition at line 61 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFXOSTARTUPCTRL

HFXO Startup Control

Definition at line 62 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFXOSTEADYSTATECTRL

HFXO Steady State Control

Definition at line 63 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::HFXOTIMEOUTCTRL

HFXO Timeout Control

Definition at line 64 of file efr32fg1p_cmu.h .

__IM uint32_t CMU_TypeDef::HFXOTRIMSTATUS

HFXO Trim Status

Definition at line 86 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::IEN

Interrupt Enable Register

Definition at line 90 of file efr32fg1p_cmu.h .

__IM uint32_t CMU_TypeDef::IF

Interrupt Flag Register

Definition at line 87 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 89 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 88 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFACLKEN0

Low Frequency a Clock Enable Register 0 (Async Reg)

Definition at line 97 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFACLKSEL

Low Frequency A Clock Select Register

Definition at line 78 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFAPRESC0

Low Frequency a Prescaler Register 0 (Async Reg)

Definition at line 114 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFBCLKEN0

Low Frequency B Clock Enable Register 0 (Async Reg)

Definition at line 99 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFBCLKSEL

Low Frequency B Clock Select Register

Definition at line 79 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFBPRESC0

Low Frequency B Prescaler Register 0 (Async Reg)

Definition at line 116 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFECLKEN0

Low Frequency E Clock Enable Register 0 (Async Reg)

Definition at line 102 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFECLKSEL

Low Frequency E Clock Select Register

Definition at line 80 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFEPRESC0

Low Frequency E Prescaler Register 0 (Async Reg)

Definition at line 118 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFRCOCTRL

LFRCO Control Register

Definition at line 59 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LFXOCTRL

LFXO Control Register

Definition at line 65 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::LOCK

Configuration Lock Register

Definition at line 134 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::OSCENCMD

Oscillator Enable/Disable Command Register

Definition at line 72 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::PCNTCTRL

PCNT Control Register

Definition at line 124 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED0[3U]

Reserved for future use

Definition at line 52 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED1[1U]

Reserved for future use

Definition at line 55 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED10[7U]

Reserved for future use

Definition at line 96 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED11[1U]

Reserved for future use

Definition at line 98 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED12[1U]

Reserved for future use

Definition at line 101 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED13[3U]

Reserved for future use

Definition at line 103 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED14[1U]

Reserved for future use

Definition at line 106 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED15[1U]

Reserved for future use

Definition at line 110 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED16[2U]

Reserved for future use

Definition at line 113 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED17[1U]

Reserved for future use

Definition at line 115 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED18[1U]

Reserved for future use

Definition at line 117 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED19[3U]

Reserved for future use

Definition at line 120 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED2[1U]

Reserved for future use

Definition at line 58 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED20[2U]

Reserved for future use

Definition at line 123 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED21[2U]

Reserved for future use

Definition at line 126 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED22[4U]

Reserved for future use

Definition at line 129 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED23[2U]

Reserved for future use

Definition at line 133 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED3[4U]

Reserved for future use

Definition at line 68 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED4[2U]

Reserved for future use

Definition at line 71 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED5[2U]

Reserved for future use

Definition at line 74 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED6[2U]

Reserved for future use

Definition at line 77 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED7[1U]

Reserved for future use

Definition at line 82 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED8[1U]

Reserved for future use

Definition at line 85 of file efr32fg1p_cmu.h .

uint32_t CMU_TypeDef::RESERVED9[3U]

Reserved for future use

Definition at line 93 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::ROUTELOC0

I/O Routing Location Register

Definition at line 131 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::ROUTEPEN

I/O Routing Pin Enable Register

Definition at line 130 of file efr32fg1p_cmu.h .

__IM uint32_t CMU_TypeDef::STATUS

Status Register

Definition at line 83 of file efr32fg1p_cmu.h .

__IM uint32_t CMU_TypeDef::SYNCBUSY

Synchronization Busy Register

Definition at line 121 of file efr32fg1p_cmu.h .

__IOM uint32_t CMU_TypeDef::ULFRCOCTRL

ULFRCO Control Register

Definition at line 66 of file efr32fg1p_cmu.h .

The documentation for this struct was generated from the following file:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFR32FG1P/Include/ efr32fg1p_cmu.h