EFR32XG2X#
Types specific to the EFR32 for dealing with the on-chip PAs.
Macros#
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when using a SUBGHZ PA mode.
The minimum valid value for the RAIL_TxPowerLevel_t when using a SUBGHZ PA mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.
Backwards compatability define.
Backwards compatability define.
Backwards compatability define.
Backwards compatability define.
Backwards compatability define.
Backwards compatability define.
Backwards compatability define.
Backwards compatability define.
The number of PA's on this chip.
Macro Definition Documentation#
RAIL_TX_POWER_LEVEL_2P4_HP_MAX#
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAXValue:
(240)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.
709 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_HP_MIN#
#define RAIL_TX_POWER_LEVEL_2P4_HP_MINValue:
(1U)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.
714 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_MP_MAX#
#define RAIL_TX_POWER_LEVEL_2P4_MP_MAXValue:
(RAIL_TX_POWER_LEVEL_2P4_HP_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.
719 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_MP_MIN#
#define RAIL_TX_POWER_LEVEL_2P4_MP_MINValue:
(RAIL_TX_POWER_LEVEL_2P4_HP_MIN)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.
724 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_LP_MAX#
#define RAIL_TX_POWER_LEVEL_2P4_LP_MAXValue:
(RAIL_TX_POWER_LEVEL_2P4_HP_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.
729 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_LP_MIN#
#define RAIL_TX_POWER_LEVEL_2P4_LP_MINValue:
(RAIL_TX_POWER_LEVEL_2P4_HP_MIN)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.
734 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_LLP_MAX#
#define RAIL_TX_POWER_LEVEL_2P4_LLP_MAXValue:
(RAIL_TX_POWER_LEVEL_2P4_HP_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.
739 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_2P4_LLP_MIN#
#define RAIL_TX_POWER_LEVEL_2P4_LLP_MINValue:
(RAIL_TX_POWER_LEVEL_2P4_HP_MIN)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.
744 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_SUBGIG_MAX#
#define RAIL_SUBGIG_MAXValue:
0U
The maximum valid value for the RAIL_TxPowerLevel_t when using a SUBGHZ PA mode.
759 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_SUBGIG_MIN#
#define RAIL_SUBGIG_MINValue:
1U
The minimum valid value for the RAIL_TxPowerLevel_t when using a SUBGHZ PA mode.
767 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX#
#define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAXValue:
(RAIL_SUBGIG_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.
773 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN#
#define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MINValue:
(RAIL_SUBGIG_MIN)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.
778 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_MP_MAX#
#define RAIL_TX_POWER_LEVEL_SUBGIG_MP_MAXValue:
(RAIL_SUBGIG_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.
783 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_MP_MIN#
#define RAIL_TX_POWER_LEVEL_SUBGIG_MP_MINValue:
(RAIL_SUBGIG_MIN)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.
788 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_LP_MAX#
#define RAIL_TX_POWER_LEVEL_SUBGIG_LP_MAXValue:
(RAIL_SUBGIG_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.
793 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_LP_MIN#
#define RAIL_TX_POWER_LEVEL_SUBGIG_LP_MINValue:
(RAIL_SUBGIG_MIN)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.
798 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_LLP_MAX#
#define RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MAXValue:
(RAIL_SUBGIG_MAX)
The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.
803 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_LLP_MIN#
#define RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MINValue:
(RAIL_SUBGIG_MIN)
The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.
808 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_HP_MAX#
#define RAIL_TX_POWER_LEVEL_HP_MAXValue:
RAIL_TX_POWER_LEVEL_2P4_HP_MAX
Backwards compatability define.
830 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_HP_MIN#
#define RAIL_TX_POWER_LEVEL_HP_MINValue:
RAIL_TX_POWER_LEVEL_2P4_HP_MIN
Backwards compatability define.
832 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_MP_MAX#
#define RAIL_TX_POWER_LEVEL_MP_MAXValue:
RAIL_TX_POWER_LEVEL_2P4_MP_MAX
Backwards compatability define.
834 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_MP_MIN#
#define RAIL_TX_POWER_LEVEL_MP_MINValue:
RAIL_TX_POWER_LEVEL_2P4_MP_MIN
Backwards compatability define.
836 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_LP_MAX#
#define RAIL_TX_POWER_LEVEL_LP_MAXValue:
RAIL_TX_POWER_LEVEL_2P4_LP_MAX
Backwards compatability define.
838 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_LP_MIN#
#define RAIL_TX_POWER_LEVEL_LP_MINValue:
RAIL_TX_POWER_LEVEL_2P4_LP_MIN
Backwards compatability define.
840 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_MAX#
#define RAIL_TX_POWER_LEVEL_SUBGIG_MAXValue:
RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX
Backwards compatability define.
842 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_TX_POWER_LEVEL_SUBGIG_MIN#
#define RAIL_TX_POWER_LEVEL_SUBGIG_MINValue:
RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN
Backwards compatability define.
844 of file chip/efr32/efr32xg2x/rail_chip_specific.hRAIL_NUM_PA#
#define RAIL_NUM_PAValue:
(3U)
The number of PA's on this chip.
(Including Virtual PAs)
862 of file chip/efr32/efr32xg2x/rail_chip_specific.h