Configures the automatic PRS LNA bypass.

Public Attributes#

uint32_t
timeoutUs

Maximum time in microseconds to wait for frame detection after the LNA has been bypassed.

uint8_t
threshold

Threshold (without unit) from which LNA bypass is turned on.

uint8_t
deltaRssiDbm

Compensation in dBm applied by RAIL to RSSI during LNA bypass.

uint8_t
prsChannel

PRS Channel used for the bypass.

bool
polarity

PRS signal polarity for bypass.

Public Attribute Documentation#

timeoutUs#

uint32_t RAIL_PrsLnaBypassConfig_t::timeoutUs

Maximum time in microseconds to wait for frame detection after the LNA has been bypassed.

It must be greater than 0 to enable automatic PRS LNA bypass with RAIL_EnablePrsLnaBypass().


Definition at line 4374 of file common/rail_types.h

threshold#

uint8_t RAIL_PrsLnaBypassConfig_t::threshold

Threshold (without unit) from which LNA bypass is turned on.

The table below shows EFR32XG25 thresholds corresponding to received power level without the LNA gain.

Level dB

FSK_1a

FSK_1b

FSK_2a

FSK_2b

FSK_3

FSK_4a

FSK_4b

FSK_5

OFDM1

OFDM2

OFDM3

OFDM4

-25

9

9

9

10

-20

7

7

7

8

8

7

8

11

12

12

12

-15

7

10

10

10

9

9

10

10

14

14

14

15

-10

9

12

12

12

12

12

12

12

16

16

16

16

-5

11

14

14

14

16

16

14

16

0

14

17

18

17

17

18

18

18

For example, with OFDM1 PHY, setting the threshold to 11 will turn on the bypass when the power level at EFR32XG25 input is greater than -20 dB.


Definition at line 4392 of file common/rail_types.h

deltaRssiDbm#

uint8_t RAIL_PrsLnaBypassConfig_t::deltaRssiDbm

Compensation in dBm applied by RAIL to RSSI during LNA bypass.

The RSSI offset set using RAIL_SetRssiOffset() must corespond to the case with FEM LNA not bypassed. deltaRssiDbm is typically the FEM LNA gain value.


Definition at line 4399 of file common/rail_types.h

prsChannel#

uint8_t RAIL_PrsLnaBypassConfig_t::prsChannel

PRS Channel used for the bypass.

PRS_GetFreeChannel() can be use to find a free channel. Then the signal can be routed to GPIO pin and port using PRS_PinOutput(). This allows logical operations with other PRS channels and so to adapt to the FEM control logic table. Any call to PRS_Combine() with RAIL_PrsLnaBypassConfig_t::prsChannel as chA must be done after the RAIL_EnablePrsLnaBypass() call.


Definition at line 4409 of file common/rail_types.h

polarity#

bool RAIL_PrsLnaBypassConfig_t::polarity

PRS signal polarity for bypass.

With a polarity of 1, PRS signal is set to 1 for bypass and 0 for un-bypass. with a polarity of 0, PRS signal is set to 0 for bypass and 1 for un-bypass.


Definition at line 4416 of file common/rail_types.h