Generic Serial Peripheral Interface (GSPI) Appendix#

This appendix provides reference material for the Generic Serial Peripheral Interface (GSPI). It includes a glossary of terms, a list of acronyms, answers to frequently asked questions (FAQs), and links to supporting documentation. Use this section as a quick reference while developing or troubleshooting GSPI-based applications.

Glossary#

The glossary defines key GSPI-related terms. Use it to understand terminology in the documentation and code.

Term

Description

Bit Rate

The frequency of data transmission in bits per second.

Blocking Transfer

A transfer that waits for completion before returning.

Clock Phase (CPHA)

Determines when data is sampled relative to the clock edge.

Clock Polarity (CPOL)

Determines the idle state of the serial clock.

Chip Select (CS)

A signal used to select the target Secondary device.

Direct Memory Access (DMA)

A method for transferring data without Central Processing Unit (CPU) intervention.

First In, First Out (FIFO)

A data buffer structure used in the GSPI peripheral.

Full-Duplex

Simultaneous bidirectional data transmission.

Generic Serial Peripheral Interface (GSPI)

A high-performance serial interface controller for external devices.

Primary

The device that initiates and controls serial transfers.

Master In, Slave Out (MISO)

A data line from the Secondary to the Primary device.

Master Out, Slave In (MOSI)

A data line from the Primary to the Secondary device.

Non-Blocking Transfer

A transfer that returns immediately and uses callbacks for completion.

Secondary

The device that responds to transfers initiated by the Primary device.

Serial Peripheral Interface (SPI)

A synchronous serial communication protocol.

Acronyms#

This section lists acronyms used in the GSPI documentation. Expanded definitions are provided below.

Acronym

Description

APB

Advanced Peripheral Bus

API

Application Programming Interface

CPU

Central Processing Unit

CS

Chip Select

DMA

Direct Memory Access

FIFO

First In, First Out

GPIO

General Purpose Input/Output

GSPI

Generic Serial Peripheral Interface

kHz

Kilohertz

MISO

Master In, Slave Out

MOSI

Master Out, Slave In

mA

Milliampere

MHz

Megahertz

PMU

Power Management Unit

PS1/PS2

Power Save Modes

RX

Receive

SCK

Serial Clock

SPI

Serial Peripheral Interface

TX

Transmit

UC

Universal Configurator

µA

Microampere

FAQ#

The Frequently Asked Questions (FAQ) section addresses common issues when working with the GSPI peripheral. Use this guidance to speed up development, troubleshoot issues, and optimize performance.

Q: How is GSPI positioned in the device?
A: GSPI is a dedicated, high-performance SPI peripheral optimized for sustained throughput, efficient FIFO and DMA usage, and hardware-managed chip select. It is best suited for flash memories, display controllers, and other bandwidth-intensive SPI devices.

Q: What is the maximum supported bit rate for GSPI?
A: The GSPI peripheral supports up to 40 megahertz (MHz) for high-speed operation. The actual maximum depends on the target Secondary device and signal integrity.

Q: Can GSPI operate in Secondary mode?
A: No. GSPI is designed as a Primary-only peripheral.

Q: How do I enable DMA for GSPI transfers?
A: Enable DMA in the Universal Configurator (UC) by setting the DMA Enable option to On in the GSPI component configuration. The system automatically assigns DMA channels.

Q: What SPI modes does GSPI support?
A: GSPI supports SPI Mode 0 and Mode 3 (Motorola).

Q: How do I configure different data frame sizes?
A: Configure the frame format in the UC or set the appropriate parameters when calling sl_si91x_gspi_set_configuration(). Supported frame sizes range from 4 to 16 bits.

Q: Can GSPI operate during low-power modes?
A: Yes. GSPI supports operation during Power Save 2 (PS2) mode when using DMA for autonomous transfers. This enables communication while the CPU is sleeping.

Q: How do I troubleshoot timing issues?
A: Use a logic analyzer to capture GSPI signals. Verify clock timing, data setup and hold times, and chip select behavior. Make sure the SPI mode matches the Secondary device requirements.

Q: What should I do if transfers fail intermittently?
A: Check signal integrity, power supply stability, and electromagnetic interference. Verify proper grounding, and reduce the clock frequency if needed for reliability.

Q: How do I optimize GSPI performance?
A: Use DMA for large transfers, configure FIFO watermarks, minimize interrupt latency, and select the highest compatible clock frequency for your application.

Q: Can I use multiple GSPI instances?
A: No. The SiWx917 device provides only one GSPI instance.

Q: How do I handle FIFO overflow or underflow?
A: Monitor FIFO status using the status APIs. Configure watermark levels, use DMA to maintain consistent data flow, and implement error handling for overflow or underflow events.

Reference Links#

This section lists external resources and documentation that support GSPI development.