Introduction#

This document is an overview of different memories and their regions of the SiWx917 SoC (SiWG917) for an optimized application design.

Memory is critical to a System-On-Chip (SoC) such as SiWG917 that solves complex problems in the IoT industry. The demand for memory is proportional to the size of an application and optimization is the key to best performance. To implement best optimizations, a better understanding of the memory architecture is required.

Silicon Labs' SiWG917 includes a wireless subsystem and an integrated microcontroller application subsystem. The wireless subsystem consists of a multi-threaded processor (Network Wireless Processor) and the application subsystem consists of an ARM® Cortex® M4 processor. This is a single-chip solution to simplify design, reduce cost, and speed up the time to market. It offers a variety of memory options to choose from, as mentioned in the following sections.

NOTE: In the following sections, the Network Wireless Processor (NWP) is referred to as NWP and the ARM® Cortex® M4 Processor is referred to as M4.