Oscillator Usage on SiWG917Y Modules and Associated Limitations#

Overview#

In the design of the SiWG917Y module, two clock sources are critical: the high-speed system oscillator and the 32 kHz low-frequency oscillator (or equivalent external clock input). Module integration places additional constraints on layout, power sequencing, and oscillator sourcing. It is therefore important to clearly distinguish between System-on-Chip (SoC)-only and module use-cases when specifying clock requirements and limitations.

Oscillator Requirements#

  • High-speed system oscillator: Provides the main system clock for the Cortex-M4 and network wireless processor (NWP). It must meet the stability, startup time, and jitter requirements specified in the data sheet.

  • 32 kHz low-frequency oscillator / external clock:

    • With the module, designers must verify that the 32 kHz source is supplied, properly connected and configured — omission or marginal design may degrade wake-from-sleep behavior, or wireless timing.

    • Consideration should be given to startup time, load capacitance, crystal layout (if used), and the module manufacturer’s layout constraints.

Module Limitations#

The following limitations apply when using the SiWG917Y module variants of the SiWG917 platform. These limitations should be taken into account especially in timing-sensitive, ultra-low-power or wireless-coexistence applications.

Limitation

Description

Implication / Work-around

8.3.1 External 32 kHz Oscillator Required

An external 32 kHz oscillator connected to the UULP_VBAT_GPIO_3 pin (or equivalent external clock input) is mandatory for accurate timing in Ultra-Low-Power microcontroller unit (ULP-MCU) usage or wireless (Wi-Fi or Bluetooth Low Energy (BLE)) power-savings.

Designs omitting the external 32 kHz clock may suffer from degraded calendar accuracy, increased drift, and/or compromised low-power behavior. No full workaround is available — include the oscillator from the start.

8.3.2 Device Hang After FW Update or Application Reset

Modules configured with the external 32 kHz oscillator and operated with older SDK/Commander versions (e.g., SDK ≤ 3.3.2 or Commander < 1.17.0) may experience a hang condition during firmware update via ­JTAG/SWD or during application-based reset.

To mitigate: upgrade to SiSDK ≥ 3.3.4 and Commander ≥ 1.17.0, or use a hard power-cycle / POC_IN reset when hang occurs.

8.3.3 Calendar Inaccuracy

When using the external 32 kHz oscillator, the ULP-MCU Calendar peripheral may still exhibit timing inaccuracies or drift.

For designs requiring precise date/time (e.g., timestamping, real-time logs), consider using an external Real-Time Clock (RTC)/calendar IC or implement calibration routines in firmware to compensate drift.

Notes:

  • Ensure the external 32 kHz oscillator requirement (8.3.1) is built into your design early — failure to do so may impair timing accuracy and low-power behaviour.

  • Align firmware update/reset flows with the recommended SDK/Commander versions to avoid hang conditions (8.3.2).

  • For high-precision timekeeping tasks, treat the calendar peripheral with caution and consider external compensation (8.3.3).

PCN documents:

Errata Documents:

Limitation:
An external 32.768 kHz crystal (XTAL) or oscillator is mandatory for the module variants (and recommended for SoC use) when targeting ultra-low-power Wi-Fi/BLE listen modes or accurate calendar/timekeeping. Omitting this may jeopardize wireless power-save functionality and timing accuracy.

Recommendation for Developers#

  • Always design hardware with the external 32.768 kHz crystal or oscillator populated.

  • Follow load capacitance and equivalent series resistance (ESR) recommendations from AN1335: RS9116 and SiWx917 Crystal Selection Guide.

  • For low-power wireless applications, ensure the XO accuracy meets protocol requirements (±250 ppm combined drift across tolerance, temperature, and load error).

References#

For deeper guidance on crystal selection and implementation: