System Real-Time Counter (SYSRTC)#
The System Real-Time Counter (SYSRTC) is a low-power, always-on 32-bit counter with compare (and optionally capture) channels. While the Calendar block provides human-readable date/time, SYSRTC focuses on precise tick counting and event generation. It is located in the microcontroller unit (MCU) Ultra-Ultra-Low-Power (UULP) domain, so it continues running in Sleep and low-power states.
Typical uses:
Low-power sleep timers and timed wake-ups (in conjunction with the Power Manager).
Periodic interrupts for housekeeping tasks (e.g., once per second).
Timebase for FreeRTOS tickless idle (RTOS decides when to sleep; SYSRTC wakes at the next tick/event).
Features, Clock Sources, and Power Domains#
Key Features#
32-bit free-running counter that wraps on overflow.
One or more compare channels to generate interrupts at specific counter values.
Optional capture channels (latch counter on external event) depending on device configuration.
Operates in Ultra-Ultra-Low-Power (UULP) domain; retains state across low-power modes.
Interrupts can be used as wake-up sources via the Power Manager.
Clock Sources (LFCLK)#
RC_32KHz_CLK (internal RC ~32 kHz) – lowest BOM cost, higher drift; pair with calibration if needed.
XTAL_32KHz_CLK (external 32.768 kHz crystal) – Recommended for precise timing/low drift and wireless duty-cycle use cases.
Power Domain#
SYSRTC lives in the always-on UULP domain and is clocked from the low-frequency clock mux (RC/XTAL).
Using SYSRTC for Sleep/Wakeup with the Power Manager#
SYSRTC is the backbone of the tickless idle mechanism in WiSeConnect when paired with the Power Manager.
In a traditional RTOS, a periodic system tick interrupt runs at fixed intervals (e.g., every 1 ms) generated by SYSRTC. This prevents the MCU from entering deep low-power states because it must wake up frequently. With tickless idle, the RTOS stops generating fixed ticks and instead uses SYSRTC to schedule the next required wakeup. In the WiSeConnect Software Development Kit (SDK), the SYSRTC with Power manager uses the external crystal (XTAL) as its default clock source, ensuring stable and accurate timekeeping.
How SYSRTC and Power Manager enable Tickless Idle#
Idle time calculation (RTOS side)
When the RTOS detects no tasks are ready to run, it calculates the expected idle time (e.g., 200 ms).Programming SYSRTC compare
The RTOS configures SYSRTC to generate a compare interrupt atcurrent_counter + idle_ticks. This becomes the “wake point.”Power Manager sleep entry
The Power Manager validates that no higher power state requirements are active and puts the M4 into sleep (sl_si91x_power_manager_sleep()). RAM retention, peripherals, and clocks are configured per the selected power state. SYSRTC remains active in the VBAT domain.SYSRTC wakeup event
When the counter reaches the compare value, SYSRTC generates an interrupt. The Power Management Unit (PMU) routes this as a wake-up source, restoring the core’s power/clock domains.RTOS tick compensation
After wakeup, the RTOS computes how many ticks elapsed during sleep (using the SYSRTC counter) and adjusts its scheduler accordingly. From the application’s perspective, the system “fast-forwards” time without needing constant 1 ms ticks.
Advantages#
Lower power: M4 stays in sleep for the entire idle period rather than waking for every tick.
Accurate scheduling: SYSRTC ensures wakeup precisely at the compare time.
Important considerations:
SYSRTC is reserved by the RTOS in tickless idle mode. Application code should not overwrite the compare channel used by the RTOS.
For app-level timers, use the Calendar block (alarms or triggers) or a different SYSRTC channel/group.
The minimum sleep interval should account for sleep entry/exit latency (~8 ms for M4 with RAM retention, see AN1508). Very short intervals may not save power.
For detailed information on SYSRTC integration with Power manager, see AN1508: SiWG917 Power Manager Application Note
API Overview and Examples#
API documentation:
The complete API documentation can be found at https://docs.silabs.com/wiseconnect/latest/wiseconnect-api-reference-guide-si91x-peripherals/sysrtc
Reference example:
The reference example for SYSRTC peripheral usage can be found at - https://github.com/SiliconLabs/wiseconnect/tree/master/examples/si91x_soc/peripheral/sl_si91x_sysrtc
The reference example for usage of sleep timer (SYSRTC) can be found at - https://github.com/SiliconLabs/wiseconnect/tree/master/examples/si91x_soc/service/sl_si91x_sleeptimer
SDK Reference:
sl_si91x_power_manager_tickless_idle_example.c demonstrates FreeRTOS + Power Manager with SYSRTC as the tick source.
RTC vs. SYSRTC#
Aspect | RTC (Calendar) | SYSRTC |
|---|---|---|
Primary purpose | Human-readable date/time (Y/M/D h:m:s) | Raw tick counter for precise timing |
Compare/capture | Alarm (single compare) | Multiple compare; optional capture |
Typical usage | Timekeeping, alarms, wall-clock | Periodic wakeups, RTOS tickless, precise scheduling |
Accuracy dependency | LFCLK (RC/XTAL) | LFCLK (RC/XTAL) |
Power domain | UULP (always-on) | UULP (always-on) |
SYSRTC and the Sleep Timer Service#
In WiSeConnect, the Sleep Timer service is a software abstraction that builds on top of SYSRTC to provide application-friendly APIs for scheduling timeouts, delays, and periodic events.
Instead of working directly with SYSRTC registers and compare channels, the Sleep timer service manages them for you.
How It Works#
SYSRTC is the underlying hardware counter.
The Sleep Timer service allocates compare channels and maintains a queue of active timers.
When the earliest timer in the queue expires, the Sleep Timer sets a SYSRTC compare, triggers an interrupt, and dispatches the registered callback.
After wakeup (from sleep or deep sleep), the service re-synchronizes with SYSRTC to deliver pending callbacks.
Benefits of Using Sleep Timer#
Multiple timers: The service allows multiple software timers to share SYSRTC hardware channels.
Ease of use: Provides APIs like
sl_sleeptimer_start_timer_ms()orsl_sleeptimer_start_periodic_timer_ms()rather than direct SYSRTC programming.Integration with Power Manager: Automatically cooperates with the Power Manager to extend sleep until the next timer expiration.
Accuracy: Inherits the resolution and drift of SYSRTC (one LFCLK tick ≈ 30.5 µs at 32.768 kHz).
Portability: Code using the Sleep Timer service is portable across devices without worrying about register-level SYSRTC details.
When to Use What#
Use SYSRTC directly if your application needs very fine control (e.g., precise tickless scheduling).
Use the Sleep Timer service for general application timeouts, delays, and periodic events, especially when multiple timers are needed.
SDK References#
Sleep Timer service is included as part of the WiSeConnect stack.
For example usage, see SL SLEEPTIMER example
Important considerations#
Sleeptimer/SYSRTC is reserved by the RTOS in tickless idle mode. Application code should not overwrite the compare channel used by the RTOS.