MSC - Memory System Controller
Description
Memory System Controller API.
Contains functions to control the MSC, primarily the Flash. Users can perform Flash memory write and erase operations, as well as optimization of the CPU instruction fetch interface for the application. Available instruction fetch features depends on the MCU or SoC family, but features such as instruction pre-fetch, cache, and configurable branch prediction are typically available.
- Note
- Flash wait-state configuration is handled by CMU - Clock Management Unit . When core clock configuration is changed by a call to functions such as CMU_ClockSelectSet() or CMU_HFRCOBandSet() , then Flash wait-state configuration is also updated.
MSC resets into a safe state. To initialize the instruction interface to recommended settings:
- Note
- The optimal configuration is highly application dependent. Performance benchmarking is supported by most families. See MSC_StartCacheMeasurement() and MSC_GetCacheMeasurement() for more details.
- The flash write and erase runs from RAM on the EFM32G devices. On all other devices the flash write and erase functions run from flash.
- Flash erase may add ms of delay to interrupt latency if executing from Flash.
Flash write and erase operations are supported by MSC_WriteWord() , MSC_ErasePage() , and MSC_MassErase() . Mass erase is supported for MCU and SoC families with larger Flash sizes.
- Note
- MSC_Init() must be called prior to any Flash write or erase operation.
The following steps are necessary to perform a page erase and write:
- Note
- The configuration EM_MSC_RUN_FROM_RAM is used for allocating the flash write functions in FLASH and RAM respectively. By default, flash write functions are placed in RAM on EFM32G and Series 2 devices automatically and that could not be changed. For other devices, flash write functions are placed in FLASH but that could be changed using EM_MSC_RUN_FROM_RAM.
Data Structures |
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struct | MSC_ExecConfig_TypeDef |
Code execution configuration.
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struct | MSC_EccConfig_TypeDef |
ECC configuration.
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Functions |
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bool | MSC_LockGetLocked (void) |
Get the status of the MSC register lock.
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void | MSC_LockSetLocked (void) |
Set the MSC register lock to a locked state.
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void | MSC_LockSetUnlocked (void) |
Set the MSC register lock to an unlocked state.
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uint32_t | MSC_ReadCTRLGet (void) |
Get the current value of the read control register (MSC_READCTRL).
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void | MSC_ReadCTRLSet (uint32_t value) |
Write a value to the read control register (MSC_READCTRL).
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void | MSC_IntClear (uint32_t flags) |
Clear one or more pending MSC interrupts.
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void | MSC_IntDisable (uint32_t flags) |
Disable one or more MSC interrupts.
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void | MSC_IntEnable (uint32_t flags) |
Enable one or more MSC interrupts.
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uint32_t | MSC_IntGet (void) |
Get pending MSC interrupt flags.
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uint32_t | MSC_IntGetEnabled (void) |
Get enabled and pending MSC interrupt flags.
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void | MSC_IntSet (uint32_t flags) |
Set one or more pending MSC interrupts from SW.
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void | MSC_StartCacheMeasurement (void) |
Start measuring the cache hit ratio.
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int32_t | MSC_GetCacheMeasurement (void) |
Stop measuring the hit rate.
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void | MSC_FlushCache (void) |
Flush contents of instruction cache.
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void | MSC_EnableCache (bool enable) |
Enable or disable instruction cache functionality.
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void | MSC_EnableCacheIRQs (bool enable) |
Enable or disable instruction cache functionality in IRQs.
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void | MSC_EnableAutoCacheFlush (bool enable) |
Enable or disable instruction cache flushing when writing to flash.
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void | MSC_ExecConfigSet ( MSC_ExecConfig_TypeDef *execConfig) |
Set the MSC code execution configuration.
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void | MSC_EccConfigSet ( MSC_EccConfig_TypeDef *eccConfig) |
Configure Error Correcting Code (ECC).
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MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef | MSC_WriteWordFast (uint32_t *address, void const *data, uint32_t numBytes) |
Writes data to flash memory.
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SL_RAMFUNC_DECLARATOR MSC_Status_TypeDef | MSC_MassErase (void) |
Erase the entire Flash in one operation.
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MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef | MSC_ErasePage (uint32_t *startAddress) |
Erases a page in flash memory.
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MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef | MSC_WriteWord (uint32_t *address, void const *data, uint32_t numBytes) |
Writes data to flash memory.
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MSC_Status_TypeDef | MSC_WriteWordDma (int ch, uint32_t *address, const void *data, uint32_t numBytes) |
Writes data from RAM to flash memory using the DMA.
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void | MSC_Init (void) |
Enables the flash controller for writing.
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void | MSC_Deinit (void) |
Disables the flash controller for writing.
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Macros |
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#define | MSC_PROGRAM_TIMEOUT 10000000UL |
Timeout used while waiting for Flash to become ready after a write.
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#define | MSC_EXECCONFIG_DEFAULT |
Default MSC ExecConfig initialization.
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#define | MSC_ECC_BANKS (3) |
EFM32GG12B incorporates 3 memory banks including ECC support.
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#define | MSC_ECCCONFIG_DEFAULT |
Default MSC EccConfig initialization.
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Enumerations |
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enum |
MSC_Status_TypeDef
{
mscReturnOk = 0, mscReturnInvalidAddr = -1, mscReturnLocked = -2, mscReturnTimeOut = -3, mscReturnUnaligned = -4 } |
Return codes for writing/erasing Flash.
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Function Documentation
◆ MSC_LockGetLocked()
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inline |
Get the status of the MSC register lock.
- Returns
- Boolean true if register lock is applied, false otherwise.
◆ MSC_LockSetLocked()
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inline |
Set the MSC register lock to a locked state.
◆ MSC_LockSetUnlocked()
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inline |
Set the MSC register lock to an unlocked state.
◆ MSC_ReadCTRLGet()
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inline |
Get the current value of the read control register (MSC_READCTRL).
- Returns
- The 32-bit value read from the MSC_READCTRL register.
◆ MSC_ReadCTRLSet()
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inline |
Write a value to the read control register (MSC_READCTRL).
- Parameters
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[in] value
The 32-bit value to write to the MSC_READCTRL register.
◆ MSC_IntClear()
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inline |
Clear one or more pending MSC interrupts.
- Parameters
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[in] flags
Pending MSC interrupt source to clear. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).
◆ MSC_IntDisable()
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inline |
Disable one or more MSC interrupts.
- Parameters
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[in] flags
MSC interrupt sources to disable. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).
◆ MSC_IntEnable()
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inline |
Enable one or more MSC interrupts.
- Note
- Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. To ignore a pending interrupt, consider using MSC_IntClear() prior to enabling the interrupt.
- Parameters
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[in] flags
MSC interrupt sources to enable. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).
◆ MSC_IntGet()
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inline |
Get pending MSC interrupt flags.
- Note
- The event bits are not cleared by the use of this function.
- Returns
- MSC interrupt sources pending. A bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).
◆ MSC_IntGetEnabled()
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inline |
Get enabled and pending MSC interrupt flags.
Useful for handling more interrupt sources in the same interrupt handler.
- Note
- Interrupt flags are not cleared by the use of this function.
- Returns
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Pending and enabled MSC interrupt sources. The return value is the bitwise AND of
- the enabled interrupt sources in MSC_IEN and
- the pending interrupt flags MSC_IF
◆ MSC_IntSet()
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inline |
Set one or more pending MSC interrupts from SW.
- Parameters
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[in] flags
MSC interrupt sources to set to pending. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).
◆ MSC_StartCacheMeasurement()
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inline |
Start measuring the cache hit ratio.
Starts performance counters. It is defined inline to minimize the impact of this code on the measurement itself.
◆ MSC_GetCacheMeasurement()
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inline |
Stop measuring the hit rate.
- Note
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Defined inline to minimize the impact of this code on the measurement itself. Only works for relatively short sections of code. To measure longer sections of code, implement an IRQ Handler for the CHOF and CMOF overflow interrupts. These overflows need to be counted and included in the total. Functions can then be implemented as follows:
* volatile uint32_t hitOverflows * volatile uint32_t missOverflows * * void MSC_IRQHandler(void) * { * uint32_t flags; * flags = MSC->IF; * if (flags & MSC_IF_CHOF) { * MSC->IFC = MSC_IF_CHOF; * hitOverflows++; * } * if (flags & MSC_IF_CMOF) { * MSC->IFC = MSC_IF_CMOF; * missOverflows++; * } * } * * void startPerformanceCounters(void) * { * hitOverflows = 0; * missOverflows = 0; * * MSC_IntEnable(MSC_IF_CHOF | MSC_IF_CMOF); * NVIC_EnableIRQ(MSC_IRQn); * * MSC_StartCacheMeasurement(); * } *
- Returns
- Returns -1 if there has been no cache accesses. Returns -2 if there has been an overflow in the performance counters. If not, it will return the percentage of hits versus misses.
◆ MSC_FlushCache()
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inline |
Flush contents of instruction cache.
◆ MSC_EnableCache()
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inline |
Enable or disable instruction cache functionality.
- Parameters
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[in] enable
Enable instruction cache. Default is on.
◆ MSC_EnableCacheIRQs()
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inline |
Enable or disable instruction cache functionality in IRQs.
- Parameters
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[in] enable
Enable instruction cache. Default is on.
◆ MSC_EnableAutoCacheFlush()
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inline |
Enable or disable instruction cache flushing when writing to flash.
- Parameters
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[in] enable
Enable automatic cache flushing. Default is on.
◆ MSC_ExecConfigSet()
void MSC_ExecConfigSet | ( | MSC_ExecConfig_TypeDef * |
execConfig
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Set the MSC code execution configuration.
- Parameters
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[in] execConfig
The code execution configuration.
◆ MSC_EccConfigSet()
void MSC_EccConfigSet | ( | MSC_EccConfig_TypeDef * |
eccConfig
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) |
Configure Error Correcting Code (ECC).
This function configures ECC support according to the configuration input parameter. If the user requests enabling ECC for a given RAM bank this function will initialize ECC memory (syndromes) for the bank by reading and writing the existing values in memory. I.e. all data is preserved. The initialization process runs in a critical section disallowing interrupts and thread scheduling, and will consume a considerable amount of clock cycles. Therefore the user should carefully assess where to call this function. The user can consider to increase the clock frequency in order to reduce the execution time. This function makes use of 2 DMA channels to move data to/from RAM in an efficient way. The user can select which 2 DMA channels to use in order to avoid conflicts with the application. However the user must make sure that no other DMA operations takes place while this function is executing. If the application has been using the DMA controller prior to calling this function, the application will need to reinitialize DMA registers after this function has completed.
- Note
- This function protects the ECC initialization procedure from interrupts and other threads by using a critical section (defined by em_core.h) When running on RTOS the user may need to override CORE_EnterCritical CORE_ExitCritical which are declared as 'SL_WEAK' in em_core.c.
- Parameters
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[in] eccConfig
ECC configuration
◆ MSC_WriteWordFast()
MSC_RAMFUNC_DEFINITION_END MSC_RAMFUNC_DEFINITION_BEGIN MSC_Status_TypeDef MSC_WriteWordFast | ( | uint32_t * |
address,
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void const * |
data,
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uint32_t |
numBytes
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Writes data to flash memory.
This function is faster than MSC_WriteWord() , but it disables interrupts. Write data must be aligned to words and contain a number of bytes that is divisible by four.
- Warning
- This function is only available for certain devices.
- Note
- It is recommended to erase the flash page before performing a write. It is required to run this function from RAM on parts that include a flash write buffer.
For IAR Embedded Workbench, Simplicity Studio and GCC, this is done automatically by using attributes in the function proctype. For Keil uVision IDE, define a section called "ram_code" and place this manually in the project's scatter file.
- Parameters
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[in] address
A pointer to the flash word to write to. Must be aligned to words. [in] data
Data to write to flash. [in] numBytes
A number of bytes to write from the Flash. NB: Must be divisible by four.
- Returns
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Returns the status of the write operation.
* flashReturnOk - The operation completed successfully. * flashReturnInvalidAddr - The operation tried to erase a non-flash area. * flashReturnLocked - The operation tried to erase a locked area of the flash. * flashReturnTimeOut - The operation timed out waiting for flash operation * to complete. Or the MSC timed out waiting for the software to write * the next word into the DWORD register. *
◆ MSC_MassErase()
SL_RAMFUNC_DEFINITION_BEGIN MSC_Status_TypeDef MSC_MassErase | ( | void |
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Erase the entire Flash in one operation.
- Note
- This command will erase the entire contents of the device. Use with care, both a debug session and all contents of the flash will be lost. The lock bit, MLW will prevent this operation from executing and might prevent a successful mass erase.
- Returns
- Returns the status of the operation.
◆ MSC_ErasePage()
MSC_RAMFUNC_DEFINITION_BEGIN MSC_Status_TypeDef MSC_ErasePage | ( | uint32_t * |
startAddress
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Erases a page in flash memory.
- Note
- For the Gecko family, it is required to run this function from RAM.
For IAR Embedded Workbench, Simplicity Studio and GCC, this is achieved automatically by using attributes in the function proctype. For Keil uVision IDE, define a section called "ram_code" and place this manually in the project's scatter file.
- Parameters
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[in] startAddress
A pointer to the flash page to erase. Must be aligned to the beginning of the page boundary.
- Returns
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Returns the status of erase operation,
MSC_Status_TypeDef
* mscReturnOk - The operation completed successfully. * mscReturnInvalidAddr - The operation tried to erase a non-flash area. * mscReturnLocked - The operation tried to erase a locked area of the flash. * mscReturnTimeOut - The operation timed out waiting for the flash operation * to complete. *
◆ MSC_WriteWord()
MSC_RAMFUNC_DEFINITION_END MSC_RAMFUNC_DEFINITION_BEGIN MSC_Status_TypeDef MSC_WriteWord | ( | uint32_t * |
address,
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void const * |
data,
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uint32_t |
numBytes
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Writes data to flash memory.
This function is interrupt-safe, but slower than MSC_WriteWordFast() , which writes to flash with interrupts disabled. Write data must be aligned to words and contain a number of bytes that is divisible by four.
- Note
- It is recommended to erase the flash page before performing a write.
For the Gecko family, it is required to run this function from RAM.
For IAR Embedded Workbench, Simplicity Studio and GCC, this is done automatically by using attributes in the function proctype. For Keil uVision IDE, define a section called "ram_code" and place it manually in the project's scatter file.
This function requires a system core clock at 1 MHz or higher.
- Parameters
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[in] address
A pointer to the flash word to write to. Must be aligned to words. [in] data
Data to write to flash. [in] numBytes
A number of bytes to write from flash. NB: Must be divisible by four.
- Returns
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Returns the status of the write operation.
* flashReturnOk - The operation completed successfully. * flashReturnInvalidAddr - The operation tried to erase a non-flash area. * flashReturnLocked - The operation tried to erase a locked area of the Flash. * flashReturnTimeOut - The operation timed out waiting for the flash operation * to complete, or the MSC module timed out waiting for the software to write * the next word into the DWORD register. *
◆ MSC_WriteWordDma()
MSC_RAMFUNC_DEFINITION_END MSC_Status_TypeDef MSC_WriteWordDma | ( | int |
ch,
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uint32_t * |
address,
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const void * |
data,
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uint32_t |
numBytes
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Writes data from RAM to flash memory using the DMA.
This function uses the LDMA to write data to the internal flash memory. This is the fastest way to write data to the flash and should be used when the application wants to achieve write speeds like they are reported in the datasheet. Note that this function only supports writing data from RAM to flash, it does not support writing data from flash to flash.
- Note
- This function requires that the LDMA clock is enabled.
- Parameters
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[in] ch
DMA channel to use [in] address
A pointer to the flash word to write to. Must be aligned to words. [in] data
Data to write to flash. Note that this argument must be an address in RAM. This function does not support copying data from flash to flash on series-1 devices. Must be aligned to words. [in] numBytes
A number of bytes to write from flash. NB: Must be divisible by four.
- Returns
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Returns the status of the write operation.
* flashReturnOk - The operation completed successfully. * flashReturnInvalidAddr - The operation tried to erase a non-flash area. *
◆ MSC_Init()
void MSC_Init | ( | void |
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Enables the flash controller for writing.
- Note
- This function must be called before flash operations when AUXHFRCO clock has been changed from a default band.
◆ MSC_Deinit()
void MSC_Deinit | ( | void |
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Disables the flash controller for writing.
Macro Definition Documentation
◆ MSC_PROGRAM_TIMEOUT
#define MSC_PROGRAM_TIMEOUT 10000000UL |
Timeout used while waiting for Flash to become ready after a write.
This number indicates the number of iterations to perform before issuing a timeout.
- Note
- Timeout is set very large (in the order of 100x longer than necessary). This is to avoid any corner case.
◆ MSC_EXECCONFIG_DEFAULT
#define MSC_EXECCONFIG_DEFAULT |
Default MSC ExecConfig initialization.
◆ MSC_ECC_BANKS
#define MSC_ECC_BANKS (3) |
EFM32GG12B incorporates 3 memory banks including ECC support.
◆ MSC_ECCCONFIG_DEFAULT
#define MSC_ECCCONFIG_DEFAULT |
Default MSC EccConfig initialization.
Enumeration Type Documentation
◆ MSC_Status_TypeDef
enum MSC_Status_TypeDef |
Return codes for writing/erasing Flash.