Define peripheral EUART structure.

Public Attributes#

uint32_t
base

Peripheral base address.

sl_clock_branch_t
clk_branch

Peripheral clock branch.

sl_bus_clock_t
bus_clock

Peripheral bus clock.

sl_dma_signal_t
dma_signal_rxfl

RX DMA channel.

sl_dma_signal_t
dma_signal_txfl

TX DMA channel.

Public Attribute Documentation#

base#

uint32_t sl_peripheral_euart_val_t::base

Peripheral base address.


clk_branch#

sl_clock_branch_t sl_peripheral_euart_val_t::clk_branch

Peripheral clock branch.


bus_clock#

sl_bus_clock_t sl_peripheral_euart_val_t::bus_clock

Peripheral bus clock.


dma_signal_rxfl#

sl_dma_signal_t sl_peripheral_euart_val_t::dma_signal_rxfl

RX DMA channel.


dma_signal_txfl#

sl_dma_signal_t sl_peripheral_euart_val_t::dma_signal_txfl

TX DMA channel.