|
#define
|
_EBI_ADDRTIMING1_ADDRHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING1_ADDRHOLD_MASK
0x300UL
|
|
#define
|
_EBI_ADDRTIMING1_ADDRHOLD_SHIFT
8
|
|
#define
|
_EBI_ADDRTIMING1_ADDRSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING1_ADDRSETUP_MASK
0x3UL
|
|
#define
|
_EBI_ADDRTIMING1_ADDRSETUP_SHIFT
0
|
|
#define
|
_EBI_ADDRTIMING1_HALFALE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_ADDRTIMING1_HALFALE_MASK
0x10000000UL
|
|
#define
|
_EBI_ADDRTIMING1_HALFALE_SHIFT
28
|
|
#define
|
_EBI_ADDRTIMING1_MASK
0x10000303UL
|
|
#define
|
_EBI_ADDRTIMING1_RESETVALUE
0x00000303UL
|
|
#define
|
_EBI_ADDRTIMING2_ADDRHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING2_ADDRHOLD_MASK
0x300UL
|
|
#define
|
_EBI_ADDRTIMING2_ADDRHOLD_SHIFT
8
|
|
#define
|
_EBI_ADDRTIMING2_ADDRSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING2_ADDRSETUP_MASK
0x3UL
|
|
#define
|
_EBI_ADDRTIMING2_ADDRSETUP_SHIFT
0
|
|
#define
|
_EBI_ADDRTIMING2_HALFALE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_ADDRTIMING2_HALFALE_MASK
0x10000000UL
|
|
#define
|
_EBI_ADDRTIMING2_HALFALE_SHIFT
28
|
|
#define
|
_EBI_ADDRTIMING2_MASK
0x10000303UL
|
|
#define
|
_EBI_ADDRTIMING2_RESETVALUE
0x00000303UL
|
|
#define
|
_EBI_ADDRTIMING3_ADDRHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING3_ADDRHOLD_MASK
0x300UL
|
|
#define
|
_EBI_ADDRTIMING3_ADDRHOLD_SHIFT
8
|
|
#define
|
_EBI_ADDRTIMING3_ADDRSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING3_ADDRSETUP_MASK
0x3UL
|
|
#define
|
_EBI_ADDRTIMING3_ADDRSETUP_SHIFT
0
|
|
#define
|
_EBI_ADDRTIMING3_HALFALE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_ADDRTIMING3_HALFALE_MASK
0x10000000UL
|
|
#define
|
_EBI_ADDRTIMING3_HALFALE_SHIFT
28
|
|
#define
|
_EBI_ADDRTIMING3_MASK
0x10000303UL
|
|
#define
|
_EBI_ADDRTIMING3_RESETVALUE
0x00000303UL
|
|
#define
|
_EBI_ADDRTIMING_ADDRHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING_ADDRHOLD_MASK
0x300UL
|
|
#define
|
_EBI_ADDRTIMING_ADDRHOLD_SHIFT
8
|
|
#define
|
_EBI_ADDRTIMING_ADDRSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_ADDRTIMING_ADDRSETUP_MASK
0x3UL
|
|
#define
|
_EBI_ADDRTIMING_ADDRSETUP_SHIFT
0
|
|
#define
|
_EBI_ADDRTIMING_HALFALE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_ADDRTIMING_HALFALE_MASK
0x10000000UL
|
|
#define
|
_EBI_ADDRTIMING_HALFALE_SHIFT
28
|
|
#define
|
_EBI_ADDRTIMING_MASK
0x10000303UL
|
|
#define
|
_EBI_ADDRTIMING_RESETVALUE
0x00000303UL
|
|
#define
|
_EBI_CMD_ECCCLEAR_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CMD_ECCCLEAR_MASK
0x4UL
|
|
#define
|
_EBI_CMD_ECCCLEAR_SHIFT
2
|
|
#define
|
_EBI_CMD_ECCSTART_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CMD_ECCSTART_MASK
0x1UL
|
|
#define
|
_EBI_CMD_ECCSTART_SHIFT
0
|
|
#define
|
_EBI_CMD_ECCSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CMD_ECCSTOP_MASK
0x2UL
|
|
#define
|
_EBI_CMD_ECCSTOP_SHIFT
1
|
|
#define
|
_EBI_CMD_MASK
0x00000007UL
|
|
#define
|
_EBI_CMD_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_CTRL_ALTMAP_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ALTMAP_MASK
0x80000000UL
|
|
#define
|
_EBI_CTRL_ALTMAP_SHIFT
31
|
|
#define
|
_EBI_CTRL_ARDY1EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDY1EN_MASK
0x40000UL
|
|
#define
|
_EBI_CTRL_ARDY1EN_SHIFT
18
|
|
#define
|
_EBI_CTRL_ARDY2EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDY2EN_MASK
0x100000UL
|
|
#define
|
_EBI_CTRL_ARDY2EN_SHIFT
20
|
|
#define
|
_EBI_CTRL_ARDY3EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDY3EN_MASK
0x400000UL
|
|
#define
|
_EBI_CTRL_ARDY3EN_SHIFT
22
|
|
#define
|
_EBI_CTRL_ARDYEN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDYEN_MASK
0x10000UL
|
|
#define
|
_EBI_CTRL_ARDYEN_SHIFT
16
|
|
#define
|
_EBI_CTRL_ARDYTO1DIS_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDYTO1DIS_MASK
0x80000UL
|
|
#define
|
_EBI_CTRL_ARDYTO1DIS_SHIFT
19
|
|
#define
|
_EBI_CTRL_ARDYTO2DIS_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDYTO2DIS_MASK
0x200000UL
|
|
#define
|
_EBI_CTRL_ARDYTO2DIS_SHIFT
21
|
|
#define
|
_EBI_CTRL_ARDYTO3DIS_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDYTO3DIS_MASK
0x800000UL
|
|
#define
|
_EBI_CTRL_ARDYTO3DIS_SHIFT
23
|
|
#define
|
_EBI_CTRL_ARDYTODIS_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ARDYTODIS_MASK
0x20000UL
|
|
#define
|
_EBI_CTRL_ARDYTODIS_SHIFT
17
|
|
#define
|
_EBI_CTRL_BANK0EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BANK0EN_MASK
0x100UL
|
|
#define
|
_EBI_CTRL_BANK0EN_SHIFT
8
|
|
#define
|
_EBI_CTRL_BANK1EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BANK1EN_MASK
0x200UL
|
|
#define
|
_EBI_CTRL_BANK1EN_SHIFT
9
|
|
#define
|
_EBI_CTRL_BANK2EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BANK2EN_MASK
0x400UL
|
|
#define
|
_EBI_CTRL_BANK2EN_SHIFT
10
|
|
#define
|
_EBI_CTRL_BANK3EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BANK3EN_MASK
0x800UL
|
|
#define
|
_EBI_CTRL_BANK3EN_SHIFT
11
|
|
#define
|
_EBI_CTRL_BL1_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BL1_MASK
0x2000000UL
|
|
#define
|
_EBI_CTRL_BL1_SHIFT
25
|
|
#define
|
_EBI_CTRL_BL2_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BL2_MASK
0x4000000UL
|
|
#define
|
_EBI_CTRL_BL2_SHIFT
26
|
|
#define
|
_EBI_CTRL_BL3_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BL3_MASK
0x8000000UL
|
|
#define
|
_EBI_CTRL_BL3_SHIFT
27
|
|
#define
|
_EBI_CTRL_BL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_BL_MASK
0x1000000UL
|
|
#define
|
_EBI_CTRL_BL_SHIFT
24
|
|
#define
|
_EBI_CTRL_ITS_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_ITS_MASK
0x40000000UL
|
|
#define
|
_EBI_CTRL_ITS_SHIFT
30
|
|
#define
|
_EBI_CTRL_MASK
0xCFFFFFFFUL
|
|
#define
|
_EBI_CTRL_MODE1_D16
0x00000003UL
|
|
#define
|
_EBI_CTRL_MODE1_D16A16ALE
0x00000001UL
|
|
#define
|
_EBI_CTRL_MODE1_D8A24ALE
0x00000002UL
|
|
#define
|
_EBI_CTRL_MODE1_D8A8
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE1_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE1_MASK
0xCUL
|
|
#define
|
_EBI_CTRL_MODE1_SHIFT
2
|
|
#define
|
_EBI_CTRL_MODE2_D16
0x00000003UL
|
|
#define
|
_EBI_CTRL_MODE2_D16A16ALE
0x00000001UL
|
|
#define
|
_EBI_CTRL_MODE2_D8A24ALE
0x00000002UL
|
|
#define
|
_EBI_CTRL_MODE2_D8A8
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE2_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE2_MASK
0x30UL
|
|
#define
|
_EBI_CTRL_MODE2_SHIFT
4
|
|
#define
|
_EBI_CTRL_MODE3_D16
0x00000003UL
|
|
#define
|
_EBI_CTRL_MODE3_D16A16ALE
0x00000001UL
|
|
#define
|
_EBI_CTRL_MODE3_D8A24ALE
0x00000002UL
|
|
#define
|
_EBI_CTRL_MODE3_D8A8
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE3_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE3_MASK
0xC0UL
|
|
#define
|
_EBI_CTRL_MODE3_SHIFT
6
|
|
#define
|
_EBI_CTRL_MODE_D16
0x00000003UL
|
|
#define
|
_EBI_CTRL_MODE_D16A16ALE
0x00000001UL
|
|
#define
|
_EBI_CTRL_MODE_D8A24ALE
0x00000002UL
|
|
#define
|
_EBI_CTRL_MODE_D8A8
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_MODE_MASK
0x3UL
|
|
#define
|
_EBI_CTRL_MODE_SHIFT
0
|
|
#define
|
_EBI_CTRL_NOIDLE1_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_NOIDLE1_MASK
0x2000UL
|
|
#define
|
_EBI_CTRL_NOIDLE1_SHIFT
13
|
|
#define
|
_EBI_CTRL_NOIDLE2_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_NOIDLE2_MASK
0x4000UL
|
|
#define
|
_EBI_CTRL_NOIDLE2_SHIFT
14
|
|
#define
|
_EBI_CTRL_NOIDLE3_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_NOIDLE3_MASK
0x8000UL
|
|
#define
|
_EBI_CTRL_NOIDLE3_SHIFT
15
|
|
#define
|
_EBI_CTRL_NOIDLE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_CTRL_NOIDLE_MASK
0x1000UL
|
|
#define
|
_EBI_CTRL_NOIDLE_SHIFT
12
|
|
#define
|
_EBI_CTRL_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_ECCPARITY_ECCPARITY_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_ECCPARITY_ECCPARITY_MASK
0xFFFFFFFFUL
|
|
#define
|
_EBI_ECCPARITY_ECCPARITY_SHIFT
0
|
|
#define
|
_EBI_ECCPARITY_MASK
0xFFFFFFFFUL
|
|
#define
|
_EBI_ECCPARITY_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_IEN_DDEMPTY_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IEN_DDEMPTY_MASK
0x10UL
|
|
#define
|
_EBI_IEN_DDEMPTY_SHIFT
4
|
|
#define
|
_EBI_IEN_DDJIT_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IEN_DDJIT_MASK
0x20UL
|
|
#define
|
_EBI_IEN_DDJIT_SHIFT
5
|
|
#define
|
_EBI_IEN_HSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IEN_HSYNC_MASK
0x2UL
|
|
#define
|
_EBI_IEN_HSYNC_SHIFT
1
|
|
#define
|
_EBI_IEN_MASK
0x0000003FUL
|
|
#define
|
_EBI_IEN_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_IEN_VBPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IEN_VBPORCH_MASK
0x4UL
|
|
#define
|
_EBI_IEN_VBPORCH_SHIFT
2
|
|
#define
|
_EBI_IEN_VFPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IEN_VFPORCH_MASK
0x8UL
|
|
#define
|
_EBI_IEN_VFPORCH_SHIFT
3
|
|
#define
|
_EBI_IEN_VSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IEN_VSYNC_MASK
0x1UL
|
|
#define
|
_EBI_IEN_VSYNC_SHIFT
0
|
|
#define
|
_EBI_IF_DDEMPTY_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IF_DDEMPTY_MASK
0x10UL
|
|
#define
|
_EBI_IF_DDEMPTY_SHIFT
4
|
|
#define
|
_EBI_IF_DDJIT_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IF_DDJIT_MASK
0x20UL
|
|
#define
|
_EBI_IF_DDJIT_SHIFT
5
|
|
#define
|
_EBI_IF_HSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IF_HSYNC_MASK
0x2UL
|
|
#define
|
_EBI_IF_HSYNC_SHIFT
1
|
|
#define
|
_EBI_IF_MASK
0x0000003FUL
|
|
#define
|
_EBI_IF_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_IF_VBPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IF_VBPORCH_MASK
0x4UL
|
|
#define
|
_EBI_IF_VBPORCH_SHIFT
2
|
|
#define
|
_EBI_IF_VFPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IF_VFPORCH_MASK
0x8UL
|
|
#define
|
_EBI_IF_VFPORCH_SHIFT
3
|
|
#define
|
_EBI_IF_VSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IF_VSYNC_MASK
0x1UL
|
|
#define
|
_EBI_IF_VSYNC_SHIFT
0
|
|
#define
|
_EBI_IFC_DDEMPTY_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFC_DDEMPTY_MASK
0x10UL
|
|
#define
|
_EBI_IFC_DDEMPTY_SHIFT
4
|
|
#define
|
_EBI_IFC_DDJIT_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFC_DDJIT_MASK
0x20UL
|
|
#define
|
_EBI_IFC_DDJIT_SHIFT
5
|
|
#define
|
_EBI_IFC_HSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFC_HSYNC_MASK
0x2UL
|
|
#define
|
_EBI_IFC_HSYNC_SHIFT
1
|
|
#define
|
_EBI_IFC_MASK
0x0000003FUL
|
|
#define
|
_EBI_IFC_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_IFC_VBPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFC_VBPORCH_MASK
0x4UL
|
|
#define
|
_EBI_IFC_VBPORCH_SHIFT
2
|
|
#define
|
_EBI_IFC_VFPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFC_VFPORCH_MASK
0x8UL
|
|
#define
|
_EBI_IFC_VFPORCH_SHIFT
3
|
|
#define
|
_EBI_IFC_VSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFC_VSYNC_MASK
0x1UL
|
|
#define
|
_EBI_IFC_VSYNC_SHIFT
0
|
|
#define
|
_EBI_IFS_DDEMPTY_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFS_DDEMPTY_MASK
0x10UL
|
|
#define
|
_EBI_IFS_DDEMPTY_SHIFT
4
|
|
#define
|
_EBI_IFS_DDJIT_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFS_DDJIT_MASK
0x20UL
|
|
#define
|
_EBI_IFS_DDJIT_SHIFT
5
|
|
#define
|
_EBI_IFS_HSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFS_HSYNC_MASK
0x2UL
|
|
#define
|
_EBI_IFS_HSYNC_SHIFT
1
|
|
#define
|
_EBI_IFS_MASK
0x0000003FUL
|
|
#define
|
_EBI_IFS_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_IFS_VBPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFS_VBPORCH_MASK
0x4UL
|
|
#define
|
_EBI_IFS_VBPORCH_SHIFT
2
|
|
#define
|
_EBI_IFS_VFPORCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFS_VFPORCH_MASK
0x8UL
|
|
#define
|
_EBI_IFS_VFPORCH_SHIFT
3
|
|
#define
|
_EBI_IFS_VSYNC_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_IFS_VSYNC_MASK
0x1UL
|
|
#define
|
_EBI_IFS_VSYNC_SHIFT
0
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_BANK0
0x00000000UL
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_BANK1
0x00000001UL
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_BANK2
0x00000002UL
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_BANK3
0x00000003UL
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_MASK
0x30UL
|
|
#define
|
_EBI_NANDCTRL_BANKSEL_SHIFT
4
|
|
#define
|
_EBI_NANDCTRL_EN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_NANDCTRL_EN_MASK
0x1UL
|
|
#define
|
_EBI_NANDCTRL_EN_SHIFT
0
|
|
#define
|
_EBI_NANDCTRL_MASK
0x00000031UL
|
|
#define
|
_EBI_NANDCTRL_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_PAGECTRL_INCHIT_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_PAGECTRL_INCHIT_MASK
0x10UL
|
|
#define
|
_EBI_PAGECTRL_INCHIT_SHIFT
4
|
|
#define
|
_EBI_PAGECTRL_KEEPOPEN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_PAGECTRL_KEEPOPEN_MASK
0x7F00000UL
|
|
#define
|
_EBI_PAGECTRL_KEEPOPEN_SHIFT
20
|
|
#define
|
_EBI_PAGECTRL_MASK
0x07F00713UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_MASK
0x3UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_MEMBER16
0x00000002UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_MEMBER32
0x00000003UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_MEMBER4
0x00000000UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_MEMBER8
0x00000001UL
|
|
#define
|
_EBI_PAGECTRL_PAGELEN_SHIFT
0
|
|
#define
|
_EBI_PAGECTRL_RDPA_DEFAULT
0x00000007UL
|
|
#define
|
_EBI_PAGECTRL_RDPA_MASK
0x700UL
|
|
#define
|
_EBI_PAGECTRL_RDPA_SHIFT
8
|
|
#define
|
_EBI_PAGECTRL_RESETVALUE
0x00000700UL
|
|
#define
|
_EBI_POLARITY1_ALEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY1_ALEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_ALEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_ALEPOL_MASK
0x8UL
|
|
#define
|
_EBI_POLARITY1_ALEPOL_SHIFT
3
|
|
#define
|
_EBI_POLARITY1_ARDYPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY1_ARDYPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_ARDYPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_ARDYPOL_MASK
0x10UL
|
|
#define
|
_EBI_POLARITY1_ARDYPOL_SHIFT
4
|
|
#define
|
_EBI_POLARITY1_BLPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY1_BLPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_BLPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_BLPOL_MASK
0x20UL
|
|
#define
|
_EBI_POLARITY1_BLPOL_SHIFT
5
|
|
#define
|
_EBI_POLARITY1_CSPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY1_CSPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_CSPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_CSPOL_MASK
0x1UL
|
|
#define
|
_EBI_POLARITY1_CSPOL_SHIFT
0
|
|
#define
|
_EBI_POLARITY1_MASK
0x0000003FUL
|
|
#define
|
_EBI_POLARITY1_REPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY1_REPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_REPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_REPOL_MASK
0x2UL
|
|
#define
|
_EBI_POLARITY1_REPOL_SHIFT
1
|
|
#define
|
_EBI_POLARITY1_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_WEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY1_WEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_WEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY1_WEPOL_MASK
0x4UL
|
|
#define
|
_EBI_POLARITY1_WEPOL_SHIFT
2
|
|
#define
|
_EBI_POLARITY2_ALEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY2_ALEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_ALEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_ALEPOL_MASK
0x8UL
|
|
#define
|
_EBI_POLARITY2_ALEPOL_SHIFT
3
|
|
#define
|
_EBI_POLARITY2_ARDYPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY2_ARDYPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_ARDYPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_ARDYPOL_MASK
0x10UL
|
|
#define
|
_EBI_POLARITY2_ARDYPOL_SHIFT
4
|
|
#define
|
_EBI_POLARITY2_BLPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY2_BLPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_BLPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_BLPOL_MASK
0x20UL
|
|
#define
|
_EBI_POLARITY2_BLPOL_SHIFT
5
|
|
#define
|
_EBI_POLARITY2_CSPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY2_CSPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_CSPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_CSPOL_MASK
0x1UL
|
|
#define
|
_EBI_POLARITY2_CSPOL_SHIFT
0
|
|
#define
|
_EBI_POLARITY2_MASK
0x0000003FUL
|
|
#define
|
_EBI_POLARITY2_REPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY2_REPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_REPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_REPOL_MASK
0x2UL
|
|
#define
|
_EBI_POLARITY2_REPOL_SHIFT
1
|
|
#define
|
_EBI_POLARITY2_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_WEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY2_WEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_WEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY2_WEPOL_MASK
0x4UL
|
|
#define
|
_EBI_POLARITY2_WEPOL_SHIFT
2
|
|
#define
|
_EBI_POLARITY3_ALEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY3_ALEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_ALEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_ALEPOL_MASK
0x8UL
|
|
#define
|
_EBI_POLARITY3_ALEPOL_SHIFT
3
|
|
#define
|
_EBI_POLARITY3_ARDYPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY3_ARDYPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_ARDYPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_ARDYPOL_MASK
0x10UL
|
|
#define
|
_EBI_POLARITY3_ARDYPOL_SHIFT
4
|
|
#define
|
_EBI_POLARITY3_BLPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY3_BLPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_BLPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_BLPOL_MASK
0x20UL
|
|
#define
|
_EBI_POLARITY3_BLPOL_SHIFT
5
|
|
#define
|
_EBI_POLARITY3_CSPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY3_CSPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_CSPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_CSPOL_MASK
0x1UL
|
|
#define
|
_EBI_POLARITY3_CSPOL_SHIFT
0
|
|
#define
|
_EBI_POLARITY3_MASK
0x0000003FUL
|
|
#define
|
_EBI_POLARITY3_REPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY3_REPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_REPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_REPOL_MASK
0x2UL
|
|
#define
|
_EBI_POLARITY3_REPOL_SHIFT
1
|
|
#define
|
_EBI_POLARITY3_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_WEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY3_WEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_WEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY3_WEPOL_MASK
0x4UL
|
|
#define
|
_EBI_POLARITY3_WEPOL_SHIFT
2
|
|
#define
|
_EBI_POLARITY_ALEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY_ALEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY_ALEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY_ALEPOL_MASK
0x8UL
|
|
#define
|
_EBI_POLARITY_ALEPOL_SHIFT
3
|
|
#define
|
_EBI_POLARITY_ARDYPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY_ARDYPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY_ARDYPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY_ARDYPOL_MASK
0x10UL
|
|
#define
|
_EBI_POLARITY_ARDYPOL_SHIFT
4
|
|
#define
|
_EBI_POLARITY_BLPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY_BLPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY_BLPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY_BLPOL_MASK
0x20UL
|
|
#define
|
_EBI_POLARITY_BLPOL_SHIFT
5
|
|
#define
|
_EBI_POLARITY_CSPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY_CSPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY_CSPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY_CSPOL_MASK
0x1UL
|
|
#define
|
_EBI_POLARITY_CSPOL_SHIFT
0
|
|
#define
|
_EBI_POLARITY_MASK
0x0000003FUL
|
|
#define
|
_EBI_POLARITY_REPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY_REPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY_REPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY_REPOL_MASK
0x2UL
|
|
#define
|
_EBI_POLARITY_REPOL_SHIFT
1
|
|
#define
|
_EBI_POLARITY_RESETVALUE
0x00000000UL
|
|
#define
|
_EBI_POLARITY_WEPOL_ACTIVEHIGH
0x00000001UL
|
|
#define
|
_EBI_POLARITY_WEPOL_ACTIVELOW
0x00000000UL
|
|
#define
|
_EBI_POLARITY_WEPOL_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_POLARITY_WEPOL_MASK
0x4UL
|
|
#define
|
_EBI_POLARITY_WEPOL_SHIFT
2
|
|
#define
|
_EBI_RDTIMING1_HALFRE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING1_HALFRE_MASK
0x10000000UL
|
|
#define
|
_EBI_RDTIMING1_HALFRE_SHIFT
28
|
|
#define
|
_EBI_RDTIMING1_MASK
0x70033F03UL
|
|
#define
|
_EBI_RDTIMING1_PAGEMODE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING1_PAGEMODE_MASK
0x40000000UL
|
|
#define
|
_EBI_RDTIMING1_PAGEMODE_SHIFT
30
|
|
#define
|
_EBI_RDTIMING1_PREFETCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING1_PREFETCH_MASK
0x20000000UL
|
|
#define
|
_EBI_RDTIMING1_PREFETCH_SHIFT
29
|
|
#define
|
_EBI_RDTIMING1_RDHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_RDTIMING1_RDHOLD_MASK
0x30000UL
|
|
#define
|
_EBI_RDTIMING1_RDHOLD_SHIFT
16
|
|
#define
|
_EBI_RDTIMING1_RDSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_RDTIMING1_RDSETUP_MASK
0x3UL
|
|
#define
|
_EBI_RDTIMING1_RDSETUP_SHIFT
0
|
|
#define
|
_EBI_RDTIMING1_RDSTRB_DEFAULT
0x0000003FUL
|
|
#define
|
_EBI_RDTIMING1_RDSTRB_MASK
0x3F00UL
|
|
#define
|
_EBI_RDTIMING1_RDSTRB_SHIFT
8
|
|
#define
|
_EBI_RDTIMING1_RESETVALUE
0x00033F03UL
|
|
#define
|
_EBI_RDTIMING2_HALFRE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING2_HALFRE_MASK
0x10000000UL
|
|
#define
|
_EBI_RDTIMING2_HALFRE_SHIFT
28
|
|
#define
|
_EBI_RDTIMING2_MASK
0x70033F03UL
|
|
#define
|
_EBI_RDTIMING2_PAGEMODE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING2_PAGEMODE_MASK
0x40000000UL
|
|
#define
|
_EBI_RDTIMING2_PAGEMODE_SHIFT
30
|
|
#define
|
_EBI_RDTIMING2_PREFETCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING2_PREFETCH_MASK
0x20000000UL
|
|
#define
|
_EBI_RDTIMING2_PREFETCH_SHIFT
29
|
|
#define
|
_EBI_RDTIMING2_RDHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_RDTIMING2_RDHOLD_MASK
0x30000UL
|
|
#define
|
_EBI_RDTIMING2_RDHOLD_SHIFT
16
|
|
#define
|
_EBI_RDTIMING2_RDSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_RDTIMING2_RDSETUP_MASK
0x3UL
|
|
#define
|
_EBI_RDTIMING2_RDSETUP_SHIFT
0
|
|
#define
|
_EBI_RDTIMING2_RDSTRB_DEFAULT
0x0000003FUL
|
|
#define
|
_EBI_RDTIMING2_RDSTRB_MASK
0x3F00UL
|
|
#define
|
_EBI_RDTIMING2_RDSTRB_SHIFT
8
|
|
#define
|
_EBI_RDTIMING2_RESETVALUE
0x00033F03UL
|
|
#define
|
_EBI_RDTIMING3_HALFRE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING3_HALFRE_MASK
0x10000000UL
|
|
#define
|
_EBI_RDTIMING3_HALFRE_SHIFT
28
|
|
#define
|
_EBI_RDTIMING3_MASK
0x70033F03UL
|
|
#define
|
_EBI_RDTIMING3_PAGEMODE_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING3_PAGEMODE_MASK
0x40000000UL
|
|
#define
|
_EBI_RDTIMING3_PAGEMODE_SHIFT
30
|
|
#define
|
_EBI_RDTIMING3_PREFETCH_DEFAULT
0x00000000UL
|
|
#define
|
_EBI_RDTIMING3_PREFETCH_MASK
0x20000000UL
|
|
#define
|
_EBI_RDTIMING3_PREFETCH_SHIFT
29
|
|
#define
|
_EBI_RDTIMING3_RDHOLD_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_RDTIMING3_RDHOLD_MASK
0x30000UL
|
|
#define
|
_EBI_RDTIMING3_RDHOLD_SHIFT
16
|
|
#define
|
_EBI_RDTIMING3_RDSETUP_DEFAULT
0x00000003UL
|
|
#define
|
_EBI_RDTIMING3_RDSETUP_MASK
0x3UL
|
|
#define
|
_EBI_RDTIMING3_RDSETUP_SHIFT
0
|
|
#define
|
_EBI_RDTIMING3_RDSTRB_DEFAULT
0x0000003FUL
|
|
#define
|
_EBI_RDTIMING3_RDSTRB_MASK
0x3F00UL
|
|
#define
|
|