|
#define
|
_I2C_CLKDIV_DIV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CLKDIV_DIV_MASK
0x1FFUL
|
|
#define
|
_I2C_CLKDIV_DIV_SHIFT
0
|
|
#define
|
_I2C_CLKDIV_MASK
0x000001FFUL
|
|
#define
|
_I2C_CLKDIV_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_CMD_ABORT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_ABORT_MASK
0x20UL
|
|
#define
|
_I2C_CMD_ABORT_SHIFT
5
|
|
#define
|
_I2C_CMD_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_ACK_MASK
0x4UL
|
|
#define
|
_I2C_CMD_ACK_SHIFT
2
|
|
#define
|
_I2C_CMD_CLEARPC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_CLEARPC_MASK
0x80UL
|
|
#define
|
_I2C_CMD_CLEARPC_SHIFT
7
|
|
#define
|
_I2C_CMD_CLEARTX_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_CLEARTX_MASK
0x40UL
|
|
#define
|
_I2C_CMD_CLEARTX_SHIFT
6
|
|
#define
|
_I2C_CMD_CONT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_CONT_MASK
0x10UL
|
|
#define
|
_I2C_CMD_CONT_SHIFT
4
|
|
#define
|
_I2C_CMD_MASK
0x000000FFUL
|
|
#define
|
_I2C_CMD_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_NACK_MASK
0x8UL
|
|
#define
|
_I2C_CMD_NACK_SHIFT
3
|
|
#define
|
_I2C_CMD_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_CMD_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_START_MASK
0x1UL
|
|
#define
|
_I2C_CMD_START_SHIFT
0
|
|
#define
|
_I2C_CMD_STOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_STOP_MASK
0x2UL
|
|
#define
|
_I2C_CMD_STOP_SHIFT
1
|
|
#define
|
_I2C_CTRL_ARBDIS_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_ARBDIS_MASK
0x20UL
|
|
#define
|
_I2C_CTRL_ARBDIS_SHIFT
5
|
|
#define
|
_I2C_CTRL_AUTOACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_AUTOACK_MASK
0x4UL
|
|
#define
|
_I2C_CTRL_AUTOACK_SHIFT
2
|
|
#define
|
_I2C_CTRL_AUTOSE_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_AUTOSE_MASK
0x8UL
|
|
#define
|
_I2C_CTRL_AUTOSE_SHIFT
3
|
|
#define
|
_I2C_CTRL_AUTOSN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_AUTOSN_MASK
0x10UL
|
|
#define
|
_I2C_CTRL_AUTOSN_SHIFT
4
|
|
#define
|
_I2C_CTRL_BITO_160PCC
0x00000003UL
|
|
#define
|
_I2C_CTRL_BITO_40PCC
0x00000001UL
|
|
#define
|
_I2C_CTRL_BITO_80PCC
0x00000002UL
|
|
#define
|
_I2C_CTRL_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_BITO_MASK
0x3000UL
|
|
#define
|
_I2C_CTRL_BITO_OFF
0x00000000UL
|
|
#define
|
_I2C_CTRL_BITO_SHIFT
12
|
|
#define
|
_I2C_CTRL_CLHR_ASYMMETRIC
0x00000001UL
|
|
#define
|
_I2C_CTRL_CLHR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLHR_FAST
0x00000002UL
|
|
#define
|
_I2C_CTRL_CLHR_MASK
0x300UL
|
|
#define
|
_I2C_CTRL_CLHR_SHIFT
8
|
|
#define
|
_I2C_CTRL_CLHR_STANDARD
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLTO_1024PPC
0x00000005UL
|
|
#define
|
_I2C_CTRL_CLTO_160PCC
0x00000003UL
|
|
#define
|
_I2C_CTRL_CLTO_320PPC
0x00000004UL
|
|
#define
|
_I2C_CTRL_CLTO_40PCC
0x00000001UL
|
|
#define
|
_I2C_CTRL_CLTO_80PCC
0x00000002UL
|
|
#define
|
_I2C_CTRL_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLTO_MASK
0x70000UL
|
|
#define
|
_I2C_CTRL_CLTO_OFF
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLTO_SHIFT
16
|
|
#define
|
_I2C_CTRL_EN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_EN_MASK
0x1UL
|
|
#define
|
_I2C_CTRL_EN_SHIFT
0
|
|
#define
|
_I2C_CTRL_GCAMEN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_GCAMEN_MASK
0x40UL
|
|
#define
|
_I2C_CTRL_GCAMEN_SHIFT
6
|
|
#define
|
_I2C_CTRL_GIBITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_GIBITO_MASK
0x8000UL
|
|
#define
|
_I2C_CTRL_GIBITO_SHIFT
15
|
|
#define
|
_I2C_CTRL_MASK
0x0007B37FUL
|
|
#define
|
_I2C_CTRL_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_CTRL_SLAVE_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_SLAVE_MASK
0x2UL
|
|
#define
|
_I2C_CTRL_SLAVE_SHIFT
1
|
|
#define
|
_I2C_IEN_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IEN_ACK_SHIFT
6
|
|
#define
|
_I2C_IEN_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IEN_ADDR_SHIFT
2
|
|
#define
|
_I2C_IEN_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IEN_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IEN_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IEN_BITO_SHIFT
14
|
|
#define
|
_I2C_IEN_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IEN_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IEN_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IEN_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IEN_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IEN_CLTO_SHIFT
15
|
|
#define
|
_I2C_IEN_MASK
0x0001FFFFUL
|
|
#define
|
_I2C_IEN_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IEN_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IEN_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IEN_NACK_SHIFT
7
|
|
#define
|
_I2C_IEN_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_IEN_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IEN_RSTART_SHIFT
1
|
|
#define
|
_I2C_IEN_RXDATAV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RXDATAV_MASK
0x20UL
|
|
#define
|
_I2C_IEN_RXDATAV_SHIFT
5
|
|
#define
|
_I2C_IEN_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IEN_RXUF_SHIFT
13
|
|
#define
|
_I2C_IEN_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IEN_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IEN_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_START_MASK
0x1UL
|
|
#define
|
_I2C_IEN_START_SHIFT
0
|
|
#define
|
_I2C_IEN_TXBL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_TXBL_MASK
0x10UL
|
|
#define
|
_I2C_IEN_TXBL_SHIFT
4
|
|
#define
|
_I2C_IEN_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IEN_TXC_SHIFT
3
|
|
#define
|
_I2C_IEN_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IEN_TXOF_SHIFT
12
|
|
#define
|
_I2C_IF_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IF_ACK_SHIFT
6
|
|
#define
|
_I2C_IF_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IF_ADDR_SHIFT
2
|
|
#define
|
_I2C_IF_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IF_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IF_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IF_BITO_SHIFT
14
|
|
#define
|
_I2C_IF_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IF_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IF_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IF_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IF_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IF_CLTO_SHIFT
15
|
|
#define
|
_I2C_IF_MASK
0x0001FFFFUL
|
|
#define
|
_I2C_IF_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IF_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IF_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IF_NACK_SHIFT
7
|
|
#define
|
_I2C_IF_RESETVALUE
0x00000010UL
|
|
#define
|
_I2C_IF_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IF_RSTART_SHIFT
1
|
|
#define
|
_I2C_IF_RXDATAV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RXDATAV_MASK
0x20UL
|
|
#define
|
_I2C_IF_RXDATAV_SHIFT
5
|
|
#define
|
_I2C_IF_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IF_RXUF_SHIFT
13
|
|
#define
|
_I2C_IF_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IF_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IF_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_START_MASK
0x1UL
|
|
#define
|
_I2C_IF_START_SHIFT
0
|
|
#define
|
_I2C_IF_TXBL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_TXBL_MASK
0x10UL
|
|
#define
|
_I2C_IF_TXBL_SHIFT
4
|
|
#define
|
_I2C_IF_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IF_TXC_SHIFT
3
|
|
#define
|
_I2C_IF_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IF_TXOF_SHIFT
12
|
|
#define
|
_I2C_IFC_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IFC_ACK_SHIFT
6
|
|
#define
|
_I2C_IFC_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IFC_ADDR_SHIFT
2
|
|
#define
|
_I2C_IFC_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IFC_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IFC_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IFC_BITO_SHIFT
14
|
|
#define
|
_I2C_IFC_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IFC_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IFC_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IFC_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IFC_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IFC_CLTO_SHIFT
15
|
|
#define
|
_I2C_IFC_MASK
0x0001FFCFUL
|
|
#define
|
_I2C_IFC_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IFC_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IFC_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IFC_NACK_SHIFT
7
|
|
#define
|
_I2C_IFC_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_IFC_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IFC_RSTART_SHIFT
1
|
|
#define
|
_I2C_IFC_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IFC_RXUF_SHIFT
13
|
|
#define
|
_I2C_IFC_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IFC_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IFC_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_START_MASK
0x1UL
|
|
#define
|
_I2C_IFC_START_SHIFT
0
|
|
#define
|
_I2C_IFC_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IFC_TXC_SHIFT
3
|
|
#define
|
_I2C_IFC_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IFC_TXOF_SHIFT
12
|
|
#define
|
_I2C_IFS_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IFS_ACK_SHIFT
6
|
|
#define
|
_I2C_IFS_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IFS_ADDR_SHIFT
2
|
|
#define
|
_I2C_IFS_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IFS_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IFS_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IFS_BITO_SHIFT
14
|
|
#define
|
_I2C_IFS_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IFS_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IFS_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IFS_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IFS_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IFS_CLTO_SHIFT
15
|
|
#define
|
_I2C_IFS_MASK
0x0001FFCFUL
|
|
#define
|
_I2C_IFS_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IFS_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IFS_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IFS_NACK_SHIFT
7
|
|
#define
|
_I2C_IFS_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_IFS_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IFS_RSTART_SHIFT
1
|
|
#define
|
_I2C_IFS_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IFS_RXUF_SHIFT
13
|
|
#define
|
_I2C_IFS_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IFS_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IFS_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_START_MASK
0x1UL
|
|
#define
|
_I2C_IFS_START_SHIFT
0
|
|
#define
|
_I2C_IFS_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IFS_TXC_SHIFT
3
|
|
#define
|
_I2C_IFS_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IFS_TXOF_SHIFT
12
|
|
#define
|
_I2C_ROUTE_LOCATION_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC0
0x00000000UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC1
0x00000001UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC2
0x00000002UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC3
0x00000003UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC4
0x00000004UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC5
0x00000005UL
|
|
#define
|
_I2C_ROUTE_LOCATION_LOC6
0x00000006UL
|
|
#define
|
_I2C_ROUTE_LOCATION_MASK
0x700UL
|
|
#define
|
_I2C_ROUTE_LOCATION_SHIFT
8
|
|
#define
|
_I2C_ROUTE_MASK
0x00000703UL
|
|
#define
|
_I2C_ROUTE_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_ROUTE_SCLPEN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTE_SCLPEN_MASK
0x2UL
|
|
#define
|
_I2C_ROUTE_SCLPEN_SHIFT
1
|
|
#define
|
_I2C_ROUTE_SDAPEN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTE_SDAPEN_MASK
0x1UL
|
|
#define
|
_I2C_ROUTE_SDAPEN_SHIFT
0
|
|
#define
|
_I2C_RXDATA_MASK
0x000000FFUL
|
|
#define
|
_I2C_RXDATA_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_RXDATA_RXDATA_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDATA_RXDATA_MASK
0xFFUL
|
|
#define
|
_I2C_RXDATA_RXDATA_SHIFT
0
|
|
#define
|
_I2C_RXDATAP_MASK
0x000000FFUL
|
|
#define
|
_I2C_RXDATAP_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_RXDATAP_RXDATAP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDATAP_RXDATAP_MASK
0xFFUL
|
|
#define
|
_I2C_RXDATAP_RXDATAP_SHIFT
0
|
|
#define
|
_I2C_SADDR_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_SADDR_ADDR_MASK
0xFEUL
|
|
#define
|
_I2C_SADDR_ADDR_SHIFT
1
|
|
#define
|
_I2C_SADDR_MASK
0x000000FEUL
|
|
#define
|
_I2C_SADDR_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_SADDRMASK_MASK
0x000000FEUL
|
|
#define
|
_I2C_SADDRMASK_MASK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_SADDRMASK_MASK_MASK
0xFEUL
|
|
#define
|
_I2C_SADDRMASK_MASK_SHIFT
1
|
|
#define
|
_I2C_SADDRMASK_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_STATE_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_BUSHOLD_MASK
0x10UL
|
|
#define
|
_I2C_STATE_BUSHOLD_SHIFT
4
|
|
#define
|
_I2C_STATE_BUSY_DEFAULT
0x00000001UL
|
|
#define
|
_I2C_STATE_BUSY_MASK
0x1UL
|
|
#define
|
_I2C_STATE_BUSY_SHIFT
0
|
|
#define
|
_I2C_STATE_MASK
0x000000FFUL
|
|
#define
|
_I2C_STATE_MASTER_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_MASTER_MASK
0x2UL
|
|
#define
|
_I2C_STATE_MASTER_SHIFT
1
|
|
#define
|
_I2C_STATE_NACKED_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_NACKED_MASK
0x8UL
|
|
#define
|
_I2C_STATE_NACKED_SHIFT
3
|
|
#define
|
_I2C_STATE_RESETVALUE
0x00000001UL
|
|
#define
|
_I2C_STATE_STATE_ADDR
0x00000003UL
|
|
#define
|
_I2C_STATE_STATE_ADDRACK
0x00000004UL
|
|
#define
|
_I2C_STATE_STATE_DATA
0x00000005UL
|
|
#define
|
_I2C_STATE_STATE_DATAACK
0x00000006UL
|
|
#define
|
_I2C_STATE_STATE_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_STATE_IDLE
0x00000000UL
|
|
#define
|
_I2C_STATE_STATE_MASK
0xE0UL
|
|
#define
|
_I2C_STATE_STATE_SHIFT
5
|
|
#define
|
_I2C_STATE_STATE_START
0x00000002UL
|
|
#define
|
_I2C_STATE_STATE_WAIT
0x00000001UL
|
|
#define
|
_I2C_STATE_TRANSMITTER_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_TRANSMITTER_MASK
0x4UL
|
|
#define
|
_I2C_STATE_TRANSMITTER_SHIFT
2
|
|
#define
|
_I2C_STATUS_MASK
0x000001FFUL
|
|
#define
|
_I2C_STATUS_PABORT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PABORT_MASK
0x20UL
|
|
#define
|
_I2C_STATUS_PABORT_SHIFT
5
|
|
#define
|
_I2C_STATUS_PACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PACK_MASK
0x4UL
|
|
#define
|
_I2C_STATUS_PACK_SHIFT
2
|
|
#define
|
_I2C_STATUS_PCONT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PCONT_MASK
0x10UL
|
|
#define
|
_I2C_STATUS_PCONT_SHIFT
4
|
|
#define
|
_I2C_STATUS_PNACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PNACK_MASK
0x8UL
|
|
#define
|
_I2C_STATUS_PNACK_SHIFT
3
|
|
#define
|
_I2C_STATUS_PSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PSTART_MASK
0x1UL
|
|
#define
|
_I2C_STATUS_PSTART_SHIFT
0
|
|
#define
|
_I2C_STATUS_PSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PSTOP_MASK
0x2UL
|
|
#define
|
_I2C_STATUS_PSTOP_SHIFT
1
|
|
#define
|
_I2C_STATUS_RESETVALUE
0x00000080UL
|
|
#define
|
_I2C_STATUS_RXDATAV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_RXDATAV_MASK
0x100UL
|
|
#define
|
_I2C_STATUS_RXDATAV_SHIFT
8
|
|
#define
|
_I2C_STATUS_TXBL_DEFAULT
0x00000001UL
|
|
#define
|
_I2C_STATUS_TXBL_MASK
0x80UL
|
|
#define
|
_I2C_STATUS_TXBL_SHIFT
7
|
|
#define
|
_I2C_STATUS_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_TXC_MASK
0x40UL
|
|
#define
|
_I2C_STATUS_TXC_SHIFT
6
|
|
#define
|
_I2C_TXDATA_MASK
0x000000FFUL
|
|
#define
|
_I2C_TXDATA_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_TXDATA_TXDATA_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_TXDATA_TXDATA_MASK
0xFFUL
|
|
#define
|
_I2C_TXDATA_TXDATA_SHIFT
0
|
|
#define
|
I2C_CLKDIV_DIV_DEFAULT
(
_I2C_CLKDIV_DIV_DEFAULT
<< 0)
|
|
#define
|
I2C_CMD_ABORT
(0x1UL << 5)
|
|
#define
|
I2C_CMD_ABORT_DEFAULT
(
_I2C_CMD_ABORT_DEFAULT
<< 5)
|
|
#define
|
I2C_CMD_ACK
(0x1UL << 2)
|
|
#define
|
I2C_CMD_ACK_DEFAULT
(
_I2C_CMD_ACK_DEFAULT
<< 2)
|
|
#define
|
I2C_CMD_CLEARPC
(0x1UL << 7)
|
|
#define
|
I2C_CMD_CLEARPC_DEFAULT
(
_I2C_CMD_CLEARPC_DEFAULT
<< 7)
|
|
#define
|
I2C_CMD_CLEARTX
(0x1UL << 6)
|
|
#define
|
I2C_CMD_CLEARTX_DEFAULT
(
_I2C_CMD_CLEARTX_DEFAULT
<< 6)
|
|
#define
|
I2C_CMD_CONT
(0x1UL << 4)
|
|
#define
|
I2C_CMD_CONT_DEFAULT
(
_I2C_CMD_CONT_DEFAULT
<< 4)
|
|
#define
|
I2C_CMD_NACK
(0x1UL << 3)
|
|
#define
|
I2C_CMD_NACK_DEFAULT
(
_I2C_CMD_NACK_DEFAULT
<< 3)
|
|
#define
|
I2C_CMD_START
(0x1UL << 0)
|
|
#define
|
I2C_CMD_START_DEFAULT
(
_I2C_CMD_START_DEFAULT
<< 0)
|
|
#define
|
I2C_CMD_STOP
(0x1UL << 1)
|
|
#define
|
I2C_CMD_STOP_DEFAULT
(
_I2C_CMD_STOP_DEFAULT
<< 1)
|
|
#define
|
I2C_CTRL_ARBDIS
(0x1UL << 5)
|
|
#define
|
I2C_CTRL_ARBDIS_DEFAULT
(
_I2C_CTRL_ARBDIS_DEFAULT
<< 5)
|
|
#define
|
I2C_CTRL_AUTOACK
(0x1UL << 2)
|
|
#define
|
I2C_CTRL_AUTOACK_DEFAULT
(
_I2C_CTRL_AUTOACK_DEFAULT
<< 2)
|
|
#define
|
I2C_CTRL_AUTOSE
(0x1UL << 3)
|
|
#define
|
I2C_CTRL_AUTOSE_DEFAULT
(
_I2C_CTRL_AUTOSE_DEFAULT
<< 3)
|
|
#define
|
I2C_CTRL_AUTOSN
(0x1UL << 4)
|
|
#define
|
I2C_CTRL_AUTOSN_DEFAULT
(
_I2C_CTRL_AUTOSN_DEFAULT
<< 4)
|
|
#define
|
I2C_CTRL_BITO_160PCC
(
_I2C_CTRL_BITO_160PCC
<< 12)
|
|
#define
|
I2C_CTRL_BITO_40PCC
(
_I2C_CTRL_BITO_40PCC
<< 12)
|
|
#define
|
I2C_CTRL_BITO_80PCC
(
_I2C_CTRL_BITO_80PCC
<< 12)
|
|
#define
|
I2C_CTRL_BITO_DEFAULT
(
_I2C_CTRL_BITO_DEFAULT
<< 12)
|
|
#define
|
I2C_CTRL_BITO_OFF
(
_I2C_CTRL_BITO_OFF
<< 12)
|
|
#define
|
I2C_CTRL_CLHR_ASYMMETRIC
(
_I2C_CTRL_CLHR_ASYMMETRIC
<< 8)
|
|
#define
|
I2C_CTRL_CLHR_DEFAULT
(
_I2C_CTRL_CLHR_DEFAULT
<< 8)
|
|
#define
|
I2C_CTRL_CLHR_FAST
(
_I2C_CTRL_CLHR_FAST
<< 8)
|
|
#define
|
I2C_CTRL_CLHR_STANDARD
(
_I2C_CTRL_CLHR_STANDARD
<< 8)
|
|
#define
|
I2C_CTRL_CLTO_1024PPC
(
_I2C_CTRL_CLTO_1024PPC
<< 16)
|
|
#define
|
I2C_CTRL_CLTO_160PCC
(
_I2C_CTRL_CLTO_160PCC
<< 16)
|
|
#define
|
I2C_CTRL_CLTO_320PPC
(
_I2C_CTRL_CLTO_320PPC
<< 16)
|
|
#define
|
I2C_CTRL_CLTO_40PCC
(
_I2C_CTRL_CLTO_40PCC
<< 16)
|
|
#define
|
I2C_CTRL_CLTO_80PCC
(
_I2C_CTRL_CLTO_80PCC
<< 16)
|
|
#define
|
I2C_CTRL_CLTO_DEFAULT
(
_I2C_CTRL_CLTO_DEFAULT
<< 16)
|
|
#define
|
I2C_CTRL_CLTO_OFF
(
_I2C_CTRL_CLTO_OFF
<< 16)
|
|
#define
|
I2C_CTRL_EN
(0x1UL << 0)
|
|
#define
|
I2C_CTRL_EN_DEFAULT
(
_I2C_CTRL_EN_DEFAULT
<< 0)
|
|
#define
|
I2C_CTRL_GCAMEN
(0x1UL << 6)
|
|
#define
|
I2C_CTRL_GCAMEN_DEFAULT
(
_I2C_CTRL_GCAMEN_DEFAULT
<< 6)
|
|
#define
|
I2C_CTRL_GIBITO
(0x1UL << 15)
|
|
#define
|
I2C_CTRL_GIBITO_DEFAULT
(
_I2C_CTRL_GIBITO_DEFAULT
<< 15)
|
|
#define
|
I2C_CTRL_SLAVE
(0x1UL << 1)
|
|
#define
|
I2C_CTRL_SLAVE_DEFAULT
(
_I2C_CTRL_SLAVE_DEFAULT
<< 1)
|
|
#define
|
I2C_IEN_ACK
(0x1UL << 6)
|
|
#define
|
I2C_IEN_ACK_DEFAULT
(
_I2C_IEN_ACK_DEFAULT
<< 6)
|
|
#define
|
I2C_IEN_ADDR
(0x1UL << 2)
|
|
#define
|
I2C_IEN_ADDR_DEFAULT
(
_I2C_IEN_ADDR_DEFAULT
<< 2)
|
|
#define
|
I2C_IEN_ARBLOST
(0x1UL << 9)
|
|
#define
|
I2C_IEN_ARBLOST_DEFAULT
(
_I2C_IEN_ARBLOST_DEFAULT
<< 9)
|
|
#define
|
I2C_IEN_BITO
(0x1UL << 14)
|
|
#define
|
I2C_IEN_BITO_DEFAULT
(
_I2C_IEN_BITO_DEFAULT
<< 14)
|
|
#define
|
I2C_IEN_BUSERR
(0x1UL << 10)
|
|
#define
|
I2C_IEN_BUSERR_DEFAULT
(
_I2C_IEN_BUSERR_DEFAULT
<< 10)
|
|
#define
|
I2C_IEN_BUSHOLD
(0x1UL << 11)
|
|
#define
|
I2C_IEN_BUSHOLD_DEFAULT
(
_I2C_IEN_BUSHOLD_DEFAULT
<< 11)
|
|
#define
|
I2C_IEN_CLTO
(0x1UL << 15)
|
|
#define
|
I2C_IEN_CLTO_DEFAULT
(
_I2C_IEN_CLTO_DEFAULT
<< 15)
|
|
#define
|
I2C_IEN_MSTOP
(0x1UL << 8)
|
|
#define
|
I2C_IEN_MSTOP_DEFAULT
(
_I2C_IEN_MSTOP_DEFAULT
<< 8)
|
|
#define
|
|