EZR32HG_IDAC_BitFieldsDevices

Macros

#define _IDAC_CAL_MASK 0x0000007FUL
#define _IDAC_CAL_RESETVALUE 0x00000000UL
#define _IDAC_CAL_TUNING_DEFAULT 0x00000000UL
#define _IDAC_CAL_TUNING_MASK 0x7FUL
#define _IDAC_CAL_TUNING_SHIFT 0
#define _IDAC_CTRL_CURSINK_DEFAULT 0x00000000UL
#define _IDAC_CTRL_CURSINK_MASK 0x2UL
#define _IDAC_CTRL_CURSINK_SHIFT 1
#define _IDAC_CTRL_EN_DEFAULT 0x00000000UL
#define _IDAC_CTRL_EN_MASK 0x1UL
#define _IDAC_CTRL_EN_SHIFT 0
#define _IDAC_CTRL_MASK 0x0074001FUL
#define _IDAC_CTRL_MINOUTTRANS_DEFAULT 0x00000000UL
#define _IDAC_CTRL_MINOUTTRANS_MASK 0x4UL
#define _IDAC_CTRL_MINOUTTRANS_SHIFT 2
#define _IDAC_CTRL_OUTEN_DEFAULT 0x00000000UL
#define _IDAC_CTRL_OUTEN_MASK 0x8UL
#define _IDAC_CTRL_OUTEN_SHIFT 3
#define _IDAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL
#define _IDAC_CTRL_OUTENPRS_MASK 0x40000UL
#define _IDAC_CTRL_OUTENPRS_SHIFT 18
#define _IDAC_CTRL_OUTMODE_ADC 0x00000001UL
#define _IDAC_CTRL_OUTMODE_DEFAULT 0x00000000UL
#define _IDAC_CTRL_OUTMODE_MASK 0x10UL
#define _IDAC_CTRL_OUTMODE_PIN 0x00000000UL
#define _IDAC_CTRL_OUTMODE_SHIFT 4
#define _IDAC_CTRL_PRSSEL_DEFAULT 0x00000000UL
#define _IDAC_CTRL_PRSSEL_MASK 0x700000UL
#define _IDAC_CTRL_PRSSEL_PRSCH0 0x00000000UL
#define _IDAC_CTRL_PRSSEL_PRSCH1 0x00000001UL
#define _IDAC_CTRL_PRSSEL_PRSCH2 0x00000002UL
#define _IDAC_CTRL_PRSSEL_PRSCH3 0x00000003UL
#define _IDAC_CTRL_PRSSEL_PRSCH4 0x00000004UL
#define _IDAC_CTRL_PRSSEL_PRSCH5 0x00000005UL
#define _IDAC_CTRL_PRSSEL_SHIFT 20
#define _IDAC_CTRL_RESETVALUE 0x00000000UL
#define _IDAC_CURPROG_MASK 0x00001F03UL
#define _IDAC_CURPROG_RANGESEL_DEFAULT 0x00000000UL
#define _IDAC_CURPROG_RANGESEL_MASK 0x3UL
#define _IDAC_CURPROG_RANGESEL_RANGE0 0x00000000UL
#define _IDAC_CURPROG_RANGESEL_RANGE1 0x00000001UL
#define _IDAC_CURPROG_RANGESEL_RANGE2 0x00000002UL
#define _IDAC_CURPROG_RANGESEL_RANGE3 0x00000003UL
#define _IDAC_CURPROG_RANGESEL_SHIFT 0
#define _IDAC_CURPROG_RESETVALUE 0x00000000UL
#define _IDAC_CURPROG_STEPSEL_DEFAULT 0x00000000UL
#define _IDAC_CURPROG_STEPSEL_MASK 0x1F00UL
#define _IDAC_CURPROG_STEPSEL_SHIFT 8
#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT 0x00000000UL
#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_MASK 0x1UL
#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_SHIFT 0
#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT 0x00000000UL
#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK 0x2UL
#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT 1
#define _IDAC_DUTYCONFIG_MASK 0x00000003UL
#define _IDAC_DUTYCONFIG_RESETVALUE 0x00000000UL
#define IDAC_CAL_TUNING_DEFAULT ( _IDAC_CAL_TUNING_DEFAULT << 0)
#define IDAC_CTRL_CURSINK (0x1UL << 1)
#define IDAC_CTRL_CURSINK_DEFAULT ( _IDAC_CTRL_CURSINK_DEFAULT << 1)
#define IDAC_CTRL_EN (0x1UL << 0)
#define IDAC_CTRL_EN_DEFAULT ( _IDAC_CTRL_EN_DEFAULT << 0)
#define IDAC_CTRL_MINOUTTRANS (0x1UL << 2)
#define IDAC_CTRL_MINOUTTRANS_DEFAULT ( _IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)
#define IDAC_CTRL_OUTEN (0x1UL << 3)
#define IDAC_CTRL_OUTEN_DEFAULT ( _IDAC_CTRL_OUTEN_DEFAULT << 3)
#define IDAC_CTRL_OUTENPRS (0x1UL << 18)
#define IDAC_CTRL_OUTENPRS_DEFAULT ( _IDAC_CTRL_OUTENPRS_DEFAULT << 18)
#define IDAC_CTRL_OUTMODE (0x1UL << 4)
#define IDAC_CTRL_OUTMODE_ADC ( _IDAC_CTRL_OUTMODE_ADC << 4)
#define IDAC_CTRL_OUTMODE_DEFAULT ( _IDAC_CTRL_OUTMODE_DEFAULT << 4)
#define IDAC_CTRL_OUTMODE_PIN ( _IDAC_CTRL_OUTMODE_PIN << 4)
#define IDAC_CTRL_PRSSEL_DEFAULT ( _IDAC_CTRL_PRSSEL_DEFAULT << 20)
#define IDAC_CTRL_PRSSEL_PRSCH0 ( _IDAC_CTRL_PRSSEL_PRSCH0 << 20)
#define IDAC_CTRL_PRSSEL_PRSCH1 ( _IDAC_CTRL_PRSSEL_PRSCH1 << 20)
#define IDAC_CTRL_PRSSEL_PRSCH2 ( _IDAC_CTRL_PRSSEL_PRSCH2 << 20)
#define IDAC_CTRL_PRSSEL_PRSCH3 ( _IDAC_CTRL_PRSSEL_PRSCH3 << 20)
#define IDAC_CTRL_PRSSEL_PRSCH4 ( _IDAC_CTRL_PRSSEL_PRSCH4 << 20)
#define IDAC_CTRL_PRSSEL_PRSCH5 ( _IDAC_CTRL_PRSSEL_PRSCH5 << 20)
#define IDAC_CURPROG_RANGESEL_DEFAULT ( _IDAC_CURPROG_RANGESEL_DEFAULT << 0)
#define IDAC_CURPROG_RANGESEL_RANGE0 ( _IDAC_CURPROG_RANGESEL_RANGE0 << 0)
#define IDAC_CURPROG_RANGESEL_RANGE1 ( _IDAC_CURPROG_RANGESEL_RANGE1 << 0)
#define IDAC_CURPROG_RANGESEL_RANGE2 ( _IDAC_CURPROG_RANGESEL_RANGE2 << 0)
#define IDAC_CURPROG_RANGESEL_RANGE3 ( _IDAC_CURPROG_RANGESEL_RANGE3 << 0)
#define IDAC_CURPROG_STEPSEL_DEFAULT ( _IDAC_CURPROG_STEPSEL_DEFAULT << 8)
#define IDAC_DUTYCONFIG_DUTYCYCLEEN (0x1UL << 0)
#define IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT ( _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT << 0)
#define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS (0x1UL << 1)
#define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT ( _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)

Macro Definition Documentation

#define _IDAC_CAL_MASK   0x0000007FUL

Mask for IDAC_CAL

Definition at line 135 of file ezr32hg_idac.h .

#define _IDAC_CAL_RESETVALUE   0x00000000UL

Default value for IDAC_CAL

Definition at line 134 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() .

#define _IDAC_CAL_TUNING_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CAL

Definition at line 138 of file ezr32hg_idac.h .

#define _IDAC_CAL_TUNING_MASK   0x7FUL

Bit mask for IDAC_TUNING

Definition at line 137 of file ezr32hg_idac.h .

#define _IDAC_CAL_TUNING_SHIFT   0

Shift value for IDAC_TUNING

Definition at line 136 of file ezr32hg_idac.h .

#define _IDAC_CTRL_CURSINK_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 70 of file ezr32hg_idac.h .

#define _IDAC_CTRL_CURSINK_MASK   0x2UL

Bit mask for IDAC_CURSINK

Definition at line 69 of file ezr32hg_idac.h .

#define _IDAC_CTRL_CURSINK_SHIFT   1

Shift value for IDAC_CURSINK

Definition at line 68 of file ezr32hg_idac.h .

#define _IDAC_CTRL_EN_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 65 of file ezr32hg_idac.h .

#define _IDAC_CTRL_EN_MASK   0x1UL

Bit mask for IDAC_EN

Definition at line 64 of file ezr32hg_idac.h .

#define _IDAC_CTRL_EN_SHIFT   0

Shift value for IDAC_EN

Definition at line 63 of file ezr32hg_idac.h .

Referenced by IDAC_Enable() .

#define _IDAC_CTRL_MASK   0x0074001FUL

Mask for IDAC_CTRL

Definition at line 61 of file ezr32hg_idac.h .

#define _IDAC_CTRL_MINOUTTRANS_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 75 of file ezr32hg_idac.h .

#define _IDAC_CTRL_MINOUTTRANS_MASK   0x4UL

Bit mask for IDAC_MINOUTTRANS

Definition at line 74 of file ezr32hg_idac.h .

#define _IDAC_CTRL_MINOUTTRANS_SHIFT   2

Shift value for IDAC_MINOUTTRANS

Definition at line 73 of file ezr32hg_idac.h .

Referenced by IDAC_MinimalOutputTransitionMode() .

#define _IDAC_CTRL_OUTEN_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 80 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTEN_MASK   0x8UL

Bit mask for IDAC_OUTEN

Definition at line 79 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTEN_SHIFT   3

Shift value for IDAC_OUTEN

Definition at line 78 of file ezr32hg_idac.h .

Referenced by IDAC_OutEnable() .

#define _IDAC_CTRL_OUTENPRS_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 94 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTENPRS_MASK   0x40000UL

Bit mask for IDAC_OUTENPRS

Definition at line 93 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTENPRS_SHIFT   18

Shift value for IDAC_OUTENPRS

Definition at line 92 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTMODE_ADC   0x00000001UL

Mode ADC for IDAC_CTRL

Definition at line 87 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTMODE_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 85 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTMODE_MASK   0x10UL

Bit mask for IDAC_OUTMODE

Definition at line 84 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTMODE_PIN   0x00000000UL

Mode PIN for IDAC_CTRL

Definition at line 86 of file ezr32hg_idac.h .

#define _IDAC_CTRL_OUTMODE_SHIFT   4

Shift value for IDAC_OUTMODE

Definition at line 83 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CTRL

Definition at line 98 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_MASK   0x700000UL

Bit mask for IDAC_PRSSEL

Definition at line 97 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_PRSCH0   0x00000000UL

Mode PRSCH0 for IDAC_CTRL

Definition at line 99 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_PRSCH1   0x00000001UL

Mode PRSCH1 for IDAC_CTRL

Definition at line 100 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_PRSCH2   0x00000002UL

Mode PRSCH2 for IDAC_CTRL

Definition at line 101 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_PRSCH3   0x00000003UL

Mode PRSCH3 for IDAC_CTRL

Definition at line 102 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_PRSCH4   0x00000004UL

Mode PRSCH4 for IDAC_CTRL

Definition at line 103 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_PRSCH5   0x00000005UL

Mode PRSCH5 for IDAC_CTRL

Definition at line 104 of file ezr32hg_idac.h .

#define _IDAC_CTRL_PRSSEL_SHIFT   20

Shift value for IDAC_PRSSEL

Definition at line 96 of file ezr32hg_idac.h .

#define _IDAC_CTRL_RESETVALUE   0x00000000UL

Default value for IDAC_CTRL

Definition at line 60 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() .

#define _IDAC_CURPROG_MASK   0x00001F03UL

Mask for IDAC_CURPROG

Definition at line 115 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_RANGESEL_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CURPROG

Definition at line 118 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_RANGESEL_MASK   0x3UL

Bit mask for IDAC_RANGESEL

Definition at line 117 of file ezr32hg_idac.h .

Referenced by IDAC_RangeSet() .

#define _IDAC_CURPROG_RANGESEL_RANGE0   0x00000000UL

Mode RANGE0 for IDAC_CURPROG

Definition at line 119 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_RANGESEL_RANGE1   0x00000001UL

Mode RANGE1 for IDAC_CURPROG

Definition at line 120 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_RANGESEL_RANGE2   0x00000002UL

Mode RANGE2 for IDAC_CURPROG

Definition at line 121 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_RANGESEL_RANGE3   0x00000003UL

Mode RANGE3 for IDAC_CURPROG

Definition at line 122 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_RANGESEL_SHIFT   0

Shift value for IDAC_RANGESEL

Definition at line 116 of file ezr32hg_idac.h .

Referenced by IDAC_RangeSet() .

#define _IDAC_CURPROG_RESETVALUE   0x00000000UL

Default value for IDAC_CURPROG

Definition at line 114 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() .

#define _IDAC_CURPROG_STEPSEL_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_CURPROG

Definition at line 130 of file ezr32hg_idac.h .

#define _IDAC_CURPROG_STEPSEL_MASK   0x1F00UL

Bit mask for IDAC_STEPSEL

Definition at line 129 of file ezr32hg_idac.h .

Referenced by IDAC_StepSet() .

#define _IDAC_CURPROG_STEPSEL_SHIFT   8

Shift value for IDAC_STEPSEL

Definition at line 128 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() , and IDAC_StepSet() .

#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_DUTYCONFIG

Definition at line 147 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_MASK   0x1UL

Bit mask for IDAC_DUTYCYCLEEN

Definition at line 146 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_DUTYCYCLEEN_SHIFT   0

Shift value for IDAC_DUTYCYCLEEN

Definition at line 145 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT   0x00000000UL

Mode DEFAULT for IDAC_DUTYCONFIG

Definition at line 152 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK   0x2UL

Bit mask for IDAC_EM2DUTYCYCLEDIS

Definition at line 151 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT   1

Shift value for IDAC_EM2DUTYCYCLEDIS

Definition at line 150 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_MASK   0x00000003UL

Mask for IDAC_DUTYCONFIG

Definition at line 143 of file ezr32hg_idac.h .

#define _IDAC_DUTYCONFIG_RESETVALUE   0x00000000UL

Default value for IDAC_DUTYCONFIG

Definition at line 142 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() .

#define IDAC_CAL_TUNING_DEFAULT   ( _IDAC_CAL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for IDAC_CAL

Definition at line 139 of file ezr32hg_idac.h .

#define IDAC_CTRL_CURSINK   (0x1UL << 1)

Current Sink Enable

Definition at line 67 of file ezr32hg_idac.h .

Referenced by IDAC_Init() , and IDAC_RangeSet() .

#define IDAC_CTRL_CURSINK_DEFAULT   ( _IDAC_CTRL_CURSINK_DEFAULT << 1)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 71 of file ezr32hg_idac.h .

#define IDAC_CTRL_EN   (0x1UL << 0)

Current DAC Enable

Definition at line 62 of file ezr32hg_idac.h .

Referenced by IDAC_Init() , and IDAC_Reset() .

#define IDAC_CTRL_EN_DEFAULT   ( _IDAC_CTRL_EN_DEFAULT << 0)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 66 of file ezr32hg_idac.h .

#define IDAC_CTRL_MINOUTTRANS   (0x1UL << 2)

Minimum Output Transition Enable

Definition at line 72 of file ezr32hg_idac.h .

#define IDAC_CTRL_MINOUTTRANS_DEFAULT   ( _IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 76 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTEN   (0x1UL << 3)

Output Enable

Definition at line 77 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTEN_DEFAULT   ( _IDAC_CTRL_OUTEN_DEFAULT << 3)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 81 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTENPRS   (0x1UL << 18)

PRS Controlled Output Enable

Definition at line 91 of file ezr32hg_idac.h .

Referenced by IDAC_Init() .

#define IDAC_CTRL_OUTENPRS_DEFAULT   ( _IDAC_CTRL_OUTENPRS_DEFAULT << 18)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 95 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTMODE   (0x1UL << 4)

Output Modes

Definition at line 82 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTMODE_ADC   ( _IDAC_CTRL_OUTMODE_ADC << 4)

Shifted mode ADC for IDAC_CTRL

Definition at line 90 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTMODE_DEFAULT   ( _IDAC_CTRL_OUTMODE_DEFAULT << 4)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 88 of file ezr32hg_idac.h .

#define IDAC_CTRL_OUTMODE_PIN   ( _IDAC_CTRL_OUTMODE_PIN << 4)

Shifted mode PIN for IDAC_CTRL

Definition at line 89 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_DEFAULT   ( _IDAC_CTRL_PRSSEL_DEFAULT << 20)

Shifted mode DEFAULT for IDAC_CTRL

Definition at line 105 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_PRSCH0   ( _IDAC_CTRL_PRSSEL_PRSCH0 << 20)

Shifted mode PRSCH0 for IDAC_CTRL

Definition at line 106 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_PRSCH1   ( _IDAC_CTRL_PRSSEL_PRSCH1 << 20)

Shifted mode PRSCH1 for IDAC_CTRL

Definition at line 107 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_PRSCH2   ( _IDAC_CTRL_PRSSEL_PRSCH2 << 20)

Shifted mode PRSCH2 for IDAC_CTRL

Definition at line 108 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_PRSCH3   ( _IDAC_CTRL_PRSSEL_PRSCH3 << 20)

Shifted mode PRSCH3 for IDAC_CTRL

Definition at line 109 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_PRSCH4   ( _IDAC_CTRL_PRSSEL_PRSCH4 << 20)

Shifted mode PRSCH4 for IDAC_CTRL

Definition at line 110 of file ezr32hg_idac.h .

#define IDAC_CTRL_PRSSEL_PRSCH5   ( _IDAC_CTRL_PRSSEL_PRSCH5 << 20)

Shifted mode PRSCH5 for IDAC_CTRL

Definition at line 111 of file ezr32hg_idac.h .

#define IDAC_CURPROG_RANGESEL_DEFAULT   ( _IDAC_CURPROG_RANGESEL_DEFAULT << 0)

Shifted mode DEFAULT for IDAC_CURPROG

Definition at line 123 of file ezr32hg_idac.h .

#define IDAC_CURPROG_RANGESEL_RANGE0   ( _IDAC_CURPROG_RANGESEL_RANGE0 << 0)

Shifted mode RANGE0 for IDAC_CURPROG

Definition at line 124 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() .

#define IDAC_CURPROG_RANGESEL_RANGE1   ( _IDAC_CURPROG_RANGESEL_RANGE1 << 0)

Shifted mode RANGE1 for IDAC_CURPROG

Definition at line 125 of file ezr32hg_idac.h .

#define IDAC_CURPROG_RANGESEL_RANGE2   ( _IDAC_CURPROG_RANGESEL_RANGE2 << 0)

Shifted mode RANGE2 for IDAC_CURPROG

Definition at line 126 of file ezr32hg_idac.h .

#define IDAC_CURPROG_RANGESEL_RANGE3   ( _IDAC_CURPROG_RANGESEL_RANGE3 << 0)

Shifted mode RANGE3 for IDAC_CURPROG

Definition at line 127 of file ezr32hg_idac.h .

#define IDAC_CURPROG_STEPSEL_DEFAULT   ( _IDAC_CURPROG_STEPSEL_DEFAULT << 8)

Shifted mode DEFAULT for IDAC_CURPROG

Definition at line 131 of file ezr32hg_idac.h .

#define IDAC_DUTYCONFIG_DUTYCYCLEEN   (0x1UL << 0)

Duty Cycle Enable.

Definition at line 144 of file ezr32hg_idac.h .

Referenced by IDAC_Reset() .

#define IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT   ( _IDAC_DUTYCONFIG_DUTYCYCLEEN_DEFAULT << 0)

Shifted mode DEFAULT for IDAC_DUTYCONFIG

Definition at line 148 of file ezr32hg_idac.h .

#define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS   (0x1UL << 1)

EM2/EM3 Duty Cycle Disable.

Definition at line 149 of file ezr32hg_idac.h .

#define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT   ( _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)

Shifted mode DEFAULT for IDAC_DUTYCONFIG

Definition at line 153 of file ezr32hg_idac.h .