Ksz8851snlKit Drivers

Detailed Description

KSZ8851SNL SPI Ethernet Controller driver.

The KSZ8851SNL is a single-chip ethernet controller which supports 10/100 Mbps full and half-duplex communication. It has integrated 12KiB RX FIFO and a 6KiB TX FIFO and it is controlled using SPI. This module contains functions for the necessary SPI commands for reading/writing registers and reading from and writing to the FIFOs.

Data Structures

struct  KSZ8851SLN_mib_s
 The MIB (Management Information Base) Counters that the ksz8851snl device expose to the host.
 

Macros

#define AUTO_NEG   0x1000
 
#define BLOCKING_RECEIVE   0
 
#define BYTE_MASK   0x00FF
 
#define BYTE_SIZE   0x0008
 
#define CHECKSUM_VALID_FRAME_MASK   0x3C17
 
#define CHIP_ID_MASK   0xFFF0
 
#define CIDER   0xC0
 
#define CLEAR_INT   0xFFFF
 
#define DIGITAL_LOOPBACK   0x4000
 
#define EXTRA_SIZE   0x0008
 
#define FCHWR   0xB2
 
#define FCLWR   0xB0
 
#define FD_PTR_AUTO_INC   0x4000
 
#define FORCE_100   0x2000
 
#define FORCE_FULL_DUPLEX   0x0100
 
#define FRAME_COUNT_THRESHOLD   1
 
#define FRAME_ID_MASK   0x003F
 
#define GLOBAL_SOFT_RESET   0x0001
 
#define GRR   0x26
 
#define HIGH_QMU_MAC_H   0x00
 
#define HIGH_QMU_MAC_L   0x0B
 
#define IACR   0xC8
 
#define IADHR   0xD2
 
#define IADLR   0xD0
 
#define IER   0x90
 
#define ISR   0x92
 
#define KSZ8851SNL_CHIP_ID   0x8870
 
#define KSZ8851SNL_INT_ENABLE_MASK
 
#define KSZ8851SNL_INT_ENERGY   0x0004
 
#define KSZ8851SNL_INT_LINK_CHANGE   0x8000
 
#define KSZ8851SNL_INT_LINKUP   0x0008
 
#define KSZ8851SNL_INT_MAGIC   0x0010
 
#define KSZ8851SNL_INT_RX_DONE   0x2000
 
#define KSZ8851SNL_INT_RX_OVERRUN   0x0800
 
#define KSZ8851SNL_INT_RX_STOPPED   0x0100
 
#define KSZ8851SNL_INT_RX_WOL_FRAME   0x0020
 
#define KSZ8851SNL_INT_SPI_ERROR   0x0002
 
#define KSZ8851SNL_INT_TX_DONE   0x4000
 
#define KSZ8851SNL_INT_TX_SPACE   0x0040
 
#define KSZ8851SNL_INT_TX_STOPPED   0x0200
 
#define LSB_MASK   0x00FF
 
#define MARH   0x14
 
#define MARL   0x10
 
#define MARM   0x12
 
#define MIB_MASK   0x1C00
 
#define MIB_Rx1024to1521Octets   0x13
 
#define MIB_Rx128to255Octets   0x10
 
#define MIB_Rx1522to2000Octets   0x14
 
#define MIB_Rx256to511Octets   0x11
 
#define MIB_Rx512to1023Octets   0x12
 
#define MIB_Rx64Octets   0x0E
 
#define MIB_Rx65to127Octets   0x0F
 
#define MIB_RxAlignmentError   0x08
 
#define MIB_RxBroadcast   0x0B
 
#define MIB_RxByte   0x00
 
#define MIB_RxControl8808Pkts   0x09
 
#define MIB_RxCRCError   0x07
 
#define MIB_RxFragments   0x03
 
#define MIB_RxJabbers   0x05
 
#define MIB_RxMulticast   0x0C
 
#define MIB_RxOversize   0x04
 
#define MIB_RxPausePkts   0x0A
 
#define MIB_RxSymbolError   0x06
 
#define MIB_RxUndersizePkt   0x02
 
#define MIB_RxUnicast   0x0D
 
#define MIB_TxBroadcastPkts   0x18
 
#define MIB_TxByte   0x15
 
#define MIB_TxDeferred   0x1B
 
#define MIB_TxExcessiveCollision   0x1D
 
#define MIB_TxLateCollision   0x16
 
#define MIB_TxMulticastPkts   0x19
 
#define MIB_TxMultipleCollision   0x1F
 
#define MIB_TxPausePkts   0x17
 
#define MIB_TxSingleCollision   0x1E
 
#define MIB_TxTotalCollision   0x1C
 
#define MIB_TxUnicastPkts   0x1A
 
#define MIB_XXX   0x01
 
#define MID_QMU_MAC_H   0x57
 
#define MSB_POS   0x0008
 
#define NO_INT   0x0000
 
#define OBCR   0x20
 
#define ONE_FRAME_THRES   0x0001
 
#define P1CR   0xF6
 
#define P1MBCR   0xE4
 
#define P1SR   0xF8
 
#define PHY_RESET   0x0001
 
#define PHYRR   0xD8
 
#define PMECR   0xD4
 
#define PORT1_AN_DONE   0x0040
 
#define PORT1_AUTO_MDIX_DISABLE   0x0400
 
#define PORT1_AUTO_NEG_100BTX   0x0004
 
#define PORT1_AUTO_NEG_100BTX_FD   0x0008
 
#define PORT1_AUTO_NEG_10BT   0x0001
 
#define PORT1_AUTO_NEG_10BT_FD   0x0002
 
#define PORT1_AUTO_NEG_ENABLE   0x0080
 
#define PORT1_AUTO_NEG_FLOW_CTRL   0x0010
 
#define PORT1_AUTO_NEG_RESTART   0x2000
 
#define PORT1_CONFIG
 
#define PORT1_FORCE_100_MBIT   0x0040
 
#define PORT1_FORCE_FULL_DUPLEX   0x0020
 
#define PORT1_FORCE_MDIX   0x0200
 
#define PORT1_LED_OFF   0x8000
 
#define PORT1_LINK_GOOD   0x0020
 
#define PORT1_POWER_DOWN   0x0800
 
#define PORT1_TX_DISABLE   0x4000
 
#define QMU_MODULE_SOFT_RESET   0x0002
 
#define RESTART_AUTO_NEG   0x0200
 
#define RX_BYTE_CNT_MASK   0x0FFF
 
#define RX_FLOW_CTRL1_CONFIG
 
#define RX_FLOW_CTRL2_CONFIG
 
#define RX_FLOW_CTRL_BAD_PACKET   0x0200
 
#define RX_FLOW_CTRL_BLOCK_MAC   0x0001
 
#define RX_FLOW_CTRL_BROADCAST_ENABLE   0x0080
 
#define RX_FLOW_CTRL_BURST_LEN_16   0x0040
 
#define RX_FLOW_CTRL_BURST_LEN_32   0x0060
 
#define RX_FLOW_CTRL_BURST_LEN_4   0x0000
 
#define RX_FLOW_CTRL_BURST_LEN_8   0x0020
 
#define RX_FLOW_CTRL_BURST_LEN_FRAME   0x0080
 
#define RX_FLOW_CTRL_BURST_LEN_MASK   0x00E0
 
#define RX_FLOW_CTRL_FLOW_ENENABLE   0x0400
 
#define RX_FLOW_CTRL_FLUSH_QUEUE   0x8000
 
#define RX_FLOW_CTRL_ICMP_CHECKSUM   0x0002
 
#define RX_FLOW_CTRL_INVERSE_FILTER   0x0002
 
#define RX_FLOW_CTRL_IP_CHECKSUM   0x1000
 
#define RX_FLOW_CTRL_IPV6_UDP_FRAG_PASS   0x0010
 
#define RX_FLOW_CTRL_IPV6_UDP_ZERO_PASS   0x0008
 
#define RX_FLOW_CTRL_MAC_FILTER   0x0800
 
#define RX_FLOW_CTRL_MULTICAST_ENABLE   0x0040
 
#define RX_FLOW_CTRL_PROMISCUOUS_MODE   0x0012
 
#define RX_FLOW_CTRL_RX_ALL   0x0010
 
#define RX_FLOW_CTRL_RX_ENABLE   0x0001
 
#define RX_FLOW_CTRL_TCP_CHECKSUM   0x2000
 
#define RX_FLOW_CTRL_UDP_CHECKSUM   0x4000
 
#define RX_FLOW_CTRL_UDP_LITE_CHECKSUM   0x0004
 
#define RX_FLOW_CTRL_UNICAST_ENABLE   0x0020
 
#define RXCR1   0x74
 
#define RXCR2   0x76
 
#define RXFCTR   0x9C
 
#define RXFDPR   0x86
 
#define RXFHBCR   0x7E
 
#define RXFHSR   0x7C
 
#define RXQ_AUTO_DEQUEUE   0x0010
 
#define RXQ_CMD_CONFIG
 
#define RXQ_EN_ON_BYTE_CNT_INT   0x0040
 
#define RXQ_EN_ON_FRAME_CNT_INT   0x0020
 
#define RXQ_EN_ON_TIME_INT   0x0080
 
#define RXQ_ON_BYTE_CNT_INT   0x0800
 
#define RXQ_ON_FRAME_CNT_INT   0x0400
 
#define RXQ_ON_TIME_INT   0x1000
 
#define RXQ_RELEASE_ERROR_FRAME   0x0001
 
#define RXQ_START_DMA   0x0008
 
#define RXQ_TWOBYTE_OFFSET   0x0200
 
#define RXQCR   0x82
 
#define TX_FLOW_CTRL_CONFIG
 
#define TX_FLOW_CTRL_CRC_ENABLE   0x0002
 
#define TX_FLOW_CTRL_ENABLE   0x0001
 
#define TX_FLOW_CTRL_FLOW_ENABLE   0x0008
 
#define TX_FLOW_CTRL_FLUSH_QUEUE   0x0010
 
#define TX_FLOW_CTRL_ICMP_CHECKSUM   0x0100
 
#define TX_FLOW_CTRL_IP_CHECKSUM   0x0020
 
#define TX_FLOW_CTRL_PAD_ENABLE   0x0004
 
#define TX_FLOW_CTRL_TCP_CHECKSUM   0x0040
 
#define TX_INT_on_COMPLETION   0x8000
 
#define TX_MEM_AVAIL_MASK   0x1FFF
 
#define TX_MEMORY_WAIT_MS   500
 
#define TXCR   0x70
 
#define TXFDPR   0x84
 
#define TXMIR   0x78
 
#define TXNTFSR   0x9E
 
#define TXQ_AUTO_ENQUEUE   0x0004
 
#define TXQ_ENQUEUE   0x0001
 
#define TXQ_MEM_AVAILABLE_INT   0x0002
 
#define TXQCR   0x80
 
#define VALID_FRAME_MASK   0x8000
 
#define WATERMARK_4KB   0x0400
 
#define WATERMARK_6KB   0x0600
 
#define WORD_SIZE   0x0004
 

Typedefs

typedef struct KSZ8851SLN_mib_s KSZ8851SLN_mib_t
 The MIB (Management Information Base) Counters that the ksz8851snl device expose to the host.
 

Functions

void KSZ8851SNL_AllRegistersDump (void)
 Prints the value of the registers of the ethernet controller.
 
void KSZ8851SNL_Enable (void)
 Enable RX and TX.
 
uint16_t KSZ8851SNL_FrameCounterGet (void)
 FrameCounter.
 
void KSZ8851SNL_FrameCounterSet (void)
 FrameCounter.
 
void KSZ8851SNL_Init (void)
 Initialize the registers of the ethernet controller.
 
void KSZ8851SNL_IntClear (uint16_t flags)
 Clear interrupt flags.
 
void KSZ8851SNL_IntDisable (void)
 disables the chip interrupts
 
void KSZ8851SNL_IntEnable (void)
 enables the chip interrupts
 
uint16_t KSZ8851SNL_IntGet (void)
 Get interrupt flags.
 
void KSZ8851SNL_MacAddressGet (uint8_t *macAddress)
 Get the MAC address of the current board.
 
void KSZ8851SNL_MIBCountersDump (void)
 Dumps the Management Information Base Counters.
 
void KSZ8851SNL_MIBCountersUpdate (void)
 Update the Management Information Base Counters.
 
uint16_t KSZ8851SNL_PHYStatusGet (void)
 Get the PHY status.
 
void KSZ8851SNL_PMECRStatusClear (uint16_t flags)
 Clear PMECR (Power Management Event Control Register) flags.
 
uint16_t KSZ8851SNL_Receive (uint16_t length, uint8_t *buffer)
 Performs the actual receive of a raw frame over the network.
 
void KSZ8851SNL_RegistersDump (void)
 Prints the value of the registers of the ethernet controller.
 
uint16_t KSZ8851SNL_RXQCRGet (void)
 Get RXQCR register.
 
void KSZ8851SNL_RxQueueReset (void)
 Reset RxQueue.
 
void KSZ8851SNL_SPI_Init (void)
 KSZ8851SNL_SPI_Init Initialize SPI interface to Ethernet controller.
 
void KSZ8851SNL_SPI_ReadFifo (int numBytes, uint8_t *data)
 Read data from the ethernet controller RX FIFO.
 
uint16_t KSZ8851SNL_SPI_ReadRegister (uint8_t reg)
 Read ethernet controller register.
 
void KSZ8851SNL_SPI_WriteFifo (int numBytes, const uint8_t *data)
 Continue writing ethernet controller FIFO.
 
void KSZ8851SNL_SPI_WriteFifoBegin (void)
 Start writing to the ethernet controller FIFO.
 
void KSZ8851SNL_SPI_WriteFifoEnd (void)
 Stop read/write the ethernet controller FIFO.
 
void KSZ8851SNL_SPI_WriteRegister (uint8_t reg, uint16_t value)
 Write ethernet controller register.
 
void KSZ8851SNL_Transmit (uint16_t length, const uint8_t *buffer)
 Transmit a chunk of data to the ethernet controller. The chunk can be either a full ethernet frame or a partial chunk of an ethernet frame.
 
bool KSZ8851SNL_TransmitBegin (uint16_t length)
 Prepares for a transmission of an ethernet frame over the network.
 
void KSZ8851SNL_TransmitEnd (uint16_t length)
 Ends a transmission of an ethernet frame to the ethernet controller.
 
void KSZ8851SNL_TxQueueReset (void)
 Reset TxQueue.
 
static uint32_t MIBCountersRead (uint16_t offset)
 helper function for KSZ8851SNL_UpdateMIBCounters
 
static void ReleaseIncosistentFrame (void)
 Release the current frame if it is inconsistent.
 

Variables

static KSZ8851SLN_mib_t mibCounters
 Copy of the current MIB counters values from the ksz8851snl. This is updated by calling KSZ8851SNL_MIBCountersUpdate.
 

Macro Definition Documentation

#define AUTO_NEG   0x1000

Force auto negotiation

Definition at line 299 of file ksz8851snl.c.

#define BLOCKING_RECEIVE   0

Determines if receive will block

Definition at line 97 of file ksz8851snl.c.

#define BYTE_MASK   0x00FF

Used to mask the LSB

Definition at line 104 of file ksz8851snl.c.

#define BYTE_SIZE   0x0008

Used to mark the MSB pos

Definition at line 105 of file ksz8851snl.c.

#define CHECKSUM_VALID_FRAME_MASK   0x3C17

CRC OK for ICMP, IP, TCP, UDP MII error Frame too long error

Definition at line 81 of file ksz8851snl.c.

#define CHIP_ID_MASK   0xFFF0

Used to mask the revision ID

Definition at line 74 of file ksz8851snl.c.

#define CIDER   0xC0

Chip ID and Enable Register

Definition at line 63 of file ksz8851snl.c.

#define CLEAR_INT   0xFFFF

Used to clear INT_STATUS_REG

Definition at line 77 of file ksz8851snl.c.

#define DIGITAL_LOOPBACK   0x4000

Enable Digital loopback mode

Definition at line 295 of file ksz8851snl.c.

#define EXTRA_SIZE   0x0008

Needed for the frame header

Definition at line 96 of file ksz8851snl.c.

#define FCHWR   0xB2

Configure High Watermark to 4KByte

Definition at line 62 of file ksz8851snl.c.

#define FCLWR   0xB0

Configure Low Watermark to 6KByte

Definition at line 61 of file ksz8851snl.c.

#define FD_PTR_AUTO_INC   0x4000

Used to reset the FD pointer

Definition at line 76 of file ksz8851snl.c.

#define FORCE_100   0x2000

Force the speed to 100MBps

Definition at line 297 of file ksz8851snl.c.

#define FORCE_FULL_DUPLEX   0x0100

Force full duplex

Definition at line 303 of file ksz8851snl.c.

#define FRAME_COUNT_THRESHOLD   1

Receive Frame Count Threshold to use in RXFCTR

Definition at line 309 of file ksz8851snl.c.

#define FRAME_ID_MASK   0x003F

Used to mask the reserved bits

Definition at line 80 of file ksz8851snl.c.

#define GLOBAL_SOFT_RESET   0x0001

Global reset

Definition at line 288 of file ksz8851snl.c.

#define GRR   0x26

Global Reset Register

Definition at line 46 of file ksz8851snl.c.

#define HIGH_QMU_MAC_H   0x00

1st segment of the MAC address

Definition at line 101 of file ksz8851snl.c.

#define HIGH_QMU_MAC_L   0x0B

2nd segment of the MAC address

Definition at line 102 of file ksz8851snl.c.

#define IACR   0xC8

Indirect access control Register

Definition at line 64 of file ksz8851snl.c.

#define IADHR   0xD2

Indirect access data high Register

Definition at line 66 of file ksz8851snl.c.

#define IADLR   0xD0

Indirect access data low Register

Definition at line 65 of file ksz8851snl.c.

#define IER   0x90

Interrupt Enable Register

Definition at line 57 of file ksz8851snl.c.

#define ISR   0x92

Interrupt Status Register

Definition at line 58 of file ksz8851snl.c.

#define KSZ8851SNL_CHIP_ID   0x8870

Default Chip ID for KSZ8851SNL

Definition at line 73 of file ksz8851snl.c.

#define KSZ8851SNL_INT_ENABLE_MASK
Value:
#define KSZ8851SNL_INT_RX_DONE
Definition: ksz8851snl.h:50
#define KSZ8851SNL_INT_LINK_CHANGE
Definition: ksz8851snl.h:46
#define KSZ8851SNL_INT_SPI_ERROR
Definition: ksz8851snl.h:68
#define KSZ8851SNL_INT_RX_STOPPED
Definition: ksz8851snl.h:56
#define KSZ8851SNL_INT_TX_STOPPED
Definition: ksz8851snl.h:54

Service RX done, link change and error IRQs.

Definition at line 71 of file ksz8851snl.h.

#define KSZ8851SNL_INT_ENERGY   0x0004

Enable detect interrupt

Definition at line 66 of file ksz8851snl.h.

#define KSZ8851SNL_INT_LINK_CHANGE   0x8000

Enable link change interrupt

Definition at line 46 of file ksz8851snl.h.

#define KSZ8851SNL_INT_LINKUP   0x0008

Enable link up detect interrupt

Definition at line 64 of file ksz8851snl.h.

#define KSZ8851SNL_INT_MAGIC   0x0010

Enable magic packet detect interrupt

Definition at line 62 of file ksz8851snl.h.

#define KSZ8851SNL_INT_RX_DONE   0x2000

Enable receive interrupt

Definition at line 50 of file ksz8851snl.h.

#define KSZ8851SNL_INT_RX_OVERRUN   0x0800

Enable receive overrun interrupt

Definition at line 52 of file ksz8851snl.h.

#define KSZ8851SNL_INT_RX_STOPPED   0x0100

Enable receive process stopped interrupt

Definition at line 56 of file ksz8851snl.h.

#define KSZ8851SNL_INT_RX_WOL_FRAME   0x0020

Enable WOL on receive wake-up frame detect interrupt

Definition at line 60 of file ksz8851snl.h.

#define KSZ8851SNL_INT_SPI_ERROR   0x0002

Enable receive SPI bus error interrupt

Definition at line 68 of file ksz8851snl.h.

#define KSZ8851SNL_INT_TX_DONE   0x4000

Enable transmit done interrupt

Definition at line 48 of file ksz8851snl.h.

#define KSZ8851SNL_INT_TX_SPACE   0x0040

Enable transmit space available interrupt

Definition at line 58 of file ksz8851snl.h.

#define KSZ8851SNL_INT_TX_STOPPED   0x0200

Enable transmit process stopped interrupt

Definition at line 54 of file ksz8851snl.h.

#define LSB_MASK   0x00FF

Used to mask the LSB

Definition at line 92 of file ksz8851snl.c.

#define MARH   0x14

MAC Address High

Definition at line 44 of file ksz8851snl.c.

#define MARL   0x10

MAC Address Low

Definition at line 42 of file ksz8851snl.c.

#define MARM   0x12

MAC Address Middle

Definition at line 43 of file ksz8851snl.c.

#define MIB_MASK   0x1C00

Management information base registers MIB Mask

Definition at line 312 of file ksz8851snl.c.

#define MIB_Rx1024to1521Octets   0x13

of received packets with size between 1024 and 1521 bytes

Definition at line 332 of file ksz8851snl.c.

#define MIB_Rx128to255Octets   0x10

of received packets with size between 128 and 255 bytes

Definition at line 329 of file ksz8851snl.c.

#define MIB_Rx1522to2000Octets   0x14

of received packets with size between 1522 and 2000 bytes

Definition at line 333 of file ksz8851snl.c.

#define MIB_Rx256to511Octets   0x11

of received packets with size between 256 and 511 bytes

Definition at line 330 of file ksz8851snl.c.

#define MIB_Rx512to1023Octets   0x12

of received packets with size between 512 and 1023 bytes

Definition at line 331 of file ksz8851snl.c.

#define MIB_Rx64Octets   0x0E

of received packets with size of 64 bytes

Definition at line 327 of file ksz8851snl.c.

#define MIB_Rx65to127Octets   0x0F

of received packets with size between 65 and 127 bytes

Definition at line 328 of file ksz8851snl.c.

#define MIB_RxAlignmentError   0x08

of received missaligned packets

Definition at line 321 of file ksz8851snl.c.

#define MIB_RxBroadcast   0x0B

of received broadcast packets

Definition at line 324 of file ksz8851snl.c.

#define MIB_RxByte   0x00

of received bytes

Definition at line 313 of file ksz8851snl.c.

#define MIB_RxControl8808Pkts   0x09

of received control packets

Definition at line 322 of file ksz8851snl.c.

#define MIB_RxCRCError   0x07

of received packets with CRC error

Definition at line 320 of file ksz8851snl.c.

#define MIB_RxFragments   0x03

of received fragments

Definition at line 316 of file ksz8851snl.c.

#define MIB_RxJabbers   0x05

of received jabbers

Definition at line 318 of file ksz8851snl.c.

#define MIB_RxMulticast   0x0C

of received multicast packets

Definition at line 325 of file ksz8851snl.c.

#define MIB_RxOversize   0x04

of received oversized packets

Definition at line 317 of file ksz8851snl.c.

#define MIB_RxPausePkts   0x0A

of received pause packets

Definition at line 323 of file ksz8851snl.c.

#define MIB_RxSymbolError   0x06

of received error symbols

Definition at line 319 of file ksz8851snl.c.

#define MIB_RxUndersizePkt   0x02

of received undersized packets

Definition at line 315 of file ksz8851snl.c.

#define MIB_RxUnicast   0x0D

of received unicast packets

Definition at line 326 of file ksz8851snl.c.

#define MIB_TxBroadcastPkts   0x18

of transmitted broadcast packets

Definition at line 337 of file ksz8851snl.c.

#define MIB_TxByte   0x15

of transmitted bytes

Definition at line 334 of file ksz8851snl.c.

#define MIB_TxDeferred   0x1B

of transmitted deferred packets

Definition at line 340 of file ksz8851snl.c.

#define MIB_TxExcessiveCollision   0x1D

of transmitted excessive collisions

Definition at line 342 of file ksz8851snl.c.

#define MIB_TxLateCollision   0x16

of transmitted late collision packets

Definition at line 335 of file ksz8851snl.c.

#define MIB_TxMulticastPkts   0x19

of transmitted multicast packets

Definition at line 338 of file ksz8851snl.c.

#define MIB_TxMultipleCollision   0x1F

of transmitted multiple collisions

Definition at line 344 of file ksz8851snl.c.

#define MIB_TxPausePkts   0x17

of transmitted pause packets

Definition at line 336 of file ksz8851snl.c.

#define MIB_TxSingleCollision   0x1E

of transmitted single collisions

Definition at line 343 of file ksz8851snl.c.

#define MIB_TxTotalCollision   0x1C

of transmitted total collisions

Definition at line 341 of file ksz8851snl.c.

#define MIB_TxUnicastPkts   0x1A

of transmitted unicast packets

Definition at line 339 of file ksz8851snl.c.

#define MIB_XXX   0x01

MIB Reserved byte

Definition at line 314 of file ksz8851snl.c.

#define MID_QMU_MAC_H   0x57

3rd segment of the MAC address

Definition at line 103 of file ksz8851snl.c.

#define MSB_POS   0x0008

Used to mark the MSB pos

Definition at line 93 of file ksz8851snl.c.

#define NO_INT   0x0000

Used to disable the interupts

Definition at line 78 of file ksz8851snl.c.

#define OBCR   0x20

On-Chip Bus Control Register

Definition at line 45 of file ksz8851snl.c.

#define ONE_FRAME_THRES   0x0001

RX INT after one frame

Definition at line 75 of file ksz8851snl.c.

#define P1CR   0xF6

Port 1 Control Register

Definition at line 70 of file ksz8851snl.c.

#define P1MBCR   0xE4

PHY1 MII-Register Basic Control Register

Definition at line 69 of file ksz8851snl.c.

#define P1SR   0xF8

Port 1 Status Register

Definition at line 71 of file ksz8851snl.c.

#define PHY_RESET   0x0001

PHY Reset Register Options

Definition at line 291 of file ksz8851snl.c.

#define PHYRR   0xD8

PHY Reset Register

Definition at line 68 of file ksz8851snl.c.

#define PMECR   0xD4

Power Managment Event Control Register

Definition at line 67 of file ksz8851snl.c.

#define PORT1_AN_DONE   0x0040

Auto-neg done

Definition at line 240 of file ksz8851snl.c.

#define PORT1_AUTO_MDIX_DISABLE   0x0400

Disable auto MDI/MDI-X

Definition at line 254 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_100BTX   0x0004

Advertise 100BT half-duplex capability

Definition at line 268 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_100BTX_FD   0x0008

Advertise 100BT full-duplex capability

Definition at line 266 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_10BT   0x0001

Advertise 10BT half-duplex capability

Definition at line 272 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_10BT_FD   0x0002

Advertise 10BT full-duplex capability

Definition at line 270 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_ENABLE   0x0080

Enable auto-negotiation

Definition at line 258 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_FLOW_CTRL   0x0010

Advertise flow control capability

Definition at line 264 of file ksz8851snl.c.

#define PORT1_AUTO_NEG_RESTART   0x2000

Restart auto-negotiation

Definition at line 250 of file ksz8851snl.c.

#define PORT1_CONFIG
Value:
#define PORT1_FORCE_FULL_DUPLEX
Definition: ksz8851snl.c:262
#define PORT1_AUTO_NEG_10BT_FD
Definition: ksz8851snl.c:270
#define PORT1_AUTO_NEG_100BTX_FD
Definition: ksz8851snl.c:266
#define PORT1_AUTO_NEG_10BT
Definition: ksz8851snl.c:272
#define PORT1_AUTO_NEG_ENABLE
Definition: ksz8851snl.c:258
#define PORT1_AUTO_NEG_FLOW_CTRL
Definition: ksz8851snl.c:264
#define PORT1_AUTO_NEG_100BTX
Definition: ksz8851snl.c:268
#define PORT1_FORCE_100_MBIT
Definition: ksz8851snl.c:260

PHY Port default config P1CR

Definition at line 275 of file ksz8851snl.c.

#define PORT1_FORCE_100_MBIT   0x0040

Force PHY 100Mbps

Definition at line 260 of file ksz8851snl.c.

#define PORT1_FORCE_FULL_DUPLEX   0x0020

Force PHY in full duplex mode

Definition at line 262 of file ksz8851snl.c.

#define PORT1_FORCE_MDIX   0x0200

Force MDI-X

Definition at line 256 of file ksz8851snl.c.

#define PORT1_LED_OFF   0x8000

Turn off port LEDs

Definition at line 246 of file ksz8851snl.c.

#define PORT1_LINK_GOOD   0x0020

Link good

Definition at line 242 of file ksz8851snl.c.

#define PORT1_POWER_DOWN   0x0800

Set port power-down

Definition at line 252 of file ksz8851snl.c.

#define PORT1_TX_DISABLE   0x4000

Disable port transmit

Definition at line 248 of file ksz8851snl.c.

#define QMU_MODULE_SOFT_RESET   0x0002

QMU Reset

Definition at line 286 of file ksz8851snl.c.

#define RESTART_AUTO_NEG   0x0200

Restart auto negotiation

Definition at line 301 of file ksz8851snl.c.

#define RX_BYTE_CNT_MASK   0x0FFF

Used to mask the reserved bits

Definition at line 91 of file ksz8851snl.c.

#define RX_FLOW_CTRL1_CONFIG
Value:
#define RX_FLOW_CTRL_UNICAST_ENABLE
Definition: ksz8851snl.c:162
#define RX_FLOW_CTRL_IP_CHECKSUM
Definition: ksz8851snl.c:150
#define RX_FLOW_CTRL_BROADCAST_ENABLE
Definition: ksz8851snl.c:158
#define RX_FLOW_CTRL_FLOW_ENENABLE
Definition: ksz8851snl.c:154
#define RX_FLOW_CTRL_TCP_CHECKSUM
Definition: ksz8851snl.c:148
#define RX_FLOW_CTRL_UDP_CHECKSUM
Definition: ksz8851snl.c:146
#define RX_FLOW_CTRL_MAC_FILTER
Definition: ksz8851snl.c:152

RX FLOW CONTROL1 Initialization collection

Definition at line 173 of file ksz8851snl.c.

#define RX_FLOW_CTRL2_CONFIG
Value:
#define RX_FLOW_CTRL_ICMP_CHECKSUM
Definition: ksz8851snl.c:202
#define RX_FLOW_CTRL_IPV6_UDP_FRAG_PASS
Definition: ksz8851snl.c:196
#define RX_FLOW_CTRL_UDP_LITE_CHECKSUM
Definition: ksz8851snl.c:200
#define RX_FLOW_CTRL_BURST_LEN_FRAME
Definition: ksz8851snl.c:194

RX FLOW CONTROL2 Initialization collection

Definition at line 207 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BAD_PACKET   0x0200

Enable Receive Error Frames

Definition at line 156 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BLOCK_MAC   0x0001

Receive Source Address Filtering

Definition at line 204 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BROADCAST_ENABLE   0x0080

Enable Receive Broadcast frames

Definition at line 158 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_16   0x0040

16 Bytes length

Definition at line 190 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_32   0x0060

32 Bytes length

Definition at line 192 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_4   0x0000

4 bytes length

Definition at line 186 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_8   0x0020

8 Bytes length

Definition at line 188 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_FRAME   0x0080

Full frame length

Definition at line 194 of file ksz8851snl.c.

#define RX_FLOW_CTRL_BURST_LEN_MASK   0x00E0

Receive Flow Control Burst Length mask

Definition at line 184 of file ksz8851snl.c.

#define RX_FLOW_CTRL_FLOW_ENENABLE   0x0400

Enable Receive Flow Control

Definition at line 154 of file ksz8851snl.c.

#define RX_FLOW_CTRL_FLUSH_QUEUE   0x8000

Flush Receive Queue

Definition at line 144 of file ksz8851snl.c.

#define RX_FLOW_CTRL_ICMP_CHECKSUM   0x0002

Enable ICMP frame

Definition at line 202 of file ksz8851snl.c.

#define RX_FLOW_CTRL_INVERSE_FILTER   0x0002

Receive Inverse Filtering

Definition at line 168 of file ksz8851snl.c.

#define RX_FLOW_CTRL_IP_CHECKSUM   0x1000

Enable Receive IP Frame Checksum Check

Definition at line 150 of file ksz8851snl.c.

#define RX_FLOW_CTRL_IPV6_UDP_FRAG_PASS   0x0010

IPV4/IPV6/UDP Fragment Frame Pass

Definition at line 196 of file ksz8851snl.c.

#define RX_FLOW_CTRL_IPV6_UDP_ZERO_PASS   0x0008

IPV4/IPV6/UDP Frame Checksum Equal Zero

Definition at line 198 of file ksz8851snl.c.

#define RX_FLOW_CTRL_MAC_FILTER   0x0800

Receive Physical Address Filtering with MAC Address Enable

Definition at line 152 of file ksz8851snl.c.

#define RX_FLOW_CTRL_MULTICAST_ENABLE   0x0040

Enable Receive Multicast frames

Definition at line 160 of file ksz8851snl.c.

#define RX_FLOW_CTRL_PROMISCUOUS_MODE   0x0012

Receive all incoming frames

Definition at line 164 of file ksz8851snl.c.

#define RX_FLOW_CTRL_RX_ALL   0x0010

Receive all frames

Definition at line 166 of file ksz8851snl.c.

#define RX_FLOW_CTRL_RX_ENABLE   0x0001

Enable receive

Definition at line 170 of file ksz8851snl.c.

#define RX_FLOW_CTRL_TCP_CHECKSUM   0x2000

Enable Receive TCP Frame Checksum Check

Definition at line 148 of file ksz8851snl.c.

#define RX_FLOW_CTRL_UDP_CHECKSUM   0x4000

Enable Receive UDP Frame Checksum Check

Definition at line 146 of file ksz8851snl.c.

#define RX_FLOW_CTRL_UDP_LITE_CHECKSUM   0x0004

Enable UDP Lite frame

Definition at line 200 of file ksz8851snl.c.

#define RX_FLOW_CTRL_UNICAST_ENABLE   0x0020

Enable Receive Unicast frames

Definition at line 162 of file ksz8851snl.c.

#define RXCR1   0x74

Receive Flow Control Register 1

Definition at line 48 of file ksz8851snl.c.

#define RXCR2   0x76

Receive Flow Control Register 2

Definition at line 49 of file ksz8851snl.c.

#define RXFCTR   0x9C

RX Frame Count & Threshold Register

Definition at line 59 of file ksz8851snl.c.

#define RXFDPR   0x86

RX Frame Data Pointer Register

Definition at line 56 of file ksz8851snl.c.

#define RXFHBCR   0x7E

Receive Frame Header Bytecount Register

Definition at line 52 of file ksz8851snl.c.

#define RXFHSR   0x7C

Receive Frame Header Status Register

Definition at line 51 of file ksz8851snl.c.

#define RXQ_AUTO_DEQUEUE   0x0010

Enable Auto Dequeue RXQ Frame

Definition at line 228 of file ksz8851snl.c.

#define RXQ_CMD_CONFIG
Value:
#define RXQ_AUTO_DEQUEUE
Definition: ksz8851snl.c:228
#define RXQ_EN_ON_FRAME_CNT_INT
Definition: ksz8851snl.c:226

RX COMMAND Initialization collection

Definition at line 235 of file ksz8851snl.c.

#define RXQ_EN_ON_BYTE_CNT_INT   0x0040

Enable RX interrupt on byte count threshold

Definition at line 224 of file ksz8851snl.c.

#define RXQ_EN_ON_FRAME_CNT_INT   0x0020

Enable RX interrupt on frame count threshold

Definition at line 226 of file ksz8851snl.c.

#define RXQ_EN_ON_TIME_INT   0x0080

Enable RX interrupt on timer duration

Definition at line 222 of file ksz8851snl.c.

#define RXQ_ON_BYTE_CNT_INT   0x0800

RX interrupt is occured on byte count threshold

Definition at line 216 of file ksz8851snl.c.

#define RXQ_ON_FRAME_CNT_INT   0x0400

RX interrupt is occured on frame count threshold

Definition at line 218 of file ksz8851snl.c.

#define RXQ_ON_TIME_INT   0x1000

RX interrupt is occured on timer duration

Definition at line 214 of file ksz8851snl.c.

#define RXQ_RELEASE_ERROR_FRAME   0x0001

Release RX Error Frame

Definition at line 232 of file ksz8851snl.c.

#define RXQ_START_DMA   0x0008

Start QMU transfer operation

Definition at line 230 of file ksz8851snl.c.

#define RXQ_TWOBYTE_OFFSET   0x0200

Enable adding 2-bytes offset before IP frame header

Definition at line 220 of file ksz8851snl.c.

#define RXQCR   0x82

RXQ Command Register

Definition at line 54 of file ksz8851snl.c.

#define TX_FLOW_CTRL_CONFIG
Value:
#define TX_FLOW_CTRL_CRC_ENABLE
Definition: ksz8851snl.c:122
#define TX_FLOW_CTRL_TCP_CHECKSUM
Definition: ksz8851snl.c:112
#define TX_FLOW_CTRL_ICMP_CHECKSUM
Definition: ksz8851snl.c:110
#define TX_FLOW_CTRL_IP_CHECKSUM
Definition: ksz8851snl.c:114
#define TX_FLOW_CTRL_PAD_ENABLE
Definition: ksz8851snl.c:120
#define TX_FLOW_CTRL_FLOW_ENABLE
Definition: ksz8851snl.c:118

TX FLOW CONTROL Initialization collection

Definition at line 127 of file ksz8851snl.c.

#define TX_FLOW_CTRL_CRC_ENABLE   0x0002

Transmit CRC Enable

Definition at line 122 of file ksz8851snl.c.

#define TX_FLOW_CTRL_ENABLE   0x0001

Enable tranmsit

Definition at line 124 of file ksz8851snl.c.

#define TX_FLOW_CTRL_FLOW_ENABLE   0x0008

Transmit flow control enable

Definition at line 118 of file ksz8851snl.c.

#define TX_FLOW_CTRL_FLUSH_QUEUE   0x0010

Flush Transmit Queue

Definition at line 116 of file ksz8851snl.c.

#define TX_FLOW_CTRL_ICMP_CHECKSUM   0x0100

Enable Transmit Checksum Generation for ICMP

Definition at line 110 of file ksz8851snl.c.

#define TX_FLOW_CTRL_IP_CHECKSUM   0x0020

Enable Transmit Checksum Generation for IP

Definition at line 114 of file ksz8851snl.c.

#define TX_FLOW_CTRL_PAD_ENABLE   0x0004

Transmit Padding enable

Definition at line 120 of file ksz8851snl.c.

#define TX_FLOW_CTRL_TCP_CHECKSUM   0x0040

Enable Transmit Checksum Generation for TCP

Definition at line 112 of file ksz8851snl.c.

#define TX_INT_on_COMPLETION   0x8000

TX INT on completion

Definition at line 94 of file ksz8851snl.c.

#define TX_MEM_AVAIL_MASK   0x1FFF

Used to mask the reserved bits

Definition at line 79 of file ksz8851snl.c.

#define TX_MEMORY_WAIT_MS   500

wait time in ms for TX memory to be available

Definition at line 306 of file ksz8851snl.c.

#define TXCR   0x70

Transmit Flow Control Register

Definition at line 47 of file ksz8851snl.c.

#define TXFDPR   0x84

TX Frame Data Pointer Register

Definition at line 55 of file ksz8851snl.c.

#define TXMIR   0x78

TXQ Memory Information Register

Definition at line 50 of file ksz8851snl.c.

#define TXNTFSR   0x9E

TX Next Frame size register

Definition at line 60 of file ksz8851snl.c.

#define TXQ_AUTO_ENQUEUE   0x0004

Enable Auto-Enqueue TXQ Frame

Definition at line 136 of file ksz8851snl.c.

#define TXQ_ENQUEUE   0x0001

Enable Manual Engueue TXQ Frame

Definition at line 140 of file ksz8851snl.c.

#define TXQ_MEM_AVAILABLE_INT   0x0002

Enable INT generation when TXQ Memory Available

Definition at line 138 of file ksz8851snl.c.

#define TXQCR   0x80

TXQ Command Register

Definition at line 53 of file ksz8851snl.c.

#define VALID_FRAME_MASK   0x8000

RXFV Receive Frame Valid of the RXFHSR register

Definition at line 87 of file ksz8851snl.c.

#define WATERMARK_4KB   0x0400

4KByte Watermark

Definition at line 99 of file ksz8851snl.c.

#define WATERMARK_6KB   0x0600

6KByte Watermark

Definition at line 98 of file ksz8851snl.c.

#define WORD_SIZE   0x0004

Word size in # of bytes

Definition at line 95 of file ksz8851snl.c.

Function Documentation

void KSZ8851SNL_AllRegistersDump ( void  )

Prints the value of the registers of the ethernet controller.

Note
Support method used for debugging.

Definition at line 451 of file ksz8851snl.c.

References KSZ8851SNL_SPI_ReadRegister().

void KSZ8851SNL_IntClear ( uint16_t  flags)

Clear interrupt flags.

Parameters
[in]flagsThe interrupt flags to clear

Definition at line 531 of file ksz8851snl.c.

void KSZ8851SNL_MacAddressGet ( uint8_t *  macAddress)

Get the MAC address of the current board.

Note
Support method used for minimizing the code size.
Parameters
[out]macAddressdata buffer to store the macAddress

Definition at line 952 of file ksz8851snl.c.

void KSZ8851SNL_MIBCountersDump ( void  )

Dumps the Management Information Base Counters.

Note
Support method used for debugging.

Definition at line 423 of file ksz8851snl.c.

void KSZ8851SNL_MIBCountersUpdate ( void  )

Update the Management Information Base Counters.

Note
Support method used for debugging.

Definition at line 396 of file ksz8851snl.c.

void KSZ8851SNL_PMECRStatusClear ( uint16_t  flags)

Clear PMECR (Power Management Event Control Register) flags.

Parameters
[in]flagsThe PMECR flags to clear

Definition at line 551 of file ksz8851snl.c.

uint16_t KSZ8851SNL_Receive ( uint16_t  length,
uint8_t *  buffer 
)

Performs the actual receive of a raw frame over the network.

Parameters
[in]lengththe length of the buffer
[in]bufferbuffer to fill with an ethernet frame
Returns
received packet length, 0 in case of failure

Definition at line 882 of file ksz8851snl.c.

void KSZ8851SNL_RegistersDump ( void  )

Prints the value of the registers of the ethernet controller.

Note
Support method used for debugging.

Definition at line 469 of file ksz8851snl.c.

void KSZ8851SNL_SPI_Init ( void  )

KSZ8851SNL_SPI_Init Initialize SPI interface to Ethernet controller.

Note
To enable access, be sure to call the functions BSP_PeripheralAccess(BSP_ETH, true); before using this interface.

Definition at line 57 of file ksz8851snl_spi.c.

References SPIDRV_Init::bitOrder, SPIDRV_Init::bitRate, BOGUS_BYTE, SPIDRV_Init::clockMode, SPIDRV_Init::csControl, SPIDRV_Init::dummyTxValue, ECODE_EMDRV_SPIDRV_OK, ETH_CS_PIN, ETH_CS_PORT, SPIDRV_Init::frameLength, SPIDRV_Init(), SPIDRV_MASTER_USART1, spidrvBitOrderMsbFirst, spidrvClockMode0, and spidrvCsControlApplication.

void KSZ8851SNL_SPI_ReadFifo ( int  numBytes,
uint8_t *  data 
)

Read data from the ethernet controller RX FIFO.

Make sure that the ethernet controller is in DMA mode before calling this function. This is configured by setting bit 3 in the RXQCR register. This bit should also be cleared whenever you want to access the control registers.

When reading data from the controller the first 4 bytes is always dummy data and is skipped by this function.

Parameters
[in]numBytesNumber of bytes to read, 1-12K
[out]dataBuffer where the bytes are inserted.

Definition at line 248 of file ksz8851snl_spi.c.

References KSZ8851SNL_SPI_Receive(), KSZ8851SNL_SPI_SetChipSelect(), KSZ8851SNL_SPI_Transmit(), and OPCODE_FIFO_READ.

uint16_t KSZ8851SNL_SPI_ReadRegister ( uint8_t  reg)

Read ethernet controller register.

Parameters
[in]regRegister to read
Returns
value of the register

SPI Command Format

+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |op | byte | reg[7:2] | ... | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

op=00 "Register Read" byte=0011 "Read register at reg" byte=1100 "Read register at reg+2" reg=6 most significant bits of the register address

Definition at line 160 of file ksz8851snl_spi.c.

References ADDRESS_MS2B_POS, ADDRESS_SHIFT, BYTE_ENABLE, BYTE_ENABLE_SHIFT, KSZ8851SNL_SPI_SetChipSelect(), OPCODE_REG_READ, REG_MASK, rxBuffer, and SPIDRV_MTransferB().

Referenced by KSZ8851SNL_AllRegistersDump().

void KSZ8851SNL_SPI_WriteFifo ( int  numBytes,
const uint8_t *  data 
)

Continue writing ethernet controller FIFO.

Parameters
[in]numBytesNumber of bytes to write, 1-12K
[in]dataActual bytes to write

Definition at line 280 of file ksz8851snl_spi.c.

References KSZ8851SNL_SPI_Transmit().

void KSZ8851SNL_SPI_WriteRegister ( uint8_t  reg,
uint16_t  value 
)

Write ethernet controller register.

Parameters
[in]regRegister to write
[in]valueThe value to be written into the register

SPI Command Format

+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |op | byte | reg[7:2] | ... | 16 bit value | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

op=01 "Register Write" byte=0011 "Write register at reg" byte=1100 "Write register at reg+2" reg=6 most significant bits of the register address

Definition at line 201 of file ksz8851snl_spi.c.

References ADDRESS_MS2B_POS, ADDRESS_SHIFT, BYTE_ENABLE, BYTE_ENABLE_SHIFT, KSZ8851SNL_SPI_SetChipSelect(), KSZ8851SNL_SPI_Transmit(), OPCODE_REG_WRITE, and REG_MASK.

void KSZ8851SNL_Transmit ( uint16_t  length,
const uint8_t *  buffer 
)

Transmit a chunk of data to the ethernet controller. The chunk can be either a full ethernet frame or a partial chunk of an ethernet frame.

Note
If the ethernet packet is divided into several packet buffers then this function should be called for each chunk in order.
Parameters
[in]lengththe length of the data buffer to be transmitted
[in]bufferthe buffer that contains data to be transmitted

Definition at line 810 of file ksz8851snl.c.

bool KSZ8851SNL_TransmitBegin ( uint16_t  length)

Prepares for a transmission of an ethernet frame over the network.

Parameters
[in]lengththe length of frame to be transmitted
Returns
true if transmission is initialized, false if there is not enough tx memory left on the ethernet controller.

Definition at line 749 of file ksz8851snl.c.

void KSZ8851SNL_TransmitEnd ( uint16_t  length)

Ends a transmission of an ethernet frame to the ethernet controller.

This will make sure that data is correctly padded. And will not return until the packet is sent.

Parameters
[in]lengththe length of the complete frame. This is needed so we can pad the transmission to a 4 byte boundary

Definition at line 828 of file ksz8851snl.c.

static uint32_t MIBCountersRead ( uint16_t  offset)
static

helper function for KSZ8851SNL_UpdateMIBCounters

Parameters
[in]offsetThe offset specifies which MIB counter you want to read
Returns
The value of the MIB Counter

Definition at line 376 of file ksz8851snl.c.

static void ReleaseIncosistentFrame ( void  )
static

Release the current frame if it is inconsistent.

Note
Support method used for minimizing the code size.

Definition at line 856 of file ksz8851snl.c.

Variable Documentation

KSZ8851SLN_mib_t mibCounters
static

Copy of the current MIB counters values from the ksz8851snl. This is updated by calling KSZ8851SNL_MIBCountersUpdate.

The datasheet recommends that the MIB counter values are read at least every 30 seconds because of counter overflow possibility.

Definition at line 364 of file ksz8851snl.c.