EFR32xG2x#

Types specific to the EFR32xG2x for dealing with the on-chip PAs.

Macros#

#define
RAIL_TX_POWER_LEVEL_2P4_HP_MAX (240)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_HP_MIN (1U)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_MP_MAX (RAIL_TX_POWER_LEVEL_2P4_HP_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_MP_MIN (RAIL_TX_POWER_LEVEL_2P4_HP_MIN)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_LP_MAX (RAIL_TX_POWER_LEVEL_2P4_HP_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_LP_MIN (RAIL_TX_POWER_LEVEL_2P4_HP_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_LLP_MAX (RAIL_TX_POWER_LEVEL_2P4_HP_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.

#define
RAIL_TX_POWER_LEVEL_2P4_LLP_MIN (RAIL_TX_POWER_LEVEL_2P4_HP_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.

#define
RAIL_SUBGIG_MAX 0U

The maximum valid value for the RAIL_TxPowerLevel_t when using a Sub-GHz PA mode.

#define
RAIL_SUBGIG_MIN 1U

The minimum valid value for the RAIL_TxPowerLevel_t when using a Sub-GHz PA mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX (RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN (RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_MP_MAX (RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_MP_MIN (RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_LP_MAX (RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_LP_MIN (RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MAX (RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MIN (RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.

#define
RAIL_TX_POWER_LEVEL_HP_MAX RAIL_TX_POWER_LEVEL_2P4_HP_MAX

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_HP_MIN RAIL_TX_POWER_LEVEL_2P4_HP_MIN

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_MP_MAX RAIL_TX_POWER_LEVEL_2P4_MP_MAX

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_MP_MIN RAIL_TX_POWER_LEVEL_2P4_MP_MIN

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_LP_MAX RAIL_TX_POWER_LEVEL_2P4_LP_MAX

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_LP_MIN RAIL_TX_POWER_LEVEL_2P4_LP_MIN

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_MAX RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX

Backwards compatability define.

#define
RAIL_TX_POWER_LEVEL_SUBGIG_MIN RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN

Backwards compatability define.

#define
RAIL_NUM_PA (3U)

The number of PA's on this chip (including Virtual PAs).

#define
RAIL_POWER_MODE_IS_ANY_DBM_POWERSETTING_MAPPING_TABLE (x)

Convenience macro for any mapping table mode.

#define
RAIL_POWER_MODE_SUPPORTS_RAW_SETTING (x)

Convenience macro to check if the power mode supports raw setting.

Macro Definition Documentation#

RAIL_TX_POWER_LEVEL_2P4_HP_MAX#

#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX
Value:
(240)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.


Definition at line 549 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_HP_MIN#

#define RAIL_TX_POWER_LEVEL_2P4_HP_MIN
Value:
(1U)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_HP mode.


Definition at line 554 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_MP_MAX#

#define RAIL_TX_POWER_LEVEL_2P4_MP_MAX
Value:
(RAIL_TX_POWER_LEVEL_2P4_HP_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.


Definition at line 559 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_MP_MIN#

#define RAIL_TX_POWER_LEVEL_2P4_MP_MIN
Value:
(RAIL_TX_POWER_LEVEL_2P4_HP_MIN)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_MP mode.


Definition at line 564 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_LP_MAX#

#define RAIL_TX_POWER_LEVEL_2P4_LP_MAX
Value:
(RAIL_TX_POWER_LEVEL_2P4_HP_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.


Definition at line 569 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_LP_MIN#

#define RAIL_TX_POWER_LEVEL_2P4_LP_MIN
Value:
(RAIL_TX_POWER_LEVEL_2P4_HP_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LP mode.


Definition at line 574 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_LLP_MAX#

#define RAIL_TX_POWER_LEVEL_2P4_LLP_MAX
Value:
(RAIL_TX_POWER_LEVEL_2P4_HP_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.


Definition at line 579 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_2P4_LLP_MIN#

#define RAIL_TX_POWER_LEVEL_2P4_LLP_MIN
Value:
(RAIL_TX_POWER_LEVEL_2P4_HP_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_2P4GIG_LLP mode.


Definition at line 584 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_SUBGIG_MAX#

#define RAIL_SUBGIG_MAX
Value:
0U

The maximum valid value for the RAIL_TxPowerLevel_t when using a Sub-GHz PA mode.


Definition at line 599 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_SUBGIG_MIN#

#define RAIL_SUBGIG_MIN
Value:
1U

The minimum valid value for the RAIL_TxPowerLevel_t when using a Sub-GHz PA mode.


Definition at line 607 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX#

#define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX
Value:
(RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.


Definition at line 613 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN#

#define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN
Value:
(RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_HP mode.


Definition at line 619 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_MP_MAX#

#define RAIL_TX_POWER_LEVEL_SUBGIG_MP_MAX
Value:
(RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.


Definition at line 625 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_MP_MIN#

#define RAIL_TX_POWER_LEVEL_SUBGIG_MP_MIN
Value:
(RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_MP mode.


Definition at line 631 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_LP_MAX#

#define RAIL_TX_POWER_LEVEL_SUBGIG_LP_MAX
Value:
(RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.


Definition at line 637 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_LP_MIN#

#define RAIL_TX_POWER_LEVEL_SUBGIG_LP_MIN
Value:
(RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LP mode.


Definition at line 643 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MAX#

#define RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MAX
Value:
(RAIL_SUBGIG_MAX)

The maximum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.


Definition at line 649 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MIN#

#define RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MIN
Value:
(RAIL_SUBGIG_MIN)

The minimum valid value for the RAIL_TxPowerLevel_t when in RAIL_TX_POWER_MODE_SUBGIG_LLP mode.


Definition at line 655 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_HP_MAX#

#define RAIL_TX_POWER_LEVEL_HP_MAX
Value:
RAIL_TX_POWER_LEVEL_2P4_HP_MAX

Backwards compatability define.


Definition at line 679 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_HP_MIN#

#define RAIL_TX_POWER_LEVEL_HP_MIN
Value:
RAIL_TX_POWER_LEVEL_2P4_HP_MIN

Backwards compatability define.


Definition at line 681 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_MP_MAX#

#define RAIL_TX_POWER_LEVEL_MP_MAX
Value:
RAIL_TX_POWER_LEVEL_2P4_MP_MAX

Backwards compatability define.


Definition at line 683 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_MP_MIN#

#define RAIL_TX_POWER_LEVEL_MP_MIN
Value:
RAIL_TX_POWER_LEVEL_2P4_MP_MIN

Backwards compatability define.


Definition at line 685 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_LP_MAX#

#define RAIL_TX_POWER_LEVEL_LP_MAX
Value:
RAIL_TX_POWER_LEVEL_2P4_LP_MAX

Backwards compatability define.


Definition at line 687 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_LP_MIN#

#define RAIL_TX_POWER_LEVEL_LP_MIN
Value:
RAIL_TX_POWER_LEVEL_2P4_LP_MIN

Backwards compatability define.


Definition at line 689 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_MAX#

#define RAIL_TX_POWER_LEVEL_SUBGIG_MAX
Value:
RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX

Backwards compatability define.


Definition at line 691 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_TX_POWER_LEVEL_SUBGIG_MIN#

#define RAIL_TX_POWER_LEVEL_SUBGIG_MIN
Value:
RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN

Backwards compatability define.


Definition at line 693 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_NUM_PA#

#define RAIL_NUM_PA
Value:
(3U)

The number of PA's on this chip (including Virtual PAs).


Definition at line 712 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_POWER_MODE_IS_ANY_DBM_POWERSETTING_MAPPING_TABLE#

#define RAIL_POWER_MODE_IS_ANY_DBM_POWERSETTING_MAPPING_TABLE
Value:
(((x) == RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE) \
|| ((x) == RAIL_TX_POWER_MODE_SUBGIG_POWERSETTING_TABLE))

Convenience macro for any mapping table mode.


Definition at line 756 of file chip/efr32/efr32xg2x/rail_chip_specific.h

RAIL_POWER_MODE_SUPPORTS_RAW_SETTING#

#define RAIL_POWER_MODE_SUPPORTS_RAW_SETTING
Value:
(((x) != RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE) \
&& ((x) != RAIL_TX_POWER_MODE_SUBGIG_POWERSETTING_TABLE))

Convenience macro to check if the power mode supports raw setting.


Definition at line 761 of file chip/efr32/efr32xg2x/rail_chip_specific.h