Configuration for Silicon Labs Devices#

Silicon Labs devices use Zephyr's standard configuration mechanisms -- Kconfig and Devicetree.

• Devicetree bindings documentation describes the contents of Devicetree nodes.

• Kconfig search provides documentation for Kconfig entries. Search terms such as SPI.*SILABS are useful for finding options related to specific drivers for Silicon Labs hardware.

Series 2-specific Configuration#

While Devicetree and Kconfig are generic configuration interfaces, the values used may be specific to the hardware implementation:

• Series 2 Clock Configuration

• Series 2 DMA Configuration

• Series 2 Pin Configuration

• Series 2 Power Management

Zephyr Kernel Thread and Scheduling Details#

The Zephyr RTOS kernel has some features that differ from other RTOS kernels such as FreeRTOS or Micrium OS. Zephyr partitions the system into preemptive threads and cooperative threads.

• Cooperative threads always have scheduling priority over preemptive threads. They run until they yield or pend on a kernel object.

• Meta-IRQ threads are a special type of cooperative thread that can preempt other cooperative threads.

• The Bluetooth stack runs as several cooperative threads. On Series 2 devices, the Bluetooth Link Layer runs as a meta-IRQ thread.

Interrupt Priorities#

Silicon Labs devices use the Simplicity SDK HAL, which requires that the base priority register of the ARM Cortex-M CPU is set to 3. A BASEPRI value of 3 means that the highest interrupt priorities (0-2) are not blocked by critical sections such as irq_lock() or spinlocks. See the Zephyr Project interrupt documentation for more details.

In Zephyr, the base priority is configured to be compatible with the Simplicity SDK by enabling CONFIG_ZERO_LATENCY_IRQS and setting CONFIG_ZERO_LATENCY_LEVELS=2. This is done by default in Series 2 SoC Kconfig files.

Configuration of interrupt priorities in Devicetree (DTS) are configured by assigning an interrupt number and priority to the peripheral node:

    &eusart1 {
        interrupts = <68 0>, <69 0>;
        interrupt-names = "rx", "tx";
    }

For normal interrupts, the numbers configured in Devicetree are automatically offset by the base priority offset. For example, a priority value of 0 in DTS corresponds to a priority of 3 in the ARM Nested Vectored Interrupt Controller (NVIC).

If an ISR is installed in the vector table using the IRQ_ZERO_LATENCY flag, the priority from DTS is used as-is. As noted above, such interrupts will not be blocked by interrupt locks.