Pin Configuration for Series 2#
Pin Configuration in Zephyr uses the Pin Control interface. Unlike the distributed approach used in the Simplicity SDK, Zephyr centralizes pin configuration. All pinout configuration for digital signals is done in the pinctrl
Devicetree node. Analog bus allocation is also performed through pinctrl
.
To declare a pinout configuration for the digital bus (DBUS) signals of a peripheral, create a node in Devicetree to represent it:
#include <dt-bindings/pinctrl/silabs/xg24-pinctrl.h>
&pinctrl {
eusart1_default: eusart1_default {
group0 {
pins = <EUSART1_TX_PC0>, <EUSART1_SCLK_PC2>, <EUSART1_CS_PC3>;
drive-push-pull;
output-high;
};
group1 {
pins = <EUSART1_RX_PC1>;
input-enable;
};
};
};
The names of pin configurations and groups are arbitrary; however, it is a common convention to name the pin configuration after the peripheral and its pinctrl
state (for example, eusart1
and default
). Group names typically follow the format group<n>
. Groups are useful to apply the same GPIO properties to multiple pins. The pins
property contains a list of the pins and signals to route. Available signals for each device are available from the pinctrl dt-bindings
header for the device and generally have the form <peripheral>_<signal>_<pin>
.
Device drivers apply pinctrl states associated with the driver as part of initialization or power management resume/suspend:
&eusart1 {
pinctrl-0 = <&eusart1_default>;
pinctrl-names = "default";
};
The pinctrl driver performs the following actions:
Configures GPIO mode corresponding to the pinctrl properties of the group.
Assigns the port/pin to the peripheral signal in GPIO DBUS.
Enables the DBUS route if the pin mode is anything but disabled (no pinctrl properties assigned); otherwise, disables it.
GPIO Mode ↔ Pinctrl Properties#
Silicon Labs Series 2 GPIO modes map to pinctrl as follows:
Mode | Properties |
---|---|
DISABLED | none or |
DISABLED w/pull-up |
|
| |
INPUT |
|
INPUT w/filter |
|
| |
INPUTPULL |
|
| |
INPUTPULLFILTER |
|
| |
| |
PUSHPULL |
|
| |
PUSHPULLALT |
|
| |
| |
WIREDOR |
|
WIREDORPULLDOWN |
|
| |
WIREDAND |
|
WIREDANDFILTER |
|
| |
WIREDANDPULLUP |
|
| |
WIREDANDPULLUPFILTER |
|
| |
| |
WIREADANDALT |
|
| |
WIREDANDALTFILTER |
|
| |
| |
WIREDANDALTPULLUP |
|
| |
| |
WIREDANDALTPULLUPFILTER |
|
| |
| |
|
Analog Bus Allocation#
In addition to digital pin routing through DBUS, the Pin Control driver handles analog bus (ABUS) allocation. There are a total of 12 analog buses - 2 for even pins and 2 for odd pins for each of the A, B and CD port groups. To allocate buses, use the silabs,analog-bus
Devicetree property with macros from the pinctrl bindings header:
#include <dt-bindings/pinctrl/silabs/xg24-pinctrl.h>
&pinctrl {
iadc0_default: iadc0_default {
group0 {
/* Allocate even bus 0 and odd bus 1 from GPIO port A for ADC use */
silabs,analog-bus = <ABUS_AEVEN0_IADC0>, <ABUS_AODD1_IADC0>;
};
};
};
&iadc0 {
pinctrl-0 = <&iadc0_default>;
pinctrl-names = "default";
};