LDMA_Descriptor_t Union Reference

DMA descriptor.

#include <em_ldma.h>

Data Fields

struct {
uint32_t structType : 2
Set to 0 to select XFER descriptor type.
uint32_t reserved0 : 1
Reserved

uint32_t structReq : 1
DMA transfer trigger during LINKLOAD.
uint32_t xferCnt : 11
Transfer count minus one.
uint32_t byteSwap : 1
Enable byte swapping transfers.
uint32_t blockSize : 4
Number of unit transfers per arbitration cycle.
uint32_t doneIfs : 1
Generate interrupt when done.
uint32_t reqMode : 1
Block or cycle transfer selector.
uint32_t decLoopCnt : 1
Enable looped transfers.
uint32_t ignoreSrec : 1
Ignore single requests.
uint32_t srcInc : 2
Source address increment unit size.
uint32_t size : 2
DMA transfer unit size.
uint32_t dstInc : 2
Destination address increment unit size.
uint32_t srcAddrMode : 1
Source addressing mode.
uint32_t dstAddrMode : 1
Destination addressing mode.
uint32_t srcAddr
DMA source address.
uint32_t dstAddr
DMA destination address.
uint32_t linkMode : 1
Select absolute or relative link address.
uint32_t link : 1
Enable LINKLOAD when transfer is done.
int32_t linkAddr : 30
Address of next (linked) descriptor.
} xfer
TRANSFER DMA descriptor, this is the only descriptor type which can be used to start a DMA transfer.
struct {
uint32_t structType : 2
Set to 1 to select SYNC descriptor type.
uint32_t reserved0 : 1
Reserved.
uint32_t structReq : 1
DMA transfer trigger during LINKLOAD.
uint32_t xferCnt : 11
Transfer count minus one.
uint32_t byteSwap : 1
Enable byte swapping transfers.
uint32_t blockSize : 4
Number of unit transfers per arbitration cycle.
uint32_t doneIfs : 1
Generate interrupt when done.
uint32_t reqMode : 1
Block or cycle transfer selector.
uint32_t decLoopCnt : 1
Enable looped transfers.
uint32_t ignoreSrec : 1
Ignore single requests.
uint32_t srcInc : 2
Source address increment unit size.
uint32_t size : 2
DMA transfer unit size.
uint32_t dstInc : 2
Destination address increment unit size.
uint32_t srcAddrMode : 1
Source addressing mode.
uint32_t dstAddrMode : 1
Destination addressing mode.
uint32_t syncSet : 8
Set bits in LDMA_CTRL.SYNCTRIG register.
uint32_t syncClr : 8
Clear bits in LDMA_CTRL.SYNCTRIG register.
uint32_t reserved3 : 16
Reserved.
uint32_t matchVal : 8
Sync trigger match value.
uint32_t matchEn : 8
Sync trigger match enable.
uint32_t reserved4 : 16
Reserved.
uint32_t linkMode : 1
Select absolute or relative link address.
uint32_t link : 1
Enable LINKLOAD when transfer is done.
int32_t linkAddr : 30
Address of next (linked) descriptor.
} sync
SYNCHRONIZE DMA descriptor, used for intra channel transfer synchronization.
struct {
uint32_t structType : 2
Set to 2 to select WRITE descriptor type.
uint32_t reserved0 : 1
Reserved.
uint32_t structReq : 1
DMA transfer trigger during LINKLOAD.
uint32_t xferCnt : 11
Transfer count minus one.
uint32_t byteSwap : 1
Enable byte swapping transfers.
uint32_t blockSize : 4
Number of unit transfers per arbitration cycle.
uint32_t doneIfs : 1
Generate interrupt when done.
uint32_t reqMode : 1
Block or cycle transfer selector.
uint32_t decLoopCnt : 1
Enable looped transfers.
uint32_t ignoreSrec : 1
Ignore single requests.
uint32_t srcInc : 2
Source address increment unit size.
uint32_t size : 2
DMA transfer unit size.
uint32_t dstInc : 2
Destination address increment unit size.
uint32_t srcAddrMode : 1
Source addressing mode.
uint32_t dstAddrMode : 1
Destination addressing mode.
uint32_t immVal
Data to be written at dstAddr.
uint32_t dstAddr
DMA write destination address.
uint32_t linkMode : 1
Select absolute or relative link address.
uint32_t link : 1
Enable LINKLOAD when transfer is done.
int32_t linkAddr : 30
Address of next (linked) descriptor.
} wri
WRITE DMA descriptor, used for write immediate operations.

DMA descriptor.

The LDMA DMA controller supports three different DMA descriptors. Each consists of four WORDs which map directly onto HW control registers for a given DMA channel. The three descriptor types are XFER, SYNC and WRI. Refer to the reference manual for further information.

Field Documentation

structType

uint32_t LDMA_Descriptor_t::structType

Set to 0 to select XFER descriptor type.

Set to 2 to select WRITE descriptor type.

Set to 1 to select SYNC descriptor type.


reserved0

uint32_t LDMA_Descriptor_t::reserved0

Reserved

Reserved.


structReq

uint32_t LDMA_Descriptor_t::structReq

DMA transfer trigger during LINKLOAD.


xferCnt

uint32_t LDMA_Descriptor_t::xferCnt

Transfer count minus one.


byteSwap

uint32_t LDMA_Descriptor_t::byteSwap

Enable byte swapping transfers.


blockSize

uint32_t LDMA_Descriptor_t::blockSize

Number of unit transfers per arbitration cycle.

doneIfs

uint32_t LDMA_Descriptor_t::doneIfs

Generate interrupt when done.


reqMode

uint32_t LDMA_Descriptor_t::reqMode

Block or cycle transfer selector.


decLoopCnt

uint32_t LDMA_Descriptor_t::decLoopCnt

Enable looped transfers.


ignoreSrec

uint32_t LDMA_Descriptor_t::ignoreSrec

Ignore single requests.


srcInc

uint32_t LDMA_Descriptor_t::srcInc

Source address increment unit size.


size

uint32_t LDMA_Descriptor_t::size

DMA transfer unit size.


dstInc

uint32_t LDMA_Descriptor_t::dstInc

Destination address increment unit size.


srcAddrMode

uint32_t LDMA_Descriptor_t::srcAddrMode

Source addressing mode.


dstAddrMode

uint32_t LDMA_Descriptor_t::dstAddrMode

Destination addressing mode.


srcAddr

uint32_t LDMA_Descriptor_t::srcAddr

DMA source address.


dstAddr

uint32_t LDMA_Descriptor_t::dstAddr

DMA destination address.

DMA write destination address.


linkMode

uint32_t LDMA_Descriptor_t::linkMode

Select absolute or relative link address.


link

uint32_t LDMA_Descriptor_t::link

Enable LINKLOAD when transfer is done.


linkAddr

int32_t LDMA_Descriptor_t::linkAddr

Address of next (linked) descriptor.


xfer

struct { ... } LDMA_Descriptor_t::xfer

TRANSFER DMA descriptor, this is the only descriptor type which can be used to start a DMA transfer.

syncSet

uint32_t LDMA_Descriptor_t::syncSet

Set bits in LDMA_CTRL.SYNCTRIG register.


syncClr

uint32_t LDMA_Descriptor_t::syncClr

Clear bits in LDMA_CTRL.SYNCTRIG register.


reserved3

uint32_t LDMA_Descriptor_t::reserved3

Reserved.


matchVal

uint32_t LDMA_Descriptor_t::matchVal

Sync trigger match value.


matchEn

uint32_t LDMA_Descriptor_t::matchEn

Sync trigger match enable.


reserved4

uint32_t LDMA_Descriptor_t::reserved4

Reserved.


sync

struct { ... } LDMA_Descriptor_t::sync

SYNCHRONIZE DMA descriptor, used for intra channel transfer synchronization.

immVal

uint32_t LDMA_Descriptor_t::immVal

Data to be written at dstAddr.


wri

struct { ... } LDMA_Descriptor_t::wri

WRITE DMA descriptor, used for write immediate operations.