EMU_TypeDef Struct ReferenceDevices > EMU

EMU Register Declaration

Definition at line 49 of file efr32mg1p_emu.h .

#include < efr32mg1p_emu.h >

Data Fields

__IOM uint32_t BIASCONF
__IOM uint32_t BIASTESTCTRL
__IOM uint32_t CMD
__IOM uint32_t CTRL
__IOM uint32_t DCDCCLIMCTRL
__IOM uint32_t DCDCCTRL
__IOM uint32_t DCDCLNCOMPCTRL
__IOM uint32_t DCDCLNFREQCTRL
__IOM uint32_t DCDCLNVCTRL
__IOM uint32_t DCDCLPCTRL
__IOM uint32_t DCDCLPVCTRL
__IOM uint32_t DCDCMISCCTRL
__IM uint32_t DCDCSYNC
__IOM uint32_t DCDCTIMING
__IOM uint32_t DCDCZDETCTRL
__IOM uint32_t EM4CTRL
__IOM uint32_t IEN
__IM uint32_t IF
__IOM uint32_t IFC
__IOM uint32_t IFS
__IOM uint32_t LOCK
__IOM uint32_t PWRCFG
__IOM uint32_t PWRCTRL
__IOM uint32_t PWRLOCK
__IOM uint32_t RAM0CTRL
uint32_t RESERVED0 [1U]
uint32_t RESERVED1 [2U]
uint32_t RESERVED2 [1U]
uint32_t RESERVED3 [1U]
uint32_t RESERVED4 [5U]
uint32_t RESERVED5 [49U]
uint32_t RESERVED6 [10U]
uint32_t RESERVED7 [2U]
__IM uint32_t STATUS
__IM uint32_t TEMP
__IOM uint32_t TEMPLIMITS
__IOM uint32_t TESTLOCK
__IOM uint32_t VMONALTAVDDCTRL
__IOM uint32_t VMONAVDDCTRL
__IOM uint32_t VMONDVDDCTRL
__IOM uint32_t VMONIO0CTRL

Field Documentation

__IOM uint32_t EMU_TypeDef::BIASCONF

Configurations Related to the Bias

Definition at line 92 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::BIASTESTCTRL

Test Control Register for Regulator and BIAS

Definition at line 98 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::CMD

Command Register

Definition at line 54 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::CTRL

Control Register

Definition at line 50 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCCLIMCTRL

DCDC Power Train PFET Current Limiter Control Register

Definition at line 72 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCCTRL

DCDC Control

Definition at line 67 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCLNCOMPCTRL

DCDC Low Noise Compensator Control Register

Definition at line 73 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCLNFREQCTRL

DCDC Low Noise Controller Frequency Control

Definition at line 80 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCLNVCTRL

DCDC Low Noise Voltage Register

Definition at line 74 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCLPCTRL

DCDC Low Power Control Register

Definition at line 79 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCLPVCTRL

DCDC Low Power Voltage Register

Definition at line 76 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCMISCCTRL

DCDC Miscellaneous Control Register

Definition at line 70 of file efr32mg1p_emu.h .

__IM uint32_t EMU_TypeDef::DCDCSYNC

DCDC Read Status Register

Definition at line 83 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCTIMING

DCDC Controller Timing Value Register

Definition at line 75 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::DCDCZDETCTRL

DCDC Power Train NFET Zero Current Detector Control Register

Definition at line 71 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::EM4CTRL

EM4 Control Register

Definition at line 57 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::IEN

Interrupt Enable Register

Definition at line 63 of file efr32mg1p_emu.h .

__IM uint32_t EMU_TypeDef::IF

Interrupt Flag Register

Definition at line 60 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 62 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 61 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::LOCK

Configuration Lock Register

Definition at line 52 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::PWRCFG

Power Configuration Register

Definition at line 65 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::PWRCTRL

Power Control Register

Definition at line 66 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::PWRLOCK

Regulator and Supply Lock Register

Definition at line 64 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::RAM0CTRL

Memory Control Register

Definition at line 53 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED0[1U]

Reserved for future use

Definition at line 56 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED1[2U]

Reserved for future use

Definition at line 69 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED2[1U]

Reserved for future use

Definition at line 78 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED3[1U]

Reserved for future use

Definition at line 82 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED4[5U]

Reserved for future use

Definition at line 85 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED5[49U]

Reserved for future use

Definition at line 91 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED6[10U]

Reserved for future use

Definition at line 94 of file efr32mg1p_emu.h .

uint32_t EMU_TypeDef::RESERVED7[2U]

Reserved for future use

Definition at line 97 of file efr32mg1p_emu.h .

__IM uint32_t EMU_TypeDef::STATUS

Status Register

Definition at line 51 of file efr32mg1p_emu.h .

__IM uint32_t EMU_TypeDef::TEMP

Value of Last Temperature Measurement

Definition at line 59 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::TEMPLIMITS

Temperature Limits for Interrupt Generation

Definition at line 58 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::TESTLOCK

Test Lock Register

Definition at line 95 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::VMONALTAVDDCTRL

Alternate VMON AVDD Channel Control

Definition at line 87 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::VMONAVDDCTRL

VMON AVDD Channel Control

Definition at line 86 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::VMONDVDDCTRL

VMON DVDD Channel Control

Definition at line 88 of file efr32mg1p_emu.h .

__IOM uint32_t EMU_TypeDef::VMONIO0CTRL

VMON IOVDD0 Channel Control

Definition at line 89 of file efr32mg1p_emu.h .

The documentation for this struct was generated from the following file:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFR32MG1P/Include/ efr32mg1p_emu.h