I2CEMLIB

Detailed Description

Inter-integrated Circuit (I2C) Peripheral API.

This module contains functions to control the I2C peripheral of Silicon Labs 32-bit MCUs and SoCs. The I2C interface allows communication on I2C buses with the lowest energy consumption possible.

Data Structures

struct  I2C_Init_TypeDef
 
struct  I2C_TransferSeq_TypeDef
 Master mode transfer message structure used to define a complete I2C transfer sequence (from start to stop).
 

Macros

#define I2C_FLAG_10BIT_ADDR   0x0010
 
#define I2C_FLAG_READ   0x0002
 Indicate plain read sequence: S+ADDR(R)+DATA0+P.
 
#define I2C_FLAG_WRITE   0x0001
 Indicate plain write sequence: S+ADDR(W)+DATA0+P.
 
#define I2C_FLAG_WRITE_READ   0x0004
 Indicate combined write/read sequence: S+ADDR(W)+DATA0+Sr+ADDR(R)+DATA1+P.
 
#define I2C_FLAG_WRITE_WRITE   0x0008
 Indicate write sequence using two buffers: S+ADDR(W)+DATA0+DATA1+P.
 
#define I2C_FREQ_FAST_MAX   392157
 Fast mode max frequency assuming using 6:3 ratio for Nlow:Nhigh.
 
#define I2C_FREQ_FASTPLUS_MAX   987167
 Fast mode+ max frequency assuming using 11:6 ratio for Nlow:Nhigh.
 
#define I2C_FREQ_STANDARD_MAX   92000
 Standard mode max frequency assuming using 4:4 ratio for Nlow:Nhigh.
 
#define I2C_INIT_DEFAULT
 

Enumerations

enum  I2C_ClockHLR_TypeDef {
  i2cClockHLRStandard = _I2C_CTRL_CLHR_STANDARD,
  i2cClockHLRAsymetric = _I2C_CTRL_CLHR_ASYMMETRIC,
  i2cClockHLRFast = _I2C_CTRL_CLHR_FAST
}
 
enum  I2C_TransferReturn_TypeDef {
  i2cTransferInProgress = 1,
  i2cTransferDone = 0,
  i2cTransferNack = -1,
  i2cTransferBusErr = -2,
  i2cTransferArbLost = -3,
  i2cTransferUsageFault = -4,
  i2cTransferSwFault = -5
}
 

Functions

uint32_t I2C_BusFreqGet (I2C_TypeDef *i2c)
 Get the current configured I2C bus frequency.
 
void I2C_BusFreqSet (I2C_TypeDef *i2c, uint32_t freqRef, uint32_t freqScl, I2C_ClockHLR_TypeDef i2cMode)
 Set the I2C bus frequency.
 
void I2C_Enable (I2C_TypeDef *i2c, bool enable)
 Enable/disable I2C.
 
void I2C_Init (I2C_TypeDef *i2c, const I2C_Init_TypeDef *init)
 Initialize I2C.
 
__STATIC_INLINE void I2C_IntClear (I2C_TypeDef *i2c, uint32_t flags)
 Clear one or more pending I2C interrupts.
 
__STATIC_INLINE void I2C_IntDisable (I2C_TypeDef *i2c, uint32_t flags)
 Disable one or more I2C interrupts.
 
__STATIC_INLINE void I2C_IntEnable (I2C_TypeDef *i2c, uint32_t flags)
 Enable one or more I2C interrupts.
 
__STATIC_INLINE uint32_t I2C_IntGet (I2C_TypeDef *i2c)
 Get pending I2C interrupt flags.
 
__STATIC_INLINE uint32_t I2C_IntGetEnabled (I2C_TypeDef *i2c)
 Get enabled and pending I2C interrupt flags. Useful for handling more interrupt sources in the same interrupt handler.
 
__STATIC_INLINE void I2C_IntSet (I2C_TypeDef *i2c, uint32_t flags)
 Set one or more pending I2C interrupts from SW.
 
void I2C_Reset (I2C_TypeDef *i2c)
 Reset I2C to the same state that it was in after a hardware reset.
 
__STATIC_INLINE uint8_t I2C_SlaveAddressGet (I2C_TypeDef *i2c)
 Get slave address used for I2C peripheral (when operating in slave mode).
 
__STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet (I2C_TypeDef *i2c)
 Get slave address mask used for I2C peripheral (when operating in slave mode).
 
__STATIC_INLINE void I2C_SlaveAddressMaskSet (I2C_TypeDef *i2c, uint8_t mask)
 Set slave address mask used for I2C peripheral (when operating in slave mode).
 
__STATIC_INLINE void I2C_SlaveAddressSet (I2C_TypeDef *i2c, uint8_t addr)
 Set slave address to use for I2C peripheral (when operating in slave mode).
 
I2C_TransferReturn_TypeDef I2C_Transfer (I2C_TypeDef *i2c)
 Continue an initiated I2C transfer (single master mode only).
 
I2C_TransferReturn_TypeDef I2C_TransferInit (I2C_TypeDef *i2c, I2C_TransferSeq_TypeDef *seq)
 Prepare and start an I2C transfer (single master mode only).
 

Macro Definition Documentation

#define I2C_FLAG_10BIT_ADDR   0x0010

Use 10 bit address.

Definition at line 161 of file em_i2c.h.

Referenced by I2C_Transfer().

#define I2C_FLAG_READ   0x0002

Indicate plain read sequence: S+ADDR(R)+DATA0+P.

  • S - Start
  • ADDR(R) - Address with W/R bit set
  • DATA0 - Data read into buffer with index 0
  • P - Stop

Definition at line 134 of file em_i2c.h.

Referenced by controllerRead(), I2C_Transfer(), I2C_TransferInit(), and SI7021_cmdRead().

#define I2C_FLAG_WRITE   0x0001
#define I2C_FLAG_WRITE_READ   0x0004

Indicate combined write/read sequence: S+ADDR(W)+DATA0+Sr+ADDR(R)+DATA1+P.

  • S - Start
  • Sr - Repeated start
  • ADDR(W) - Address with W/R bit cleared
  • ADDR(R) - Address with W/R bit set
  • DATAn - Data written from/read into buffer with index n
  • P - Stop

Definition at line 147 of file em_i2c.h.

Referenced by CCS811_getMeasurement(), CCS811_getRawData(), CCS811_readMailbox(), EEPROM_Read(), I2C_Transfer(), I2C_TransferInit(), SI1133_registerBlockRead(), SI1133_registerRead(), Si1147_Read_Block_Register(), Si1147_Read_Register(), Si114x_i2c_smbus_read_byte_data(), Si114x_i2c_smbus_read_i2c_block_data(), Si7013_Detect(), Si7013_GetFirmwareRevision(), SI7021_cmdRead(), SI7210_registerRead(), Si72xx_Read_Register(), sl_efpdrv_read_register(), and TEMPSENS_RegisterGet().

#define I2C_FLAG_WRITE_WRITE   0x0008

Indicate write sequence using two buffers: S+ADDR(W)+DATA0+DATA1+P.

  • S - Start
  • ADDR(W) - Address with W/R bit cleared
  • DATAn - Data written from buffer with index n
  • P - Stop

Definition at line 158 of file em_i2c.h.

Referenced by EEPROM_Write(), SI7021_cmdWrite(), SI7210_registerWrite(), and sl_efpdrv_write_register().

#define I2C_FREQ_FAST_MAX   392157

Fast mode max frequency assuming using 6:3 ratio for Nlow:Nhigh.

From I2C specification: Min Tlow = 1.3us, min Thigh = 0.6us, max Trise=0.3us, max Tfall=0.3us. Since ratio is 6:3, have to use worst case value of Tlow or 2xThigh as base.

1/(Tlow + Thigh + 0.3us + 0.3us) = 1/(1.3 + 0.65 + 0.6)us = 392157Hz

Definition at line 100 of file em_i2c.h.

#define I2C_FREQ_FASTPLUS_MAX   987167

Fast mode+ max frequency assuming using 11:6 ratio for Nlow:Nhigh.

From I2C specification: Min Tlow = 0.5us, min Thigh = 0.26us, max Trise=0.12us, max Tfall=0.12us. Since ratio is 11:6, have to use worst case value of Tlow or (11/6)xThigh as base.

1/(Tlow + Thigh + 0.12us + 0.12us) = 1/(0.5 + 0.273 + 0.24)us = 987167Hz

Definition at line 112 of file em_i2c.h.

Referenced by sl_efpdrv_init().

#define I2C_FREQ_STANDARD_MAX   92000

Standard mode max frequency assuming using 4:4 ratio for Nlow:Nhigh.

From I2C specification: Min Tlow = 4.7us, min Thigh = 4.0us, max Trise=1.0us, max Tfall=0.3us. Since ratio is 4:4, have to use worst case value of Tlow or Thigh as base.

1/(Tlow + Thigh + 1us + 0.3us) = 1/(4.7 + 4.7 + 1.3)us = 93458Hz

Note
Due to chip characteristics, max value is somewhat reduced.

Definition at line 79 of file em_i2c.h.

#define I2C_INIT_DEFAULT
Value:
{ \
true, /* Enable when initialization done. */ \
true, /* Set to master mode. */ \
0, /* Use currently configured reference clock. */ \
I2C_FREQ_STANDARD_MAX, /* Set to standard rate assuring being */ \
/* within I2C specification. */ \
i2cClockHLRStandard /* Set to use 4:4 low/high duty cycle. */ \
}

Suggested default configuration for I2C initialization structure.

Definition at line 220 of file em_i2c.h.

Enumeration Type Documentation

Clock low to high ratio settings.

Enumerator
i2cClockHLRStandard 

Ratio is 4:4

i2cClockHLRAsymetric 

Ratio is 6:3

i2cClockHLRFast 

Ratio is 11:3

Definition at line 168 of file em_i2c.h.

Return codes for single master mode transfer function.

Enumerator
i2cTransferInProgress 

Transfer in progress.

i2cTransferDone 

Transfer completed successfully.

i2cTransferNack 

NACK received during transfer.

i2cTransferBusErr 

Bus error during transfer (misplaced START/STOP).

i2cTransferArbLost 

Arbitration lost during transfer.

i2cTransferUsageFault 

Usage fault.

i2cTransferSwFault 

SW fault.

Definition at line 175 of file em_i2c.h.

Function Documentation

uint32_t I2C_BusFreqGet ( I2C_TypeDef i2c)

Get the current configured I2C bus frequency.

This frequency is only relevant when acting as master.

Note
The actual frequency is a real number, this function returns a rounded down (truncated) integer value.
Parameters
[in]i2cA pointer to the I2C peripheral register block.
Returns
The current I2C frequency in Hz.

Definition at line 203 of file em_i2c.c.

References _I2C_CTRL_CLHR_MASK, _I2C_CTRL_CLHR_SHIFT, I2C_TypeDef::CLKDIV, CMU_ClockFreqGet(), cmuClock_I2C0, cmuClock_I2C1, I2C_TypeDef::CTRL, I2C0, and I2C1.

void I2C_BusFreqSet ( I2C_TypeDef i2c,
uint32_t  freqRef,
uint32_t  freqScl,
I2C_ClockHLR_TypeDef  i2cMode 
)

Set the I2C bus frequency.

The bus frequency is only relevant when acting as master. The bus frequency should not be set higher than the maximum frequency accepted by the slowest device on the bus.

Notice that, due to asymmetric requirements on low and high I2C clock cycles in the I2C specification, the maximum frequency allowed to comply with the specification may be somewhat lower than expected.

See the reference manual, details on I2C clock generation, for maximum allowed theoretical frequencies for different modes.

Parameters
[in]i2cA pointer to the I2C peripheral register block.
[in]freqRefAn I2C reference clock frequency in Hz that will be used. If set to 0, HFPERCLK / HFPERCCLK clock is used. Setting it to a higher than actual configured value has the consequence of reducing the real I2C frequency.
[in]freqSclA bus frequency to set (bus speed may be lower due to integer prescaling). Safe (according to the I2C specification) maximum frequencies for standard fast and fast+ modes are available using I2C_FREQ_ defines. (Using I2C_FREQ_ defines requires corresponding setting of type.) The slowest slave device on a bus must always be considered.
[in]i2cModeA clock low-to-high ratio type to use. If not using i2cClockHLRStandard, make sure all devices on the bus support the specified mode. Using a non-standard ratio is useful to achieve a higher bus clock in fast and fast+ modes.

Definition at line 268 of file em_i2c.c.

References _I2C_CLKDIV_DIV_MASK, _I2C_CTRL_CLHR_MASK, _I2C_CTRL_CLHR_SHIFT, BUS_RegMaskedWrite(), I2C_TypeDef::CLKDIV, CMU_ClockFreqGet(), cmuClock_I2C0, cmuClock_I2C1, I2C_TypeDef::CTRL, I2C0, I2C1, I2C_CTRL_SLAVE, i2cClockHLRAsymetric, i2cClockHLRFast, and i2cClockHLRStandard.

Referenced by I2C_Init().

void I2C_Enable ( I2C_TypeDef i2c,
bool  enable 
)

Enable/disable I2C.

Note
After enabling the I2C (from being disabled), the I2C is in BUSY state.
Parameters
[in]i2cA pointer to the I2C peripheral register block.
[in]enableTrue to enable counting, false to disable.

Definition at line 403 of file em_i2c.c.

References _I2C_CTRL_EN_SHIFT, BUS_RegBitWrite(), and I2C_TypeDef::CTRL.

Referenced by I2C_Init().

void I2C_Init ( I2C_TypeDef i2c,
const I2C_Init_TypeDef init 
)

Initialize I2C.

Parameters
[in]i2cA pointer to the I2C peripheral register block.
[in]initA pointer to the I2C initialization structure.

Definition at line 424 of file em_i2c.c.

References _I2C_CTRL_SLAVE_SHIFT, _I2C_IF_MASK, BUS_RegBitWrite(), I2C_Init_TypeDef::clhr, I2C_TypeDef::CTRL, I2C_Init_TypeDef::enable, I2C_Init_TypeDef::freq, I2C_BusFreqSet(), I2C_Enable(), I2C_IntClear(), I2C_TypeDef::IEN, I2C_Init_TypeDef::master, and I2C_Init_TypeDef::refFreq.

Referenced by I2CSPM_Init().

__STATIC_INLINE void I2C_IntClear ( I2C_TypeDef i2c,
uint32_t  flags 
)

Clear one or more pending I2C interrupts.

Parameters
[in]i2cPointer to I2C peripheral register block.
[in]flagsPending I2C interrupt source to clear. Use a bitwise logic OR combination of valid interrupt flags for the I2C module (I2C_IF_nnn).

Definition at line 300 of file em_i2c.h.

References I2C_TypeDef::IFC.

Referenced by I2C_Init(), I2C_Reset(), I2C_Transfer(), and I2C_TransferInit().

__STATIC_INLINE void I2C_IntDisable ( I2C_TypeDef i2c,
uint32_t  flags 
)

Disable one or more I2C interrupts.

Parameters
[in]i2cPointer to I2C peripheral register block.
[in]flagsI2C interrupt sources to disable. Use a bitwise logic OR combination of valid interrupt flags for the I2C module (I2C_IF_nnn).

Definition at line 320 of file em_i2c.h.

References I2C_TypeDef::IEN.

__STATIC_INLINE void I2C_IntEnable ( I2C_TypeDef i2c,
uint32_t  flags 
)

Enable one or more I2C interrupts.

Note
Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. To ignore a pending interrupt, consider using I2C_IntClear() prior to enabling the interrupt.
Parameters
[in]i2cPointer to I2C peripheral register block.
[in]flagsI2C interrupt sources to enable. Use a bitwise logic OR combination of valid interrupt flags for the I2C module (I2C_IF_nnn).

Definition at line 345 of file em_i2c.h.

References I2C_TypeDef::IEN.

__STATIC_INLINE uint32_t I2C_IntGet ( I2C_TypeDef i2c)

Get pending I2C interrupt flags.

Note
Event bits are not cleared by the use of this function.
Parameters
[in]i2cPointer to I2C peripheral register block.
Returns
I2C interrupt sources pending. A bitwise logic OR combination of valid interrupt flags for the I2C module (I2C_IF_nnn).

Definition at line 368 of file em_i2c.h.

References I2C_TypeDef::IF.

__STATIC_INLINE uint32_t I2C_IntGetEnabled ( I2C_TypeDef i2c)

Get enabled and pending I2C interrupt flags. Useful for handling more interrupt sources in the same interrupt handler.

Note
Interrupt flags are not cleared by the use of this function.
Parameters
[in]i2cPointer to I2C peripheral register block.
Returns
Pending and enabled I2C interrupt sources Return value is the bitwise AND of
  • the enabled interrupt sources in I2Cn_IEN and
  • the pending interrupt flags I2Cn_IF

Definition at line 390 of file em_i2c.h.

References I2C_TypeDef::IEN, and I2C_TypeDef::IF.

__STATIC_INLINE void I2C_IntSet ( I2C_TypeDef i2c,
uint32_t  flags 
)

Set one or more pending I2C interrupts from SW.

Parameters
[in]i2cPointer to I2C peripheral register block.
[in]flagsI2C interrupt sources to set to pending. Use a bitwise logic OR combination of valid interrupt flags for the I2C module (I2C_IF_nnn).

Definition at line 409 of file em_i2c.h.

References I2C_TypeDef::IFS.

void I2C_Reset ( I2C_TypeDef i2c)

Reset I2C to the same state that it was in after a hardware reset.

Note
The ROUTE register is NOT reset by this function to allow for centralized setup of this feature.
Parameters
[in]i2cA pointer to the I2C peripheral register block.

Definition at line 450 of file em_i2c.c.

References _I2C_CLKDIV_RESETVALUE, _I2C_CTRL_RESETVALUE, _I2C_IEN_RESETVALUE, _I2C_IF_MASK, _I2C_SADDR_RESETVALUE, _I2C_SADDRMASK_RESETVALUE, I2C_TypeDef::CLKDIV, I2C_TypeDef::CMD, I2C_TypeDef::CTRL, I2C_CMD_ABORT, I2C_CMD_CLEARPC, I2C_CMD_CLEARTX, I2C_IntClear(), I2C_TypeDef::IEN, I2C_TypeDef::SADDR, and I2C_TypeDef::SADDRMASK.

__STATIC_INLINE uint8_t I2C_SlaveAddressGet ( I2C_TypeDef i2c)

Get slave address used for I2C peripheral (when operating in slave mode).

For 10-bit addressing mode, the address is split in two bytes, and only the first byte setting is fetched, effectively only controlling the 2 most significant bits of the 10-bit address. Full handling of 10-bit addressing in slave mode requires additional SW handling.

Parameters
[in]i2cPointer to I2C peripheral register block.
Returns
I2C slave address in use. The 7 most significant bits define the actual address, the least significant bit is reserved and always returned as 0.

Definition at line 437 of file em_i2c.h.

References I2C_TypeDef::SADDR.

__STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet ( I2C_TypeDef i2c)

Get slave address mask used for I2C peripheral (when operating in slave mode).

The address mask defines how the comparator works. A bit position with value 0 means that the corresponding slave address bit is ignored during comparison (don't care). A bit position with value 1 means that the corresponding slave address bit must match.

For 10-bit addressing mode, the address is split in two bytes, and only the mask for the first address byte is fetched, effectively only controlling the 2 most significant bits of the 10-bit address.

Parameters
[in]i2cPointer to I2C peripheral register block.
Returns
I2C slave address mask in use. The 7 most significant bits define the actual address mask, the least significant bit is reserved and always returned as 0.

Definition at line 487 of file em_i2c.h.

References I2C_TypeDef::SADDRMASK.

__STATIC_INLINE void I2C_SlaveAddressMaskSet ( I2C_TypeDef i2c,
uint8_t  mask 
)

Set slave address mask used for I2C peripheral (when operating in slave mode).

The address mask defines how the comparator works. A bit position with value 0 means that the corresponding slave address bit is ignored during comparison (don't care). A bit position with value 1 means that the corresponding slave address bit must match.

For 10-bit addressing mode, the address is split in two bytes, and only the mask for the first address byte is set, effectively only controlling the 2 most significant bits of the 10-bit address.

Parameters
[in]i2cPointer to I2C peripheral register block.
[in]maskI2C slave address mask to use. The 7 most significant bits define the actual address mask, the least significant bit is reserved and should be 0.

Definition at line 515 of file em_i2c.h.

References I2C_TypeDef::SADDRMASK.

__STATIC_INLINE void I2C_SlaveAddressSet ( I2C_TypeDef i2c,
uint8_t  addr 
)

Set slave address to use for I2C peripheral (when operating in slave mode).

For 10- bit addressing mode, the address is split in two bytes, and only the first byte is set, effectively only controlling the 2 most significant bits of the 10-bit address. Full handling of 10-bit addressing in slave mode requires additional SW handling.

Parameters
[in]i2cPointer to I2C peripheral register block.
[in]addrI2C slave address to use. The 7 most significant bits define the actual address, the least significant bit is reserved and always set to 0.

Definition at line 459 of file em_i2c.h.

References I2C_TypeDef::SADDR.

I2C_TransferReturn_TypeDef I2C_Transfer ( I2C_TypeDef i2c)

Continue an initiated I2C transfer (single master mode only).

This function is used repeatedly after a I2C_TransferInit() to complete a transfer. It may be used in polled mode as the below example shows:

* I2C_TransferReturn_TypeDef ret;
*
* // Do a polled transfer
* ret = I2C_TransferInit(I2C0, seq);
* while (ret == i2cTransferInProgress)
* {
*   ret = I2C_Transfer(I2C0);
* }
* 

It may also be used in interrupt driven mode, where this function is invoked from the interrupt handler. Notice that, if used in interrupt mode, NVIC interrupts must be configured and enabled for the I2C bus used. I2C peripheral specific interrupts are managed by this software.

Note
Only single master mode is supported.
Parameters
[in]i2cA pointer to the I2C peripheral register block.
Returns
Returns status for an ongoing transfer.

Definition at line 505 of file em_i2c.c.

References I2C_TransferSeq_TypeDef::addr, I2C_TransferSeq_TypeDef::buf, I2C_TypeDef::CMD, I2C_TransferSeq_TypeDef::data, I2C_TransferSeq_TypeDef::flags, I2C0, I2C1, I2C_CMD_ACK, I2C_CMD_NACK, I2C_CMD_START, I2C_CMD_STOP, I2C_FLAG_10BIT_ADDR, I2C_FLAG_READ, I2C_FLAG_WRITE, I2C_FLAG_WRITE_READ, I2C_IF_ACK, I2C_IF_ARBLOST, I2C_IF_BUSERR, I2C_IF_MSTOP, I2C_IF_NACK, I2C_IF_RXDATAV, I2C_IntClear(), i2cTransferArbLost, i2cTransferBusErr, i2cTransferDone, i2cTransferInProgress, i2cTransferNack, i2cTransferSwFault, i2cTransferUsageFault, I2C_TypeDef::IEN, I2C_TypeDef::IF, I2C_TransferSeq_TypeDef::len, I2C_TypeDef::RXDATA, and I2C_TypeDef::TXDATA.

Referenced by I2C_TransferInit(), and I2CSPM_Transfer().

I2C_TransferReturn_TypeDef I2C_TransferInit ( I2C_TypeDef i2c,
I2C_TransferSeq_TypeDef seq 
)

Prepare and start an I2C transfer (single master mode only).

This function must be invoked to start an I2C transfer sequence. To complete the transfer, I2C_Transfer() must be used either in polled mode or by adding a small driver wrapper using interrupts.

Note
Only single master mode is supported.
Parameters
[in]i2cA pointer to the I2C peripheral register block.
[in]seqA pointer to the sequence structure defining the I2C transfer to take place. The referenced structure must exist until the transfer has fully completed.
Returns
Returns the status for an ongoing transfer:

Definition at line 839 of file em_i2c.c.

References _I2C_IF_MASK, I2C_TransferSeq_TypeDef::buf, I2C_TypeDef::CMD, I2C_TransferSeq_TypeDef::flags, I2C0, I2C1, I2C_CMD_ABORT, I2C_CMD_CLEARPC, I2C_CMD_CLEARTX, I2C_FLAG_READ, I2C_FLAG_WRITE_READ, I2C_IEN_ACK, I2C_IEN_MSTOP, I2C_IEN_NACK, I2C_IEN_RXDATAV, I2C_IntClear(), I2C_STATE_BUSY, I2C_Transfer(), i2cTransferInProgress, i2cTransferUsageFault, I2C_TypeDef::IEN, I2C_TransferSeq_TypeDef::len, and I2C_TypeDef::STATE.

Referenced by I2CSPM_Transfer().