Structure to hold portl and pinh for channels.

Public Attributes#

uint8_t
port_l

PWM GPIO output low side port.

uint8_t
pin_l

PWM GPIO output low side pin.

uint8_t
port_h

PWM GPIO output high side port.

uint8_t
pin_h

PWM GPIO output high side pin.

uint8_t
mux_l

PWM GPIO output low side mux.

uint8_t
mux_h

PWM GPIO output high side mux.

uint8_t
pad_l

PWM GPIO output low side pad.

uint8_t
pad_h

PWM GPIO output high side pad.

Public Attribute Documentation#

port_l#

uint8_t sl_pwm_init_t::port_l

PWM GPIO output low side port.


pin_l#

uint8_t sl_pwm_init_t::pin_l

PWM GPIO output low side pin.


port_h#

uint8_t sl_pwm_init_t::port_h

PWM GPIO output high side port.


pin_h#

uint8_t sl_pwm_init_t::pin_h

PWM GPIO output high side pin.


mux_l#

uint8_t sl_pwm_init_t::mux_l

PWM GPIO output low side mux.


mux_h#

uint8_t sl_pwm_init_t::mux_h

PWM GPIO output high side mux.


pad_l#

uint8_t sl_pwm_init_t::pad_l

PWM GPIO output low side pad.


pad_h#

uint8_t sl_pwm_init_t::pad_h

PWM GPIO output high side pad.