QSPI_StigCmd_TypeDef Struct Reference
Defines command to be executed using STIG mechanism.
      
       #include <em_qspi.h>
      
     
| Data Fields | |
| uint8_t | cmdOpcode | 
| Command op-code. | |
| uint16_t | readDataSize | 
| Number of Read Data Bytes. | |
| uint8_t | addrSize | 
| Number of Address Bytes. | |
| uint8_t | writeDataSize | 
| Number of Write Data Bytes. | |
| uint8_t | dummyCycles | 
| Number of dummy cycles. | |
| bool | modeBitEnable | 
| Mode Bit Configuration register are sent following the address bytes. | |
| uint32_t | address | 
| Flash command address. | |
| void * | readBuffer | 
| Buffer for read data. | |
| void * | writeBuffer | 
| Buffer with data to write. | |
Defines command to be executed using STIG mechanism.
Field Documentation
◆ cmdOpcode
| uint8_t QSPI_StigCmd_TypeDef::cmdOpcode | 
Command op-code.
◆ readDataSize
| uint16_t QSPI_StigCmd_TypeDef::readDataSize | 
Number of Read Data Bytes.
◆ addrSize
| uint8_t QSPI_StigCmd_TypeDef::addrSize | 
Number of Address Bytes.
◆ writeDataSize
| uint8_t QSPI_StigCmd_TypeDef::writeDataSize | 
Number of Write Data Bytes.
◆ dummyCycles
| uint8_t QSPI_StigCmd_TypeDef::dummyCycles | 
Number of dummy cycles.
◆ modeBitEnable
| bool QSPI_StigCmd_TypeDef::modeBitEnable | 
Mode Bit Configuration register are sent following the address bytes.
◆ address
| uint32_t QSPI_StigCmd_TypeDef::address | 
Flash command address.
◆ readBuffer
| void* QSPI_StigCmd_TypeDef::readBuffer | 
Buffer for read data.
◆ writeBuffer
| void* QSPI_StigCmd_TypeDef::writeBuffer | 
Buffer with data to write.