Macros
#define	_RTCC_CC_CCV_CCV_DEFAULT 0x00000000UL

#define	_RTCC_CC_CCV_CCV_MASK 0xFFFFFFFFUL

#define	_RTCC_CC_CCV_CCV_SHIFT 0

#define	_RTCC_CC_CCV_MASK 0xFFFFFFFFUL

#define	_RTCC_CC_CCV_RESETVALUE 0x00000000UL

#define	_RTCC_CC_CTRL_CMOA_CLEAR 0x00000002UL

#define	_RTCC_CC_CTRL_CMOA_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_CMOA_MASK 0xCUL

#define	_RTCC_CC_CTRL_CMOA_PULSE 0x00000000UL

#define	_RTCC_CC_CTRL_CMOA_SET 0x00000003UL

#define	_RTCC_CC_CTRL_CMOA_SHIFT 2

#define	_RTCC_CC_CTRL_CMOA_TOGGLE 0x00000001UL

#define	_RTCC_CC_CTRL_COMPBASE_CNT 0x00000000UL

#define	_RTCC_CC_CTRL_COMPBASE_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_COMPBASE_MASK 0x800UL

#define	_RTCC_CC_CTRL_COMPBASE_PRECNT 0x00000001UL

#define	_RTCC_CC_CTRL_COMPBASE_SHIFT 11

#define	_RTCC_CC_CTRL_COMPMASK_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_COMPMASK_MASK 0x1F000UL

#define	_RTCC_CC_CTRL_COMPMASK_SHIFT 12

#define	_RTCC_CC_CTRL_DAYCC_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_DAYCC_MASK 0x20000UL

#define	_RTCC_CC_CTRL_DAYCC_MONTH 0x00000000UL

#define	_RTCC_CC_CTRL_DAYCC_SHIFT 17

#define	_RTCC_CC_CTRL_DAYCC_WEEK 0x00000001UL

#define	_RTCC_CC_CTRL_ICEDGE_BOTH 0x00000002UL

#define	_RTCC_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_ICEDGE_FALLING 0x00000001UL

#define	_RTCC_CC_CTRL_ICEDGE_MASK 0x30UL

#define	_RTCC_CC_CTRL_ICEDGE_NONE 0x00000003UL

#define	_RTCC_CC_CTRL_ICEDGE_RISING 0x00000000UL

#define	_RTCC_CC_CTRL_ICEDGE_SHIFT 4

#define	_RTCC_CC_CTRL_MASK 0x0003FBFFUL

#define	_RTCC_CC_CTRL_MODE_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL

#define	_RTCC_CC_CTRL_MODE_MASK 0x3UL

#define	_RTCC_CC_CTRL_MODE_OFF 0x00000000UL

#define	_RTCC_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL

#define	_RTCC_CC_CTRL_MODE_SHIFT 0

#define	_RTCC_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_RTCC_CC_CTRL_PRSSEL_MASK 0x3C0UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_RTCC_CC_CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_RTCC_CC_CTRL_PRSSEL_SHIFT 6

#define	_RTCC_CC_CTRL_RESETVALUE 0x00000000UL

#define	_RTCC_CC_DATE_DAYT_DEFAULT 0x00000000UL

#define	_RTCC_CC_DATE_DAYT_MASK 0x30UL

#define	_RTCC_CC_DATE_DAYT_SHIFT 4

#define	_RTCC_CC_DATE_DAYU_DEFAULT 0x00000000UL

#define	_RTCC_CC_DATE_DAYU_MASK 0xFUL

#define	_RTCC_CC_DATE_DAYU_SHIFT 0

#define	_RTCC_CC_DATE_MASK 0x00001F3FUL

#define	_RTCC_CC_DATE_MONTHT_DEFAULT 0x00000000UL

#define	_RTCC_CC_DATE_MONTHT_MASK 0x1000UL

#define	_RTCC_CC_DATE_MONTHT_SHIFT 12

#define	_RTCC_CC_DATE_MONTHU_DEFAULT 0x00000000UL

#define	_RTCC_CC_DATE_MONTHU_MASK 0xF00UL

#define	_RTCC_CC_DATE_MONTHU_SHIFT 8

#define	_RTCC_CC_DATE_RESETVALUE 0x00000000UL

#define	_RTCC_CC_TIME_HOURT_DEFAULT 0x00000000UL

#define	_RTCC_CC_TIME_HOURT_MASK 0x300000UL

#define	_RTCC_CC_TIME_HOURT_SHIFT 20

#define	_RTCC_CC_TIME_HOURU_DEFAULT 0x00000000UL

#define	_RTCC_CC_TIME_HOURU_MASK 0xF0000UL

#define	_RTCC_CC_TIME_HOURU_SHIFT 16

#define	_RTCC_CC_TIME_MASK 0x003F7F7FUL

#define	_RTCC_CC_TIME_MINT_DEFAULT 0x00000000UL

#define	_RTCC_CC_TIME_MINT_MASK 0x7000UL

#define	_RTCC_CC_TIME_MINT_SHIFT 12

#define	_RTCC_CC_TIME_MINU_DEFAULT 0x00000000UL

#define	_RTCC_CC_TIME_MINU_MASK 0xF00UL

#define	_RTCC_CC_TIME_MINU_SHIFT 8

#define	_RTCC_CC_TIME_RESETVALUE 0x00000000UL

#define	_RTCC_CC_TIME_SECT_DEFAULT 0x00000000UL

#define	_RTCC_CC_TIME_SECT_MASK 0x70UL

#define	_RTCC_CC_TIME_SECT_SHIFT 4

#define	_RTCC_CC_TIME_SECU_DEFAULT 0x00000000UL

#define	_RTCC_CC_TIME_SECU_MASK 0xFUL

#define	_RTCC_CC_TIME_SECU_SHIFT 0

#define	_RTCC_CMD_CLRSTATUS_DEFAULT 0x00000000UL

#define	_RTCC_CMD_CLRSTATUS_MASK 0x1UL

#define	_RTCC_CMD_CLRSTATUS_SHIFT 0

#define	_RTCC_CMD_MASK 0x00000001UL

#define	_RTCC_CMD_RESETVALUE 0x00000000UL

#define	_RTCC_CNT_CNT_DEFAULT 0x00000000UL

#define	_RTCC_CNT_CNT_MASK 0xFFFFFFFFUL

#define	_RTCC_CNT_CNT_SHIFT 0

#define	_RTCC_CNT_MASK 0xFFFFFFFFUL

#define	_RTCC_CNT_RESETVALUE 0x00000000UL

#define	_RTCC_COMBCNT_CNTLSB_DEFAULT 0x00000000UL

#define	_RTCC_COMBCNT_CNTLSB_MASK 0xFFFF8000UL

#define	_RTCC_COMBCNT_CNTLSB_SHIFT 15

#define	_RTCC_COMBCNT_MASK 0xFFFFFFFFUL

#define	_RTCC_COMBCNT_PRECNT_DEFAULT 0x00000000UL

#define	_RTCC_COMBCNT_PRECNT_MASK 0x7FFFUL

#define	_RTCC_COMBCNT_PRECNT_SHIFT 0

#define	_RTCC_COMBCNT_RESETVALUE 0x00000000UL

#define	_RTCC_CTRL_CCV1TOP_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_CCV1TOP_MASK 0x20UL

#define	_RTCC_CTRL_CCV1TOP_SHIFT 5

#define	_RTCC_CTRL_CNTMODE_CALENDAR 0x00000001UL

#define	_RTCC_CTRL_CNTMODE_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_CNTMODE_MASK 0x10000UL

#define	_RTCC_CTRL_CNTMODE_NORMAL 0x00000000UL

#define	_RTCC_CTRL_CNTMODE_SHIFT 16

#define	_RTCC_CTRL_CNTPRESC_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_CNTPRESC_DIV1 0x00000000UL

#define	_RTCC_CTRL_CNTPRESC_DIV1024 0x0000000AUL

#define	_RTCC_CTRL_CNTPRESC_DIV128 0x00000007UL

#define	_RTCC_CTRL_CNTPRESC_DIV16 0x00000004UL

#define	_RTCC_CTRL_CNTPRESC_DIV16384 0x0000000EUL

#define	_RTCC_CTRL_CNTPRESC_DIV2 0x00000001UL

#define	_RTCC_CTRL_CNTPRESC_DIV2048 0x0000000BUL

#define	_RTCC_CTRL_CNTPRESC_DIV256 0x00000008UL

#define	_RTCC_CTRL_CNTPRESC_DIV32 0x00000005UL

#define	_RTCC_CTRL_CNTPRESC_DIV32768 0x0000000FUL

#define	_RTCC_CTRL_CNTPRESC_DIV4 0x00000002UL

#define	_RTCC_CTRL_CNTPRESC_DIV4096 0x0000000CUL

#define	_RTCC_CTRL_CNTPRESC_DIV512 0x00000009UL

#define	_RTCC_CTRL_CNTPRESC_DIV64 0x00000006UL

#define	_RTCC_CTRL_CNTPRESC_DIV8 0x00000003UL

#define	_RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL

#define	_RTCC_CTRL_CNTPRESC_MASK 0xF00UL

#define	_RTCC_CTRL_CNTPRESC_SHIFT 8

#define	_RTCC_CTRL_CNTTICK_CCV0MATCH 0x00000001UL

#define	_RTCC_CTRL_CNTTICK_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_CNTTICK_MASK 0x1000UL

#define	_RTCC_CTRL_CNTTICK_PRESC 0x00000000UL

#define	_RTCC_CTRL_CNTTICK_SHIFT 12

#define	_RTCC_CTRL_DEBUGRUN_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_DEBUGRUN_MASK 0x4UL

#define	_RTCC_CTRL_DEBUGRUN_SHIFT 2

#define	_RTCC_CTRL_ENABLE_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_ENABLE_MASK 0x1UL

#define	_RTCC_CTRL_ENABLE_SHIFT 0

#define	_RTCC_CTRL_LYEARCORRDIS_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_LYEARCORRDIS_MASK 0x20000UL

#define	_RTCC_CTRL_LYEARCORRDIS_SHIFT 17

#define	_RTCC_CTRL_MASK 0x00039F35UL

#define	_RTCC_CTRL_OSCFDETEN_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_OSCFDETEN_MASK 0x8000UL

#define	_RTCC_CTRL_OSCFDETEN_SHIFT 15

#define	_RTCC_CTRL_PRECCV0TOP_DEFAULT 0x00000000UL

#define	_RTCC_CTRL_PRECCV0TOP_MASK 0x10UL

#define	_RTCC_CTRL_PRECCV0TOP_SHIFT 4

#define	_RTCC_CTRL_RESETVALUE 0x00000000UL

#define	_RTCC_DATE_DAYOMT_DEFAULT 0x00000000UL

#define	_RTCC_DATE_DAYOMT_MASK 0x30UL

#define	_RTCC_DATE_DAYOMT_SHIFT 4

#define	_RTCC_DATE_DAYOMU_DEFAULT 0x00000000UL

#define	_RTCC_DATE_DAYOMU_MASK 0xFUL

#define	_RTCC_DATE_DAYOMU_SHIFT 0

#define	_RTCC_DATE_DAYOW_DEFAULT 0x00000000UL

#define	_RTCC_DATE_DAYOW_MASK 0x7000000UL

#define	_RTCC_DATE_DAYOW_SHIFT 24

#define	_RTCC_DATE_MASK 0x07FF1F3FUL

#define	_RTCC_DATE_MONTHT_DEFAULT 0x00000000UL

#define	_RTCC_DATE_MONTHT_MASK 0x1000UL

#define	_RTCC_DATE_MONTHT_SHIFT 12

#define	_RTCC_DATE_MONTHU_DEFAULT 0x00000000UL

#define	_RTCC_DATE_MONTHU_MASK 0xF00UL

#define	_RTCC_DATE_MONTHU_SHIFT 8

#define	_RTCC_DATE_RESETVALUE 0x00000000UL

#define	_RTCC_DATE_YEART_DEFAULT 0x00000000UL

#define	_RTCC_DATE_YEART_MASK 0xF00000UL

#define	_RTCC_DATE_YEART_SHIFT 20

#define	_RTCC_DATE_YEARU_DEFAULT 0x00000000UL

#define	_RTCC_DATE_YEARU_MASK 0xF0000UL

#define	_RTCC_DATE_YEARU_SHIFT 16

#define	_RTCC_EM4WUEN_EM4WU_DEFAULT 0x00000000UL

#define	_RTCC_EM4WUEN_EM4WU_MASK 0x1UL

#define	_RTCC_EM4WUEN_EM4WU_SHIFT 0

#define	_RTCC_EM4WUEN_MASK 0x00000001UL

#define	_RTCC_EM4WUEN_RESETVALUE 0x00000000UL

#define	_RTCC_IEN_CC0_DEFAULT 0x00000000UL

#define	_RTCC_IEN_CC0_MASK 0x2UL

#define	_RTCC_IEN_CC0_SHIFT 1

#define	_RTCC_IEN_CC1_DEFAULT 0x00000000UL

#define	_RTCC_IEN_CC1_MASK 0x4UL

#define	_RTCC_IEN_CC1_SHIFT 2

#define	_RTCC_IEN_CC2_DEFAULT 0x00000000UL

#define	_RTCC_IEN_CC2_MASK 0x8UL

#define	_RTCC_IEN_CC2_SHIFT 3

#define	_RTCC_IEN_CNTTICK_DEFAULT 0x00000000UL

#define	_RTCC_IEN_CNTTICK_MASK 0x20UL

#define	_RTCC_IEN_CNTTICK_SHIFT 5

#define	_RTCC_IEN_DAYOWOF_DEFAULT 0x00000000UL

#define	_RTCC_IEN_DAYOWOF_MASK 0x200UL

#define	_RTCC_IEN_DAYOWOF_SHIFT 9

#define	_RTCC_IEN_DAYTICK_DEFAULT 0x00000000UL

#define	_RTCC_IEN_DAYTICK_MASK 0x100UL

#define	_RTCC_IEN_DAYTICK_SHIFT 8

#define	_RTCC_IEN_HOURTICK_DEFAULT 0x00000000UL

#define	_RTCC_IEN_HOURTICK_MASK 0x80UL

#define	_RTCC_IEN_HOURTICK_SHIFT 7

#define	_RTCC_IEN_MASK 0x000007FFUL

#define	_RTCC_IEN_MINTICK_DEFAULT 0x00000000UL

#define	_RTCC_IEN_MINTICK_MASK 0x40UL

#define	_RTCC_IEN_MINTICK_SHIFT 6

#define	_RTCC_IEN_MONTHTICK_DEFAULT 0x00000000UL

#define	_RTCC_IEN_MONTHTICK_MASK 0x400UL

#define	_RTCC_IEN_MONTHTICK_SHIFT 10

#define	_RTCC_IEN_OF_DEFAULT 0x00000000UL

#define	_RTCC_IEN_OF_MASK 0x1UL

#define	_RTCC_IEN_OF_SHIFT 0

#define	_RTCC_IEN_OSCFAIL_DEFAULT 0x00000000UL

#define	_RTCC_IEN_OSCFAIL_MASK 0x10UL

#define	_RTCC_IEN_OSCFAIL_SHIFT 4

#define	_RTCC_IEN_RESETVALUE 0x00000000UL

#define	_RTCC_IF_CC0_DEFAULT 0x00000000UL

#define	_RTCC_IF_CC0_MASK 0x2UL

#define	_RTCC_IF_CC0_SHIFT 1

#define	_RTCC_IF_CC1_DEFAULT 0x00000000UL

#define	_RTCC_IF_CC1_MASK 0x4UL

#define	_RTCC_IF_CC1_SHIFT 2

#define	_RTCC_IF_CC2_DEFAULT 0x00000000UL

#define	_RTCC_IF_CC2_MASK 0x8UL

#define	_RTCC_IF_CC2_SHIFT 3

#define	_RTCC_IF_CNTTICK_DEFAULT 0x00000000UL

#define	_RTCC_IF_CNTTICK_MASK 0x20UL

#define	_RTCC_IF_CNTTICK_SHIFT 5

#define	_RTCC_IF_DAYOWOF_DEFAULT 0x00000000UL

#define	_RTCC_IF_DAYOWOF_MASK 0x200UL

#define	_RTCC_IF_DAYOWOF_SHIFT 9

#define	_RTCC_IF_DAYTICK_DEFAULT 0x00000000UL

#define	_RTCC_IF_DAYTICK_MASK 0x100UL

#define	_RTCC_IF_DAYTICK_SHIFT 8

#define	_RTCC_IF_HOURTICK_DEFAULT 0x00000000UL

#define	_RTCC_IF_HOURTICK_MASK 0x80UL

#define	_RTCC_IF_HOURTICK_SHIFT 7

#define	_RTCC_IF_MASK 0x000007FFUL

#define	_RTCC_IF_MINTICK_DEFAULT 0x00000000UL

#define	_RTCC_IF_MINTICK_MASK 0x40UL

#define	_RTCC_IF_MINTICK_SHIFT 6

#define	_RTCC_IF_MONTHTICK_DEFAULT 0x00000000UL

#define	_RTCC_IF_MONTHTICK_MASK 0x400UL

#define	_RTCC_IF_MONTHTICK_SHIFT 10

#define	_RTCC_IF_OF_DEFAULT 0x00000000UL

#define	_RTCC_IF_OF_MASK 0x1UL

#define	_RTCC_IF_OF_SHIFT 0

#define	_RTCC_IF_OSCFAIL_DEFAULT 0x00000000UL

#define	_RTCC_IF_OSCFAIL_MASK 0x10UL

#define	_RTCC_IF_OSCFAIL_SHIFT 4

#define	_RTCC_IF_RESETVALUE 0x00000000UL

#define	_RTCC_IFC_CC0_DEFAULT 0x00000000UL

#define	_RTCC_IFC_CC0_MASK 0x2UL

#define	_RTCC_IFC_CC0_SHIFT 1

#define	_RTCC_IFC_CC1_DEFAULT 0x00000000UL

#define	_RTCC_IFC_CC1_MASK 0x4UL

#define	_RTCC_IFC_CC1_SHIFT 2

#define	_RTCC_IFC_CC2_DEFAULT 0x00000000UL

#define	_RTCC_IFC_CC2_MASK 0x8UL

#define	_RTCC_IFC_CC2_SHIFT 3

#define	_RTCC_IFC_CNTTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFC_CNTTICK_MASK 0x20UL

#define	_RTCC_IFC_CNTTICK_SHIFT 5

#define	_RTCC_IFC_DAYOWOF_DEFAULT 0x00000000UL

#define	_RTCC_IFC_DAYOWOF_MASK 0x200UL

#define	_RTCC_IFC_DAYOWOF_SHIFT 9

#define	_RTCC_IFC_DAYTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFC_DAYTICK_MASK 0x100UL

#define	_RTCC_IFC_DAYTICK_SHIFT 8

#define	_RTCC_IFC_HOURTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFC_HOURTICK_MASK 0x80UL

#define	_RTCC_IFC_HOURTICK_SHIFT 7

#define	_RTCC_IFC_MASK 0x000007FFUL

#define	_RTCC_IFC_MINTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFC_MINTICK_MASK 0x40UL

#define	_RTCC_IFC_MINTICK_SHIFT 6

#define	_RTCC_IFC_MONTHTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFC_MONTHTICK_MASK 0x400UL

#define	_RTCC_IFC_MONTHTICK_SHIFT 10

#define	_RTCC_IFC_OF_DEFAULT 0x00000000UL

#define	_RTCC_IFC_OF_MASK 0x1UL

#define	_RTCC_IFC_OF_SHIFT 0

#define	_RTCC_IFC_OSCFAIL_DEFAULT 0x00000000UL

#define	_RTCC_IFC_OSCFAIL_MASK 0x10UL

#define	_RTCC_IFC_OSCFAIL_SHIFT 4

#define	_RTCC_IFC_RESETVALUE 0x00000000UL

#define	_RTCC_IFS_CC0_DEFAULT 0x00000000UL

#define	_RTCC_IFS_CC0_MASK 0x2UL

#define	_RTCC_IFS_CC0_SHIFT 1

#define	_RTCC_IFS_CC1_DEFAULT 0x00000000UL

#define	_RTCC_IFS_CC1_MASK 0x4UL

#define	_RTCC_IFS_CC1_SHIFT 2

#define	_RTCC_IFS_CC2_DEFAULT 0x00000000UL

#define	_RTCC_IFS_CC2_MASK 0x8UL

#define	_RTCC_IFS_CC2_SHIFT 3

#define	_RTCC_IFS_CNTTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFS_CNTTICK_MASK 0x20UL

#define	_RTCC_IFS_CNTTICK_SHIFT 5

#define	_RTCC_IFS_DAYOWOF_DEFAULT 0x00000000UL

#define	_RTCC_IFS_DAYOWOF_MASK 0x200UL

#define	_RTCC_IFS_DAYOWOF_SHIFT 9

#define	_RTCC_IFS_DAYTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFS_DAYTICK_MASK 0x100UL

#define	_RTCC_IFS_DAYTICK_SHIFT 8

#define	_RTCC_IFS_HOURTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFS_HOURTICK_MASK 0x80UL

#define	_RTCC_IFS_HOURTICK_SHIFT 7

#define	_RTCC_IFS_MASK 0x000007FFUL

#define	_RTCC_IFS_MINTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFS_MINTICK_MASK 0x40UL

#define	_RTCC_IFS_MINTICK_SHIFT 6

#define	_RTCC_IFS_MONTHTICK_DEFAULT 0x00000000UL

#define	_RTCC_IFS_MONTHTICK_MASK 0x400UL

#define	_RTCC_IFS_MONTHTICK_SHIFT 10

#define	_RTCC_IFS_OF_DEFAULT 0x00000000UL

#define	_RTCC_IFS_OF_MASK 0x1UL

#define	_RTCC_IFS_OF_SHIFT 0

#define	_RTCC_IFS_OSCFAIL_DEFAULT 0x00000000UL

#define	_RTCC_IFS_OSCFAIL_MASK 0x10UL

#define	_RTCC_IFS_OSCFAIL_SHIFT 4

#define	_RTCC_IFS_RESETVALUE 0x00000000UL

#define	_RTCC_LOCK_LOCKKEY_DEFAULT 0x00000000UL

#define	_RTCC_LOCK_LOCKKEY_LOCK 0x00000000UL

#define	_RTCC_LOCK_LOCKKEY_LOCKED 0x00000001UL

#define	_RTCC_LOCK_LOCKKEY_MASK 0xFFFFUL

#define	_RTCC_LOCK_LOCKKEY_SHIFT 0

#define	_RTCC_LOCK_LOCKKEY_UNLOCK 0x0000AEE8UL

#define	_RTCC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL

#define	_RTCC_LOCK_MASK 0x0000FFFFUL

#define	_RTCC_LOCK_RESETVALUE 0x00000000UL

#define	_RTCC_POWERDOWN_MASK 0x00000001UL

#define	_RTCC_POWERDOWN_RAM_DEFAULT 0x00000000UL

#define	_RTCC_POWERDOWN_RAM_MASK 0x1UL

#define	_RTCC_POWERDOWN_RAM_SHIFT 0

#define	_RTCC_POWERDOWN_RESETVALUE 0x00000000UL

#define	_RTCC_PRECNT_MASK 0x00007FFFUL

#define	_RTCC_PRECNT_PRECNT_DEFAULT 0x00000000UL

#define	_RTCC_PRECNT_PRECNT_MASK 0x7FFFUL

#define	_RTCC_PRECNT_PRECNT_SHIFT 0

#define	_RTCC_PRECNT_RESETVALUE 0x00000000UL

#define	_RTCC_RET_REG_MASK 0xFFFFFFFFUL

#define	_RTCC_RET_REG_REG_DEFAULT 0x00000000UL

#define	_RTCC_RET_REG_REG_MASK 0xFFFFFFFFUL

#define	_RTCC_RET_REG_REG_SHIFT 0

#define	_RTCC_RET_REG_RESETVALUE 0x00000000UL

#define	_RTCC_STATUS_MASK 0x00000000UL

#define	_RTCC_STATUS_RESETVALUE 0x00000000UL

#define	_RTCC_SYNCBUSY_CMD_DEFAULT 0x00000000UL

#define	_RTCC_SYNCBUSY_CMD_MASK 0x20UL

#define	_RTCC_SYNCBUSY_CMD_SHIFT 5

#define	_RTCC_SYNCBUSY_MASK 0x00000020UL

#define	_RTCC_SYNCBUSY_RESETVALUE 0x00000000UL

#define	_RTCC_TIME_HOURT_DEFAULT 0x00000000UL

#define	_RTCC_TIME_HOURT_MASK 0x300000UL

#define	_RTCC_TIME_HOURT_SHIFT 20

#define	_RTCC_TIME_HOURU_DEFAULT 0x00000000UL

#define	_RTCC_TIME_HOURU_MASK 0xF0000UL

#define	_RTCC_TIME_HOURU_SHIFT 16

#define	_RTCC_TIME_MASK 0x003F7F7FUL

#define	_RTCC_TIME_MINT_DEFAULT 0x00000000UL

#define	_RTCC_TIME_MINT_MASK 0x7000UL

#define	_RTCC_TIME_MINT_SHIFT 12

#define	_RTCC_TIME_MINU_DEFAULT 0x00000000UL

#define	_RTCC_TIME_MINU_MASK 0xF00UL

#define	_RTCC_TIME_MINU_SHIFT 8

#define	_RTCC_TIME_RESETVALUE 0x00000000UL

#define	_RTCC_TIME_SECT_DEFAULT 0x00000000UL

#define	_RTCC_TIME_SECT_MASK 0x70UL

#define	_RTCC_TIME_SECT_SHIFT 4

#define	_RTCC_TIME_SECU_DEFAULT 0x00000000UL

#define	_RTCC_TIME_SECU_MASK 0xFUL

#define	_RTCC_TIME_SECU_SHIFT 0

#define	RTCC_CC_CCV_CCV_DEFAULT ( _RTCC_CC_CCV_CCV_DEFAULT << 0)

#define	RTCC_CC_CTRL_CMOA_CLEAR ( _RTCC_CC_CTRL_CMOA_CLEAR << 2)

#define	RTCC_CC_CTRL_CMOA_DEFAULT ( _RTCC_CC_CTRL_CMOA_DEFAULT << 2)

#define	RTCC_CC_CTRL_CMOA_PULSE ( _RTCC_CC_CTRL_CMOA_PULSE << 2)

#define	RTCC_CC_CTRL_CMOA_SET ( _RTCC_CC_CTRL_CMOA_SET << 2)

#define	RTCC_CC_CTRL_CMOA_TOGGLE ( _RTCC_CC_CTRL_CMOA_TOGGLE << 2)

#define	RTCC_CC_CTRL_COMPBASE (0x1UL << 11)

#define	RTCC_CC_CTRL_COMPBASE_CNT ( _RTCC_CC_CTRL_COMPBASE_CNT << 11)

#define	RTCC_CC_CTRL_COMPBASE_DEFAULT ( _RTCC_CC_CTRL_COMPBASE_DEFAULT << 11)

#define	RTCC_CC_CTRL_COMPBASE_PRECNT ( _RTCC_CC_CTRL_COMPBASE_PRECNT << 11)

#define	RTCC_CC_CTRL_COMPMASK_DEFAULT ( _RTCC_CC_CTRL_COMPMASK_DEFAULT << 12)

#define	RTCC_CC_CTRL_DAYCC (0x1UL << 17)

#define	RTCC_CC_CTRL_DAYCC_DEFAULT ( _RTCC_CC_CTRL_DAYCC_DEFAULT << 17)

#define	RTCC_CC_CTRL_DAYCC_MONTH ( _RTCC_CC_CTRL_DAYCC_MONTH << 17)

#define	RTCC_CC_CTRL_DAYCC_WEEK ( _RTCC_CC_CTRL_DAYCC_WEEK << 17)

#define	RTCC_CC_CTRL_ICEDGE_BOTH ( _RTCC_CC_CTRL_ICEDGE_BOTH << 4)

#define	RTCC_CC_CTRL_ICEDGE_DEFAULT ( _RTCC_CC_CTRL_ICEDGE_DEFAULT << 4)

#define	RTCC_CC_CTRL_ICEDGE_FALLING ( _RTCC_CC_CTRL_ICEDGE_FALLING << 4)

#define	RTCC_CC_CTRL_ICEDGE_NONE ( _RTCC_CC_CTRL_ICEDGE_NONE << 4)

#define	RTCC_CC_CTRL_ICEDGE_RISING ( _RTCC_CC_CTRL_ICEDGE_RISING << 4)

#define	RTCC_CC_CTRL_MODE_DEFAULT ( _RTCC_CC_CTRL_MODE_DEFAULT << 0)

#define	RTCC_CC_CTRL_MODE_INPUTCAPTURE ( _RTCC_CC_CTRL_MODE_INPUTCAPTURE << 0)

#define	RTCC_CC_CTRL_MODE_OFF ( _RTCC_CC_CTRL_MODE_OFF << 0)

#define	RTCC_CC_CTRL_MODE_OUTPUTCOMPARE ( _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE << 0)

#define	RTCC_CC_CTRL_PRSSEL_DEFAULT ( _RTCC_CC_CTRL_PRSSEL_DEFAULT << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH0 ( _RTCC_CC_CTRL_PRSSEL_PRSCH0 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH1 ( _RTCC_CC_CTRL_PRSSEL_PRSCH1 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH10 ( _RTCC_CC_CTRL_PRSSEL_PRSCH10 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH11 ( _RTCC_CC_CTRL_PRSSEL_PRSCH11 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH2 ( _RTCC_CC_CTRL_PRSSEL_PRSCH2 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH3 ( _RTCC_CC_CTRL_PRSSEL_PRSCH3 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH4 ( _RTCC_CC_CTRL_PRSSEL_PRSCH4 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH5 ( _RTCC_CC_CTRL_PRSSEL_PRSCH5 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH6 ( _RTCC_CC_CTRL_PRSSEL_PRSCH6 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH7 ( _RTCC_CC_CTRL_PRSSEL_PRSCH7 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH8 ( _RTCC_CC_CTRL_PRSSEL_PRSCH8 << 6)

#define	RTCC_CC_CTRL_PRSSEL_PRSCH9 ( _RTCC_CC_CTRL_PRSSEL_PRSCH9 << 6)

#define	RTCC_CC_DATE_DAYT_DEFAULT ( _RTCC_CC_DATE_DAYT_DEFAULT << 4)

#define	RTCC_CC_DATE_DAYU_DEFAULT ( _RTCC_CC_DATE_DAYU_DEFAULT << 0)

#define	RTCC_CC_DATE_MONTHT (0x1UL << 12)

#define	RTCC_CC_DATE_MONTHT_DEFAULT ( _RTCC_CC_DATE_MONTHT_DEFAULT << 12)

#define	RTCC_CC_DATE_MONTHU_DEFAULT ( _RTCC_CC_DATE_MONTHU_DEFAULT << 8)

#define	RTCC_CC_TIME_HOURT_DEFAULT ( _RTCC_CC_TIME_HOURT_DEFAULT << 20)

#define	RTCC_CC_TIME_HOURU_DEFAULT ( _RTCC_CC_TIME_HOURU_DEFAULT << 16)

#define	RTCC_CC_TIME_MINT_DEFAULT ( _RTCC_CC_TIME_MINT_DEFAULT << 12)

#define	RTCC_CC_TIME_MINU_DEFAULT ( _RTCC_CC_TIME_MINU_DEFAULT << 8)

#define	RTCC_CC_TIME_SECT_DEFAULT ( _RTCC_CC_TIME_SECT_DEFAULT << 4)

#define	RTCC_CC_TIME_SECU_DEFAULT ( _RTCC_CC_TIME_SECU_DEFAULT << 0)

#define	RTCC_CMD_CLRSTATUS (0x1UL << 0)

#define	RTCC_CMD_CLRSTATUS_DEFAULT ( _RTCC_CMD_CLRSTATUS_DEFAULT << 0)

#define	RTCC_CNT_CNT_DEFAULT ( _RTCC_CNT_CNT_DEFAULT << 0)

#define	RTCC_COMBCNT_CNTLSB_DEFAULT ( _RTCC_COMBCNT_CNTLSB_DEFAULT << 15)

#define	RTCC_COMBCNT_PRECNT_DEFAULT ( _RTCC_COMBCNT_PRECNT_DEFAULT << 0)

#define	RTCC_CTRL_CCV1TOP (0x1UL << 5)

#define	RTCC_CTRL_CCV1TOP_DEFAULT ( _RTCC_CTRL_CCV1TOP_DEFAULT << 5)

#define	RTCC_CTRL_CNTMODE (0x1UL << 16)

#define	RTCC_CTRL_CNTMODE_CALENDAR ( _RTCC_CTRL_CNTMODE_CALENDAR << 16)

#define	RTCC_CTRL_CNTMODE_DEFAULT ( _RTCC_CTRL_CNTMODE_DEFAULT << 16)

#define	RTCC_CTRL_CNTMODE_NORMAL ( _RTCC_CTRL_CNTMODE_NORMAL << 16)

#define	RTCC_CTRL_CNTPRESC_DEFAULT ( _RTCC_CTRL_CNTPRESC_DEFAULT << 8)

#define	RTCC_CTRL_CNTPRESC_DIV1 ( _RTCC_CTRL_CNTPRESC_DIV1 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV1024 ( _RTCC_CTRL_CNTPRESC_DIV1024 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV128 ( _RTCC_CTRL_CNTPRESC_DIV128 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV16 ( _RTCC_CTRL_CNTPRESC_DIV16 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV16384 ( _RTCC_CTRL_CNTPRESC_DIV16384 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV2 ( _RTCC_CTRL_CNTPRESC_DIV2 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV2048 ( _RTCC_CTRL_CNTPRESC_DIV2048 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV256 ( _RTCC_CTRL_CNTPRESC_DIV256 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV32 ( _RTCC_CTRL_CNTPRESC_DIV32 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV32768 ( _RTCC_CTRL_CNTPRESC_DIV32768 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV4 ( _RTCC_CTRL_CNTPRESC_DIV4 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV4096 ( _RTCC_CTRL_CNTPRESC_DIV4096 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV512 ( _RTCC_CTRL_CNTPRESC_DIV512 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV64 ( _RTCC_CTRL_CNTPRESC_DIV64 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV8 ( _RTCC_CTRL_CNTPRESC_DIV8 << 8)

#define	RTCC_CTRL_CNTPRESC_DIV8192 ( _RTCC_CTRL_CNTPRESC_DIV8192 << 8)

#define	RTCC_CTRL_CNTTICK (0x1UL << 12)

#define	RTCC_CTRL_CNTTICK_CCV0MATCH ( _RTCC_CTRL_CNTTICK_CCV0MATCH << 12)

#define	RTCC_CTRL_CNTTICK_DEFAULT ( _RTCC_CTRL_CNTTICK_DEFAULT << 12)

#define	RTCC_CTRL_CNTTICK_PRESC ( _RTCC_CTRL_CNTTICK_PRESC << 12)

#define	RTCC_CTRL_DEBUGRUN (0x1UL << 2)

#define	RTCC_CTRL_DEBUGRUN_DEFAULT ( _RTCC_CTRL_DEBUGRUN_DEFAULT << 2)

#define	RTCC_CTRL_ENABLE (0x1UL << 0)

#define	RTCC_CTRL_ENABLE_DEFAULT ( _RTCC_CTRL_ENABLE_DEFAULT << 0)

#define	RTCC_CTRL_LYEARCORRDIS (0x1UL << 17)

#define	RTCC_CTRL_LYEARCORRDIS_DEFAULT ( _RTCC_CTRL_LYEARCORRDIS_DEFAULT << 17)

#define	RTCC_CTRL_OSCFDETEN (0x1UL << 15)

#define	RTCC_CTRL_OSCFDETEN_DEFAULT ( _RTCC_CTRL_OSCFDETEN_DEFAULT << 15)

#define	RTCC_CTRL_PRECCV0TOP (0x1UL << 4)

#define	RTCC_CTRL_PRECCV0TOP_DEFAULT ( _RTCC_CTRL_PRECCV0TOP_DEFAULT << 4)

#define	RTCC_DATE_DAYOMT_DEFAULT ( _RTCC_DATE_DAYOMT_DEFAULT << 4)

#define	RTCC_DATE_DAYOMU_DEFAULT ( _RTCC_DATE_DAYOMU_DEFAULT << 0)

#define	RTCC_DATE_DAYOW_DEFAULT ( _RTCC_DATE_DAYOW_DEFAULT << 24)

#define	RTCC_DATE_MONTHT (0x1UL << 12)

#define	RTCC_DATE_MONTHT_DEFAULT ( _RTCC_DATE_MONTHT_DEFAULT << 12)

#define	RTCC_DATE_MONTHU_DEFAULT ( _RTCC_DATE_MONTHU_DEFAULT << 8)

#define	RTCC_DATE_YEART_DEFAULT ( _RTCC_DATE_YEART_DEFAULT << 20)

#define	RTCC_DATE_YEARU_DEFAULT ( _RTCC_DATE_YEARU_DEFAULT << 16)

#define	RTCC_EM4WUEN_EM4WU (0x1UL << 0)

#define	RTCC_EM4WUEN_EM4WU_DEFAULT ( _RTCC_EM4WUEN_EM4WU_DEFAULT << 0)

#define	RTCC_IEN_CC0 (0x1UL << 1)

#define	RTCC_IEN_CC0_DEFAULT ( _RTCC_IEN_CC0_DEFAULT << 1)

#define	RTCC_IEN_CC1 (0x1UL << 2)

#define	RTCC_IEN_CC1_DEFAULT ( _RTCC_IEN_CC1_DEFAULT << 2)

#define	RTCC_IEN_CC2 (0x1UL << 3)

#define	RTCC_IEN_CC2_DEFAULT ( _RTCC_IEN_CC2_DEFAULT << 3)

#define	RTCC_IEN_CNTTICK (0x1UL << 5)

#define	RTCC_IEN_CNTTICK_DEFAULT ( _RTCC_IEN_CNTTICK_DEFAULT << 5)

#define	RTCC_IEN_DAYOWOF (0x1UL << 9)

#define	RTCC_IEN_DAYOWOF_DEFAULT ( _RTCC_IEN_DAYOWOF_DEFAULT << 9)

#define	RTCC_IEN_DAYTICK (0x1UL << 8)

#define	RTCC_IEN_DAYTICK_DEFAULT ( _RTCC_IEN_DAYTICK_DEFAULT << 8)

#define	RTCC_IEN_HOURTICK (0x1UL << 7)

#define	RTCC_IEN_HOURTICK_DEFAULT ( _RTCC_IEN_HOURTICK_DEFAULT << 7)

#define	RTCC_IEN_MINTICK (0x1UL << 6)

#define	RTCC_IEN_MINTICK_DEFAULT ( _RTCC_IEN_MINTICK_DEFAULT << 6)

#define	RTCC_IEN_MONTHTICK (0x1UL << 10)

#define	RTCC_IEN_MONTHTICK_DEFAULT ( _RTCC_IEN_MONTHTICK_DEFAULT << 10)

#define	RTCC_IEN_OF (0x1UL << 0)

#define	RTCC_IEN_OF_DEFAULT ( _RTCC_IEN_OF_DEFAULT << 0)

#define	RTCC_IEN_OSCFAIL (0x1UL << 4)

#define	RTCC_IEN_OSCFAIL_DEFAULT ( _RTCC_IEN_OSCFAIL_DEFAULT << 4)

#define	RTCC_IF_CC0 (0x1UL << 1)

#define	RTCC_IF_CC0_DEFAULT ( _RTCC_IF_CC0_DEFAULT << 1)

#define	RTCC_IF_CC1 (0x1UL << 2)

#define	RTCC_IF_CC1_DEFAULT ( _RTCC_IF_CC1_DEFAULT << 2)

#define	RTCC_IF_CC2 (0x1UL << 3)

#define	RTCC_IF_CC2_DEFAULT ( _RTCC_IF_CC2_DEFAULT << 3)

#define	RTCC_IF_CNTTICK (0x1UL << 5)

#define	RTCC_IF_CNTTICK_DEFAULT ( _RTCC_IF_CNTTICK_DEFAULT << 5)

#define	RTCC_IF_DAYOWOF (0x1UL << 9)

#define	RTCC_IF_DAYOWOF_DEFAULT ( _RTCC_IF_DAYOWOF_DEFAULT << 9)

#define	RTCC_IF_DAYTICK (0x1UL << 8)

#define	RTCC_IF_DAYTICK_DEFAULT ( _RTCC_IF_DAYTICK_DEFAULT << 8)

#define	RTCC_IF_HOURTICK (0x1UL << 7)

#define	RTCC_IF_HOURTICK_DEFAULT ( _RTCC_IF_HOURTICK_DEFAULT << 7)

#define	RTCC_IF_MINTICK (0x1UL << 6)

#define	RTCC_IF_MINTICK_DEFAULT ( _RTCC_IF_MINTICK_DEFAULT << 6)

#define	RTCC_IF_MONTHTICK (0x1UL << 10)

#define	RTCC_IF_MONTHTICK_DEFAULT ( _RTCC_IF_MONTHTICK_DEFAULT << 10)

#define	RTCC_IF_OF (0x1UL << 0)

#define	RTCC_IF_OF_DEFAULT ( _RTCC_IF_OF_DEFAULT << 0)

#define	RTCC_IF_OSCFAIL (0x1UL << 4)

#define	RTCC_IF_OSCFAIL_DEFAULT ( _RTCC_IF_OSCFAIL_DEFAULT << 4)

#define	RTCC_IFC_CC0 (0x1UL << 1)

#define	RTCC_IFC_CC0_DEFAULT ( _RTCC_IFC_CC0_DEFAULT << 1)

#define	RTCC_IFC_CC1 (0x1UL << 2)

#define	RTCC_IFC_CC1_DEFAULT ( _RTCC_IFC_CC1_DEFAULT << 2)

#define	RTCC_IFC_CC2 (0x1UL << 3)

#define	RTCC_IFC_CC2_DEFAULT ( _RTCC_IFC_CC2_DEFAULT << 3)

#define	RTCC_IFC_CNTTICK (0x1UL << 5)

#define	RTCC_IFC_CNTTICK_DEFAULT ( _RTCC_IFC_CNTTICK_DEFAULT << 5)

#define	RTCC_IFC_DAYOWOF (0x1UL << 9)

#define	RTCC_IFC_DAYOWOF_DEFAULT ( _RTCC_IFC_DAYOWOF_DEFAULT << 9)

#define	RTCC_IFC_DAYTICK (0x1UL << 8)

#define	RTCC_IFC_DAYTICK_DEFAULT ( _RTCC_IFC_DAYTICK_DEFAULT << 8)

#define	RTCC_IFC_HOURTICK (0x1UL << 7)

#define	RTCC_IFC_HOURTICK_DEFAULT ( _RTCC_IFC_HOURTICK_DEFAULT << 7)

#define	RTCC_IFC_MINTICK (0x1UL << 6)

#define	RTCC_IFC_MINTICK_DEFAULT ( _RTCC_IFC_MINTICK_DEFAULT << 6)

#define	RTCC_IFC_MONTHTICK (0x1UL << 10)

#define	RTCC_IFC_MONTHTICK_DEFAULT ( _RTCC_IFC_MONTHTICK_DEFAULT << 10)

#define	RTCC_IFC_OF (0x1UL << 0)

#define	RTCC_IFC_OF_DEFAULT ( _RTCC_IFC_OF_DEFAULT << 0)

#define	RTCC_IFC_OSCFAIL (0x1UL << 4)

#define	RTCC_IFC_OSCFAIL_DEFAULT ( _RTCC_IFC_OSCFAIL_DEFAULT << 4)

#define	RTCC_IFS_CC0 (0x1UL << 1)

#define	RTCC_IFS_CC0_DEFAULT ( _RTCC_IFS_CC0_DEFAULT << 1)

#define	RTCC_IFS_CC1 (0x1UL << 2)

#define	RTCC_IFS_CC1_DEFAULT ( _RTCC_IFS_CC1_DEFAULT << 2)

#define	RTCC_IFS_CC2 (0x1UL << 3)

#define	RTCC_IFS_CC2_DEFAULT ( _RTCC_IFS_CC2_DEFAULT << 3)

#define	RTCC_IFS_CNTTICK (0x1UL << 5)

#define	RTCC_IFS_CNTTICK_DEFAULT ( _RTCC_IFS_CNTTICK_DEFAULT << 5)

#define	RTCC_IFS_DAYOWOF (0x1UL << 9)

#define	RTCC_IFS_DAYOWOF_DEFAULT ( _RTCC_IFS_DAYOWOF_DEFAULT << 9)

#define	RTCC_IFS_DAYTICK (0x1UL << 8)

#define	RTCC_IFS_DAYTICK_DEFAULT ( _RTCC_IFS_DAYTICK_DEFAULT << 8)

#define	RTCC_IFS_HOURTICK (0x1UL << 7)

#define	RTCC_IFS_HOURTICK_DEFAULT ( _RTCC_IFS_HOURTICK_DEFAULT << 7)

#define	RTCC_IFS_MINTICK (0x1UL << 6)

#define	RTCC_IFS_MINTICK_DEFAULT ( _RTCC_IFS_MINTICK_DEFAULT << 6)

#define	RTCC_IFS_MONTHTICK (0x1UL << 10)

#define	RTCC_IFS_MONTHTICK_DEFAULT ( _RTCC_IFS_MONTHTICK_DEFAULT << 10)

#define	RTCC_IFS_OF (0x1UL << 0)

#define	RTCC_IFS_OF_DEFAULT ( _RTCC_IFS_OF_DEFAULT << 0)

#define	RTCC_IFS_OSCFAIL (0x1UL << 4)

#define	RTCC_IFS_OSCFAIL_DEFAULT ( _RTCC_IFS_OSCFAIL_DEFAULT << 4)

#define	RTCC_LOCK_LOCKKEY_DEFAULT ( _RTCC_LOCK_LOCKKEY_DEFAULT << 0)

#define	RTCC_LOCK_LOCKKEY_LOCK ( _RTCC_LOCK_LOCKKEY_LOCK << 0)

#define	RTCC_LOCK_LOCKKEY_LOCKED ( _RTCC_LOCK_LOCKKEY_LOCKED << 0)

#define	RTCC_LOCK_LOCKKEY_UNLOCK ( _RTCC_LOCK_LOCKKEY_UNLOCK << 0)

#define	RTCC_LOCK_LOCKKEY_UNLOCKED ( _RTCC_LOCK_LOCKKEY_UNLOCKED << 0)

#define	RTCC_POWERDOWN_RAM (0x1UL << 0)

#define	RTCC_POWERDOWN_RAM_DEFAULT ( _RTCC_POWERDOWN_RAM_DEFAULT << 0)

#define	RTCC_PRECNT_PRECNT_DEFAULT ( _RTCC_PRECNT_PRECNT_DEFAULT << 0)

#define	RTCC_RET_REG_REG_DEFAULT ( _RTCC_RET_REG_REG_DEFAULT << 0)

#define	RTCC_SYNCBUSY_CMD (0x1UL << 5)

#define	RTCC_SYNCBUSY_CMD_DEFAULT ( _RTCC_SYNCBUSY_CMD_DEFAULT << 5)

#define	RTCC_TIME_HOURT_DEFAULT ( _RTCC_TIME_HOURT_DEFAULT << 20)

#define	RTCC_TIME_HOURU_DEFAULT ( _RTCC_TIME_HOURU_DEFAULT << 16)

#define	RTCC_TIME_MINT_DEFAULT ( _RTCC_TIME_MINT_DEFAULT << 12)

#define	RTCC_TIME_MINU_DEFAULT ( _RTCC_TIME_MINU_DEFAULT << 8)

#define	RTCC_TIME_SECT_DEFAULT ( _RTCC_TIME_SECT_DEFAULT << 4)

#define	RTCC_TIME_SECU_DEFAULT ( _RTCC_TIME_SECU_DEFAULT << 0)

Macro Definition Documentation

#define _RTCC_CC_CCV_CCV_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CCV

Definition at line 642 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CCV_CCV_MASK 0xFFFFFFFFUL

Bit mask for CC_CCV

Definition at line 641 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CCV_CCV_SHIFT 0

Shift value for CC_CCV

Definition at line 640 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CCV_MASK 0xFFFFFFFFUL

Mask for RTCC_CC_CCV

Definition at line 639 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CCV_RESETVALUE 0x00000000UL

Default value for RTCC_CC_CCV

Definition at line 638 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_CC_CTRL_CMOA_CLEAR 0x00000002UL

Mode CLEAR for RTCC_CC_CTRL

Definition at line 567 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_CMOA_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 564 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_CMOA_MASK 0xCUL

Bit mask for CC_CMOA

Definition at line 563 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_CMOA_PULSE 0x00000000UL

Mode PULSE for RTCC_CC_CTRL

Definition at line 565 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_CMOA_SET 0x00000003UL

Mode SET for RTCC_CC_CTRL

Definition at line 568 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_CMOA_SHIFT 2

Shift value for CC_CMOA

Definition at line 562 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_CMOA_TOGGLE 0x00000001UL

Mode TOGGLE for RTCC_CC_CTRL

Definition at line 566 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_COMPBASE_CNT 0x00000000UL

Mode CNT for RTCC_CC_CTRL

Definition at line 618 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_COMPBASE_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 617 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_COMPBASE_MASK 0x800UL

Bit mask for CC_COMPBASE

Definition at line 616 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_COMPBASE_PRECNT 0x00000001UL

Mode PRECNT for RTCC_CC_CTRL

Definition at line 619 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_COMPBASE_SHIFT 11

Shift value for CC_COMPBASE

Definition at line 615 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_COMPMASK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 625 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_COMPMASK_MASK 0x1F000UL

Bit mask for CC_COMPMASK

Definition at line 624 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_COMPMASK_SHIFT 12

Shift value for CC_COMPMASK

Definition at line 623 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_DAYCC_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 630 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_DAYCC_MASK 0x20000UL

Bit mask for CC_DAYCC

Definition at line 629 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_DAYCC_MONTH 0x00000000UL

Mode MONTH for RTCC_CC_CTRL

Definition at line 631 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_DAYCC_SHIFT 17

Shift value for CC_DAYCC

Definition at line 628 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_DAYCC_WEEK 0x00000001UL

Mode WEEK for RTCC_CC_CTRL

Definition at line 632 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_BOTH 0x00000002UL

Mode BOTH for RTCC_CC_CTRL

Definition at line 579 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 576 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_FALLING 0x00000001UL

Mode FALLING for RTCC_CC_CTRL

Definition at line 578 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_MASK 0x30UL

Bit mask for CC_ICEDGE

Definition at line 575 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_NONE 0x00000003UL

Mode NONE for RTCC_CC_CTRL

Definition at line 580 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_RISING 0x00000000UL

Mode RISING for RTCC_CC_CTRL

Definition at line 577 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_ICEDGE_SHIFT 4

Shift value for CC_ICEDGE

Definition at line 574 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_MASK 0x0003FBFFUL

Mask for RTCC_CC_CTRL

Definition at line 551 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_MODE_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 554 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL

Mode INPUTCAPTURE for RTCC_CC_CTRL

Definition at line 556 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_MODE_MASK 0x3UL

Bit mask for CC_MODE

Definition at line 553 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_MODE_OFF 0x00000000UL

Mode OFF for RTCC_CC_CTRL

Definition at line 555 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL

Mode OUTPUTCOMPARE for RTCC_CC_CTRL

Definition at line 557 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_MODE_SHIFT 0

Shift value for CC_MODE

Definition at line 552 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_CTRL

Definition at line 588 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_MASK 0x3C0UL

Bit mask for CC_PRSSEL

Definition at line 587 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for RTCC_CC_CTRL

Definition at line 589 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for RTCC_CC_CTRL

Definition at line 590 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for RTCC_CC_CTRL

Definition at line 599 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for RTCC_CC_CTRL

Definition at line 600 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for RTCC_CC_CTRL

Definition at line 591 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for RTCC_CC_CTRL

Definition at line 592 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for RTCC_CC_CTRL

Definition at line 593 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for RTCC_CC_CTRL

Definition at line 594 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for RTCC_CC_CTRL

Definition at line 595 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for RTCC_CC_CTRL

Definition at line 596 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for RTCC_CC_CTRL

Definition at line 597 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for RTCC_CC_CTRL

Definition at line 598 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_CTRL_PRSSEL_SHIFT 6

Shift value for CC_PRSSEL

Definition at line 586 of file efr32mg1p_rtcc.h .

Referenced by RTCC_ChannelInit() .

#define _RTCC_CC_CTRL_RESETVALUE 0x00000000UL

Default value for RTCC_CC_CTRL

Definition at line 550 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_CC_DATE_DAYT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_DATE

Definition at line 682 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_DAYT_MASK 0x30UL

Bit mask for CC_DAYT

Definition at line 681 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_DAYT_SHIFT 4

Shift value for CC_DAYT

Definition at line 680 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_DAYU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_DATE

Definition at line 678 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_DAYU_MASK 0xFUL

Bit mask for CC_DAYU

Definition at line 677 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_DAYU_SHIFT 0

Shift value for CC_DAYU

Definition at line 676 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MASK 0x00001F3FUL

Mask for RTCC_CC_DATE

Definition at line 675 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MONTHT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_DATE

Definition at line 691 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MONTHT_MASK 0x1000UL

Bit mask for CC_MONTHT

Definition at line 690 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MONTHT_SHIFT 12

Shift value for CC_MONTHT

Definition at line 689 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MONTHU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_DATE

Definition at line 686 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MONTHU_MASK 0xF00UL

Bit mask for CC_MONTHU

Definition at line 685 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_MONTHU_SHIFT 8

Shift value for CC_MONTHU

Definition at line 684 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_DATE_RESETVALUE 0x00000000UL

Default value for RTCC_CC_DATE

Definition at line 674 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_CC_TIME_HOURT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_TIME

Definition at line 670 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_HOURT_MASK 0x300000UL

Bit mask for CC_HOURT

Definition at line 669 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_HOURT_SHIFT 20

Shift value for CC_HOURT

Definition at line 668 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_HOURU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_TIME

Definition at line 666 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_HOURU_MASK 0xF0000UL

Bit mask for CC_HOURU

Definition at line 665 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_HOURU_SHIFT 16

Shift value for CC_HOURU

Definition at line 664 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MASK 0x003F7F7FUL

Mask for RTCC_CC_TIME

Definition at line 647 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MINT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_TIME

Definition at line 662 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MINT_MASK 0x7000UL

Bit mask for CC_MINT

Definition at line 661 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MINT_SHIFT 12

Shift value for CC_MINT

Definition at line 660 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MINU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_TIME

Definition at line 658 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MINU_MASK 0xF00UL

Bit mask for CC_MINU

Definition at line 657 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_MINU_SHIFT 8

Shift value for CC_MINU

Definition at line 656 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_RESETVALUE 0x00000000UL

Default value for RTCC_CC_TIME

Definition at line 646 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_CC_TIME_SECT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_TIME

Definition at line 654 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_SECT_MASK 0x70UL

Bit mask for CC_SECT

Definition at line 653 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_SECT_SHIFT 4

Shift value for CC_SECT

Definition at line 652 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_SECU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CC_TIME

Definition at line 650 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_SECU_MASK 0xFUL

Bit mask for CC_SECU

Definition at line 649 of file efr32mg1p_rtcc.h .

#define _RTCC_CC_TIME_SECU_SHIFT 0

Shift value for CC_SECU

Definition at line 648 of file efr32mg1p_rtcc.h .

#define _RTCC_CMD_CLRSTATUS_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CMD

Definition at line 503 of file efr32mg1p_rtcc.h .

#define _RTCC_CMD_CLRSTATUS_MASK 0x1UL

Bit mask for RTCC_CLRSTATUS

Definition at line 502 of file efr32mg1p_rtcc.h .

#define _RTCC_CMD_CLRSTATUS_SHIFT 0

Shift value for RTCC_CLRSTATUS

Definition at line 501 of file efr32mg1p_rtcc.h .

#define _RTCC_CMD_MASK 0x00000001UL

Mask for RTCC_CMD

Definition at line 499 of file efr32mg1p_rtcc.h .

#define _RTCC_CMD_RESETVALUE 0x00000000UL

Default value for RTCC_CMD

Definition at line 498 of file efr32mg1p_rtcc.h .

#define _RTCC_CNT_CNT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CNT

Definition at line 181 of file efr32mg1p_rtcc.h .

#define _RTCC_CNT_CNT_MASK 0xFFFFFFFFUL

Bit mask for RTCC_CNT

Definition at line 180 of file efr32mg1p_rtcc.h .

#define _RTCC_CNT_CNT_SHIFT 0

Shift value for RTCC_CNT

Definition at line 179 of file efr32mg1p_rtcc.h .

#define _RTCC_CNT_MASK 0xFFFFFFFFUL

Mask for RTCC_CNT

Definition at line 178 of file efr32mg1p_rtcc.h .

#define _RTCC_CNT_RESETVALUE 0x00000000UL

Default value for RTCC_CNT

Definition at line 177 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_COMBCNT_CNTLSB_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_COMBCNT

Definition at line 193 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_CNTLSB_MASK 0xFFFF8000UL

Bit mask for RTCC_CNTLSB

Definition at line 192 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_CNTLSB_SHIFT 15

Shift value for RTCC_CNTLSB

Definition at line 191 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_MASK 0xFFFFFFFFUL

Mask for RTCC_COMBCNT

Definition at line 186 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_PRECNT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_COMBCNT

Definition at line 189 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_PRECNT_MASK 0x7FFFUL

Bit mask for RTCC_PRECNT

Definition at line 188 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_PRECNT_SHIFT 0

Shift value for RTCC_PRECNT

Definition at line 187 of file efr32mg1p_rtcc.h .

#define _RTCC_COMBCNT_RESETVALUE 0x00000000UL

Default value for RTCC_COMBCNT

Definition at line 185 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CCV1TOP_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 101 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CCV1TOP_MASK 0x20UL

Bit mask for RTCC_CCV1TOP

Definition at line 100 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CCV1TOP_SHIFT 5

Shift value for RTCC_CCV1TOP

Definition at line 99 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_CNTMODE_CALENDAR 0x00000001UL

Mode CALENDAR for RTCC_CTRL

Definition at line 158 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 156 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTMODE_MASK 0x10000UL

Bit mask for RTCC_CNTMODE

Definition at line 155 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTMODE_NORMAL 0x00000000UL

Mode NORMAL for RTCC_CTRL

Definition at line 157 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTMODE_SHIFT 16

Shift value for RTCC_CNTMODE

Definition at line 154 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_CNTPRESC_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 105 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV1 0x00000000UL

Mode DIV1 for RTCC_CTRL

Definition at line 106 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV1024 0x0000000AUL

Mode DIV1024 for RTCC_CTRL

Definition at line 116 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV128 0x00000007UL

Mode DIV128 for RTCC_CTRL

Definition at line 113 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV16 0x00000004UL

Mode DIV16 for RTCC_CTRL

Definition at line 110 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV16384 0x0000000EUL

Mode DIV16384 for RTCC_CTRL

Definition at line 120 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV2 0x00000001UL

Mode DIV2 for RTCC_CTRL

Definition at line 107 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV2048 0x0000000BUL

Mode DIV2048 for RTCC_CTRL

Definition at line 117 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV256 0x00000008UL

Mode DIV256 for RTCC_CTRL

Definition at line 114 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV32 0x00000005UL

Mode DIV32 for RTCC_CTRL

Definition at line 111 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV32768 0x0000000FUL

Mode DIV32768 for RTCC_CTRL

Definition at line 121 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV4 0x00000002UL

Mode DIV4 for RTCC_CTRL

Definition at line 108 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV4096 0x0000000CUL

Mode DIV4096 for RTCC_CTRL

Definition at line 118 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV512 0x00000009UL

Mode DIV512 for RTCC_CTRL

Definition at line 115 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV64 0x00000006UL

Mode DIV64 for RTCC_CTRL

Definition at line 112 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV8 0x00000003UL

Mode DIV8 for RTCC_CTRL

Definition at line 109 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_DIV8192 0x0000000DUL

Mode DIV8192 for RTCC_CTRL

Definition at line 119 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_MASK 0xF00UL

Bit mask for RTCC_CNTPRESC

Definition at line 104 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTPRESC_SHIFT 8

Shift value for RTCC_CNTPRESC

Definition at line 103 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_CNTTICK_CCV0MATCH 0x00000001UL

Mode CCV0MATCH for RTCC_CTRL

Definition at line 144 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 142 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTTICK_MASK 0x1000UL

Bit mask for RTCC_CNTTICK

Definition at line 141 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTTICK_PRESC 0x00000000UL

Mode PRESC for RTCC_CTRL

Definition at line 143 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_CNTTICK_SHIFT 12

Shift value for RTCC_CNTTICK

Definition at line 140 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_DEBUGRUN_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 91 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_DEBUGRUN_MASK 0x4UL

Bit mask for RTCC_DEBUGRUN

Definition at line 90 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_DEBUGRUN_SHIFT 2

Shift value for RTCC_DEBUGRUN

Definition at line 89 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_ENABLE_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 86 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_ENABLE_MASK 0x1UL

Bit mask for RTCC_ENABLE

Definition at line 85 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_ENABLE_SHIFT 0

Shift value for RTCC_ENABLE

Definition at line 84 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Enable() , and RTCC_Init() .

#define _RTCC_CTRL_LYEARCORRDIS_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 165 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_LYEARCORRDIS_MASK 0x20000UL

Bit mask for RTCC_LYEARCORRDIS

Definition at line 164 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_LYEARCORRDIS_SHIFT 17

Shift value for RTCC_LYEARCORRDIS

Definition at line 163 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_MASK 0x00039F35UL

Mask for RTCC_CTRL

Definition at line 82 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_OSCFDETEN_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 151 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_OSCFDETEN_MASK 0x8000UL

Bit mask for RTCC_OSCFDETEN

Definition at line 150 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_OSCFDETEN_SHIFT 15

Shift value for RTCC_OSCFDETEN

Definition at line 149 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_PRECCV0TOP_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_CTRL

Definition at line 96 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_PRECCV0TOP_MASK 0x10UL

Bit mask for RTCC_PRECCV0TOP

Definition at line 95 of file efr32mg1p_rtcc.h .

#define _RTCC_CTRL_PRECCV0TOP_SHIFT 4

Shift value for RTCC_PRECCV0TOP

Definition at line 94 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Init() .

#define _RTCC_CTRL_RESETVALUE 0x00000000UL

Default value for RTCC_CTRL

Definition at line 81 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() , and UDELAY_Calibrate() .

#define _RTCC_DATE_DAYOMT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 233 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOMT_MASK 0x30UL

Bit mask for RTCC_DAYOMT

Definition at line 232 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOMT_SHIFT 4

Shift value for RTCC_DAYOMT

Definition at line 231 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOMU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 229 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOMU_MASK 0xFUL

Bit mask for RTCC_DAYOMU

Definition at line 228 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOMU_SHIFT 0

Shift value for RTCC_DAYOMU

Definition at line 227 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOW_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 254 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOW_MASK 0x7000000UL

Bit mask for RTCC_DAYOW

Definition at line 253 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_DAYOW_SHIFT 24

Shift value for RTCC_DAYOW

Definition at line 252 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MASK 0x07FF1F3FUL

Mask for RTCC_DATE

Definition at line 226 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MONTHT_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 242 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MONTHT_MASK 0x1000UL

Bit mask for RTCC_MONTHT

Definition at line 241 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MONTHT_SHIFT 12

Shift value for RTCC_MONTHT

Definition at line 240 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MONTHU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 237 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MONTHU_MASK 0xF00UL

Bit mask for RTCC_MONTHU

Definition at line 236 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_MONTHU_SHIFT 8

Shift value for RTCC_MONTHU

Definition at line 235 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_RESETVALUE 0x00000000UL

Default value for RTCC_DATE

Definition at line 225 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_DATE_YEART_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 250 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_YEART_MASK 0xF00000UL

Bit mask for RTCC_YEART

Definition at line 249 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_YEART_SHIFT 20

Shift value for RTCC_YEART

Definition at line 248 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_YEARU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_DATE

Definition at line 246 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_YEARU_MASK 0xF0000UL

Bit mask for RTCC_YEARU

Definition at line 245 of file efr32mg1p_rtcc.h .

#define _RTCC_DATE_YEARU_SHIFT 16

Shift value for RTCC_YEARU

Definition at line 244 of file efr32mg1p_rtcc.h .

#define _RTCC_EM4WUEN_EM4WU_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_EM4WUEN

Definition at line 546 of file efr32mg1p_rtcc.h .

#define _RTCC_EM4WUEN_EM4WU_MASK 0x1UL

Bit mask for RTCC_EM4WU

Definition at line 545 of file efr32mg1p_rtcc.h .

#define _RTCC_EM4WUEN_EM4WU_SHIFT 0

Shift value for RTCC_EM4WU

Definition at line 544 of file efr32mg1p_rtcc.h .

#define _RTCC_EM4WUEN_MASK 0x00000001UL

Mask for RTCC_EM4WUEN

Definition at line 542 of file efr32mg1p_rtcc.h .

#define _RTCC_EM4WUEN_RESETVALUE 0x00000000UL

Default value for RTCC_EM4WUEN

Definition at line 541 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_IEN_CC0_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 445 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC0_MASK 0x2UL

Bit mask for RTCC_CC0

Definition at line 444 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC0_SHIFT 1

Shift value for RTCC_CC0

Definition at line 443 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC1_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 450 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC1_MASK 0x4UL

Bit mask for RTCC_CC1

Definition at line 449 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC1_SHIFT 2

Shift value for RTCC_CC1

Definition at line 448 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC2_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 455 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC2_MASK 0x8UL

Bit mask for RTCC_CC2

Definition at line 454 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CC2_SHIFT 3

Shift value for RTCC_CC2

Definition at line 453 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CNTTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 465 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CNTTICK_MASK 0x20UL

Bit mask for RTCC_CNTTICK

Definition at line 464 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_CNTTICK_SHIFT 5

Shift value for RTCC_CNTTICK

Definition at line 463 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_DAYOWOF_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 485 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_DAYOWOF_MASK 0x200UL

Bit mask for RTCC_DAYOWOF

Definition at line 484 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_DAYOWOF_SHIFT 9

Shift value for RTCC_DAYOWOF

Definition at line 483 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_DAYTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 480 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_DAYTICK_MASK 0x100UL

Bit mask for RTCC_DAYTICK

Definition at line 479 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_DAYTICK_SHIFT 8

Shift value for RTCC_DAYTICK

Definition at line 478 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_HOURTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 475 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_HOURTICK_MASK 0x80UL

Bit mask for RTCC_HOURTICK

Definition at line 474 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_HOURTICK_SHIFT 7

Shift value for RTCC_HOURTICK

Definition at line 473 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_MASK 0x000007FFUL

Mask for RTCC_IEN

Definition at line 436 of file efr32mg1p_rtcc.h .

Referenced by UDELAY_Calibrate() .

#define _RTCC_IEN_MINTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 470 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_MINTICK_MASK 0x40UL

Bit mask for RTCC_MINTICK

Definition at line 469 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_MINTICK_SHIFT 6

Shift value for RTCC_MINTICK

Definition at line 468 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_MONTHTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 490 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_MONTHTICK_MASK 0x400UL

Bit mask for RTCC_MONTHTICK

Definition at line 489 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_MONTHTICK_SHIFT 10

Shift value for RTCC_MONTHTICK

Definition at line 488 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_OF_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 440 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_OF_MASK 0x1UL

Bit mask for RTCC_OF

Definition at line 439 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_OF_SHIFT 0

Shift value for RTCC_OF

Definition at line 438 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_OSCFAIL_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IEN

Definition at line 460 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_OSCFAIL_MASK 0x10UL

Bit mask for RTCC_OSCFAIL

Definition at line 459 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_OSCFAIL_SHIFT 4

Shift value for RTCC_OSCFAIL

Definition at line 458 of file efr32mg1p_rtcc.h .

#define _RTCC_IEN_RESETVALUE 0x00000000UL

Default value for RTCC_IEN

Definition at line 435 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_IF_CC0_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 268 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC0_MASK 0x2UL

Bit mask for RTCC_CC0

Definition at line 267 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC0_SHIFT 1

Shift value for RTCC_CC0

Definition at line 266 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC1_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 273 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC1_MASK 0x4UL

Bit mask for RTCC_CC1

Definition at line 272 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC1_SHIFT 2

Shift value for RTCC_CC1

Definition at line 271 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC2_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 278 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC2_MASK 0x8UL

Bit mask for RTCC_CC2

Definition at line 277 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CC2_SHIFT 3

Shift value for RTCC_CC2

Definition at line 276 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CNTTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 288 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CNTTICK_MASK 0x20UL

Bit mask for RTCC_CNTTICK

Definition at line 287 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_CNTTICK_SHIFT 5

Shift value for RTCC_CNTTICK

Definition at line 286 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_DAYOWOF_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 308 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_DAYOWOF_MASK 0x200UL

Bit mask for RTCC_DAYOWOF

Definition at line 307 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_DAYOWOF_SHIFT 9

Shift value for RTCC_DAYOWOF

Definition at line 306 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_DAYTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 303 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_DAYTICK_MASK 0x100UL

Bit mask for RTCC_DAYTICK

Definition at line 302 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_DAYTICK_SHIFT 8

Shift value for RTCC_DAYTICK

Definition at line 301 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_HOURTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 298 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_HOURTICK_MASK 0x80UL

Bit mask for RTCC_HOURTICK

Definition at line 297 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_HOURTICK_SHIFT 7

Shift value for RTCC_HOURTICK

Definition at line 296 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MASK 0x000007FFUL

Mask for RTCC_IF

Definition at line 259 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MINTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 293 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MINTICK_MASK 0x40UL

Bit mask for RTCC_MINTICK

Definition at line 292 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MINTICK_SHIFT 6

Shift value for RTCC_MINTICK

Definition at line 291 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MONTHTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 313 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MONTHTICK_MASK 0x400UL

Bit mask for RTCC_MONTHTICK

Definition at line 312 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_MONTHTICK_SHIFT 10

Shift value for RTCC_MONTHTICK

Definition at line 311 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_OF_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 263 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_OF_MASK 0x1UL

Bit mask for RTCC_OF

Definition at line 262 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_OF_SHIFT 0

Shift value for RTCC_OF

Definition at line 261 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_OSCFAIL_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IF

Definition at line 283 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_OSCFAIL_MASK 0x10UL

Bit mask for RTCC_OSCFAIL

Definition at line 282 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_OSCFAIL_SHIFT 4

Shift value for RTCC_OSCFAIL

Definition at line 281 of file efr32mg1p_rtcc.h .

#define _RTCC_IF_RESETVALUE 0x00000000UL

Default value for RTCC_IF

Definition at line 258 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC0_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 386 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC0_MASK 0x2UL

Bit mask for RTCC_CC0

Definition at line 385 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC0_SHIFT 1

Shift value for RTCC_CC0

Definition at line 384 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC1_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 391 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC1_MASK 0x4UL

Bit mask for RTCC_CC1

Definition at line 390 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC1_SHIFT 2

Shift value for RTCC_CC1

Definition at line 389 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC2_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 396 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC2_MASK 0x8UL

Bit mask for RTCC_CC2

Definition at line 395 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CC2_SHIFT 3

Shift value for RTCC_CC2

Definition at line 394 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CNTTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 406 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CNTTICK_MASK 0x20UL

Bit mask for RTCC_CNTTICK

Definition at line 405 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_CNTTICK_SHIFT 5

Shift value for RTCC_CNTTICK

Definition at line 404 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_DAYOWOF_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 426 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_DAYOWOF_MASK 0x200UL

Bit mask for RTCC_DAYOWOF

Definition at line 425 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_DAYOWOF_SHIFT 9

Shift value for RTCC_DAYOWOF

Definition at line 424 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_DAYTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 421 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_DAYTICK_MASK 0x100UL

Bit mask for RTCC_DAYTICK

Definition at line 420 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_DAYTICK_SHIFT 8

Shift value for RTCC_DAYTICK

Definition at line 419 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_HOURTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 416 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_HOURTICK_MASK 0x80UL

Bit mask for RTCC_HOURTICK

Definition at line 415 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_HOURTICK_SHIFT 7

Shift value for RTCC_HOURTICK

Definition at line 414 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_MASK 0x000007FFUL

Mask for RTCC_IFC

Definition at line 377 of file efr32mg1p_rtcc.h .

Referenced by RTCC_Reset() .

#define _RTCC_IFC_MINTICK_DEFAULT 0x00000000UL

Mode DEFAULT for RTCC_IFC

Definition at line 411 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_MINTICK_MASK 0x40UL

Bit mask for RTCC_MINTICK

Definition at line 410 of file efr32mg1p_rtcc.h .

#define _RTCC_IFC_MINTICK_SHIFT 6

Shift value for RTCC_MINTICK

RTCC Bit FieldsDevices > RTCC

Macros

Macro Definition Documentation