GPIO_P_TypeDef Struct ReferenceDevicesDevices > | GPIO

GPIO_P GPIO P Register

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Definition at line 47 of file efm32jg1b_gpio_p.h.

#include <efm32jg1b_gpio_p.h>

Data Fields

__IOM uint32_t CTRL
 
__IM uint32_t DIN
 
__IOM uint32_t DOUT
 
__IOM uint32_t DOUTTGL
 
__IOM uint32_t MODEH
 
__IOM uint32_t MODEL
 
__IOM uint32_t OVTDIS
 
__IOM uint32_t PINLOCKN
 
uint32_t RESERVED0 [2]
 
uint32_t RESERVED1 [1]
 
uint32_t RESERVED2 [1]
 

Field Documentation

__IOM uint32_t GPIO_P_TypeDef::CTRL

Port Control Register

Definition at line 48 of file efm32jg1b_gpio_p.h.

__IM uint32_t GPIO_P_TypeDef::DIN

Port Data in Register

Definition at line 54 of file efm32jg1b_gpio_p.h.

__IOM uint32_t GPIO_P_TypeDef::DOUT

Port Data Out Register

Definition at line 51 of file efm32jg1b_gpio_p.h.

__IOM uint32_t GPIO_P_TypeDef::DOUTTGL

Port Data Out Toggle Register

Definition at line 53 of file efm32jg1b_gpio_p.h.

__IOM uint32_t GPIO_P_TypeDef::MODEH

Port Pin Mode High Register

Definition at line 50 of file efm32jg1b_gpio_p.h.

__IOM uint32_t GPIO_P_TypeDef::MODEL

Port Pin Mode Low Register

Definition at line 49 of file efm32jg1b_gpio_p.h.

__IOM uint32_t GPIO_P_TypeDef::OVTDIS

Over Voltage Disable for All Modes

Definition at line 57 of file efm32jg1b_gpio_p.h.

__IOM uint32_t GPIO_P_TypeDef::PINLOCKN

Port Unlocked Pins Register

Definition at line 55 of file efm32jg1b_gpio_p.h.

uint32_t GPIO_P_TypeDef::RESERVED0[2]

Reserved for future use

Definition at line 52 of file efm32jg1b_gpio_p.h.

uint32_t GPIO_P_TypeDef::RESERVED1[1]

Reserved for future use

Definition at line 56 of file efm32jg1b_gpio_p.h.

uint32_t GPIO_P_TypeDef::RESERVED2[1]

Reserved future

Definition at line 58 of file efm32jg1b_gpio_p.h.


The documentation for this struct was generated from the following file:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFM32JG1B/Include/efm32jg1b_gpio_p.h