|
#define
|
_I2C_CLKDIV_DIV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CLKDIV_DIV_MASK
0x1FFUL
|
|
#define
|
_I2C_CLKDIV_DIV_SHIFT
0
|
|
#define
|
_I2C_CLKDIV_MASK
0x000001FFUL
|
|
#define
|
_I2C_CLKDIV_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_CMD_ABORT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_ABORT_MASK
0x20UL
|
|
#define
|
_I2C_CMD_ABORT_SHIFT
5
|
|
#define
|
_I2C_CMD_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_ACK_MASK
0x4UL
|
|
#define
|
_I2C_CMD_ACK_SHIFT
2
|
|
#define
|
_I2C_CMD_CLEARPC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_CLEARPC_MASK
0x80UL
|
|
#define
|
_I2C_CMD_CLEARPC_SHIFT
7
|
|
#define
|
_I2C_CMD_CLEARTX_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_CLEARTX_MASK
0x40UL
|
|
#define
|
_I2C_CMD_CLEARTX_SHIFT
6
|
|
#define
|
_I2C_CMD_CONT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_CONT_MASK
0x10UL
|
|
#define
|
_I2C_CMD_CONT_SHIFT
4
|
|
#define
|
_I2C_CMD_MASK
0x000000FFUL
|
|
#define
|
_I2C_CMD_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_NACK_MASK
0x8UL
|
|
#define
|
_I2C_CMD_NACK_SHIFT
3
|
|
#define
|
_I2C_CMD_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_CMD_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_START_MASK
0x1UL
|
|
#define
|
_I2C_CMD_START_SHIFT
0
|
|
#define
|
_I2C_CMD_STOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CMD_STOP_MASK
0x2UL
|
|
#define
|
_I2C_CMD_STOP_SHIFT
1
|
|
#define
|
_I2C_CTRL_ARBDIS_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_ARBDIS_MASK
0x20UL
|
|
#define
|
_I2C_CTRL_ARBDIS_SHIFT
5
|
|
#define
|
_I2C_CTRL_AUTOACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_AUTOACK_MASK
0x4UL
|
|
#define
|
_I2C_CTRL_AUTOACK_SHIFT
2
|
|
#define
|
_I2C_CTRL_AUTOSE_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_AUTOSE_MASK
0x8UL
|
|
#define
|
_I2C_CTRL_AUTOSE_SHIFT
3
|
|
#define
|
_I2C_CTRL_AUTOSN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_AUTOSN_MASK
0x10UL
|
|
#define
|
_I2C_CTRL_AUTOSN_SHIFT
4
|
|
#define
|
_I2C_CTRL_BITO_160PCC
0x00000003UL
|
|
#define
|
_I2C_CTRL_BITO_40PCC
0x00000001UL
|
|
#define
|
_I2C_CTRL_BITO_80PCC
0x00000002UL
|
|
#define
|
_I2C_CTRL_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_BITO_MASK
0x3000UL
|
|
#define
|
_I2C_CTRL_BITO_OFF
0x00000000UL
|
|
#define
|
_I2C_CTRL_BITO_SHIFT
12
|
|
#define
|
_I2C_CTRL_CLHR_ASYMMETRIC
0x00000001UL
|
|
#define
|
_I2C_CTRL_CLHR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLHR_FAST
0x00000002UL
|
|
#define
|
_I2C_CTRL_CLHR_MASK
0x300UL
|
|
#define
|
_I2C_CTRL_CLHR_SHIFT
8
|
|
#define
|
_I2C_CTRL_CLHR_STANDARD
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLTO_1024PCC
0x00000005UL
|
|
#define
|
_I2C_CTRL_CLTO_160PCC
0x00000003UL
|
|
#define
|
_I2C_CTRL_CLTO_320PCC
0x00000004UL
|
|
#define
|
_I2C_CTRL_CLTO_40PCC
0x00000001UL
|
|
#define
|
_I2C_CTRL_CLTO_80PCC
0x00000002UL
|
|
#define
|
_I2C_CTRL_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLTO_MASK
0x70000UL
|
|
#define
|
_I2C_CTRL_CLTO_OFF
0x00000000UL
|
|
#define
|
_I2C_CTRL_CLTO_SHIFT
16
|
|
#define
|
_I2C_CTRL_EN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_EN_MASK
0x1UL
|
|
#define
|
_I2C_CTRL_EN_SHIFT
0
|
|
#define
|
_I2C_CTRL_GCAMEN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_GCAMEN_MASK
0x40UL
|
|
#define
|
_I2C_CTRL_GCAMEN_SHIFT
6
|
|
#define
|
_I2C_CTRL_GIBITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_GIBITO_MASK
0x8000UL
|
|
#define
|
_I2C_CTRL_GIBITO_SHIFT
15
|
|
#define
|
_I2C_CTRL_MASK
0x0007B3FFUL
|
|
#define
|
_I2C_CTRL_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_CTRL_SLAVE_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_SLAVE_MASK
0x2UL
|
|
#define
|
_I2C_CTRL_SLAVE_SHIFT
1
|
|
#define
|
_I2C_CTRL_TXBIL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_CTRL_TXBIL_EMPTY
0x00000000UL
|
|
#define
|
_I2C_CTRL_TXBIL_HALFFULL
0x00000001UL
|
|
#define
|
_I2C_CTRL_TXBIL_MASK
0x80UL
|
|
#define
|
_I2C_CTRL_TXBIL_SHIFT
7
|
|
#define
|
_I2C_IEN_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IEN_ACK_SHIFT
6
|
|
#define
|
_I2C_IEN_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IEN_ADDR_SHIFT
2
|
|
#define
|
_I2C_IEN_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IEN_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IEN_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IEN_BITO_SHIFT
14
|
|
#define
|
_I2C_IEN_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IEN_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IEN_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IEN_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IEN_CLERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_CLERR_MASK
0x40000UL
|
|
#define
|
_I2C_IEN_CLERR_SHIFT
18
|
|
#define
|
_I2C_IEN_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IEN_CLTO_SHIFT
15
|
|
#define
|
_I2C_IEN_MASK
0x0007FFFFUL
|
|
#define
|
_I2C_IEN_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IEN_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IEN_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IEN_NACK_SHIFT
7
|
|
#define
|
_I2C_IEN_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_IEN_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IEN_RSTART_SHIFT
1
|
|
#define
|
_I2C_IEN_RXDATAV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RXDATAV_MASK
0x20UL
|
|
#define
|
_I2C_IEN_RXDATAV_SHIFT
5
|
|
#define
|
_I2C_IEN_RXFULL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RXFULL_MASK
0x20000UL
|
|
#define
|
_I2C_IEN_RXFULL_SHIFT
17
|
|
#define
|
_I2C_IEN_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IEN_RXUF_SHIFT
13
|
|
#define
|
_I2C_IEN_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IEN_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IEN_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_START_MASK
0x1UL
|
|
#define
|
_I2C_IEN_START_SHIFT
0
|
|
#define
|
_I2C_IEN_TXBL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_TXBL_MASK
0x10UL
|
|
#define
|
_I2C_IEN_TXBL_SHIFT
4
|
|
#define
|
_I2C_IEN_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IEN_TXC_SHIFT
3
|
|
#define
|
_I2C_IEN_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IEN_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IEN_TXOF_SHIFT
12
|
|
#define
|
_I2C_IF_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IF_ACK_SHIFT
6
|
|
#define
|
_I2C_IF_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IF_ADDR_SHIFT
2
|
|
#define
|
_I2C_IF_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IF_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IF_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IF_BITO_SHIFT
14
|
|
#define
|
_I2C_IF_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IF_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IF_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IF_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IF_CLERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_CLERR_MASK
0x40000UL
|
|
#define
|
_I2C_IF_CLERR_SHIFT
18
|
|
#define
|
_I2C_IF_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IF_CLTO_SHIFT
15
|
|
#define
|
_I2C_IF_MASK
0x0007FFFFUL
|
|
#define
|
_I2C_IF_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IF_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IF_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IF_NACK_SHIFT
7
|
|
#define
|
_I2C_IF_RESETVALUE
0x00000010UL
|
|
#define
|
_I2C_IF_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IF_RSTART_SHIFT
1
|
|
#define
|
_I2C_IF_RXDATAV_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RXDATAV_MASK
0x20UL
|
|
#define
|
_I2C_IF_RXDATAV_SHIFT
5
|
|
#define
|
_I2C_IF_RXFULL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RXFULL_MASK
0x20000UL
|
|
#define
|
_I2C_IF_RXFULL_SHIFT
17
|
|
#define
|
_I2C_IF_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IF_RXUF_SHIFT
13
|
|
#define
|
_I2C_IF_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IF_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IF_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_START_MASK
0x1UL
|
|
#define
|
_I2C_IF_START_SHIFT
0
|
|
#define
|
_I2C_IF_TXBL_DEFAULT
0x00000001UL
|
|
#define
|
_I2C_IF_TXBL_MASK
0x10UL
|
|
#define
|
_I2C_IF_TXBL_SHIFT
4
|
|
#define
|
_I2C_IF_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IF_TXC_SHIFT
3
|
|
#define
|
_I2C_IF_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IF_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IF_TXOF_SHIFT
12
|
|
#define
|
_I2C_IFC_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IFC_ACK_SHIFT
6
|
|
#define
|
_I2C_IFC_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IFC_ADDR_SHIFT
2
|
|
#define
|
_I2C_IFC_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IFC_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IFC_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IFC_BITO_SHIFT
14
|
|
#define
|
_I2C_IFC_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IFC_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IFC_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IFC_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IFC_CLERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_CLERR_MASK
0x40000UL
|
|
#define
|
_I2C_IFC_CLERR_SHIFT
18
|
|
#define
|
_I2C_IFC_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IFC_CLTO_SHIFT
15
|
|
#define
|
_I2C_IFC_MASK
0x0007FFCFUL
|
|
#define
|
_I2C_IFC_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IFC_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IFC_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IFC_NACK_SHIFT
7
|
|
#define
|
_I2C_IFC_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_IFC_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IFC_RSTART_SHIFT
1
|
|
#define
|
_I2C_IFC_RXFULL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_RXFULL_MASK
0x20000UL
|
|
#define
|
_I2C_IFC_RXFULL_SHIFT
17
|
|
#define
|
_I2C_IFC_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IFC_RXUF_SHIFT
13
|
|
#define
|
_I2C_IFC_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IFC_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IFC_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_START_MASK
0x1UL
|
|
#define
|
_I2C_IFC_START_SHIFT
0
|
|
#define
|
_I2C_IFC_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IFC_TXC_SHIFT
3
|
|
#define
|
_I2C_IFC_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFC_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IFC_TXOF_SHIFT
12
|
|
#define
|
_I2C_IFS_ACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_ACK_MASK
0x40UL
|
|
#define
|
_I2C_IFS_ACK_SHIFT
6
|
|
#define
|
_I2C_IFS_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_ADDR_MASK
0x4UL
|
|
#define
|
_I2C_IFS_ADDR_SHIFT
2
|
|
#define
|
_I2C_IFS_ARBLOST_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_ARBLOST_MASK
0x200UL
|
|
#define
|
_I2C_IFS_ARBLOST_SHIFT
9
|
|
#define
|
_I2C_IFS_BITO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_BITO_MASK
0x4000UL
|
|
#define
|
_I2C_IFS_BITO_SHIFT
14
|
|
#define
|
_I2C_IFS_BUSERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_BUSERR_MASK
0x400UL
|
|
#define
|
_I2C_IFS_BUSERR_SHIFT
10
|
|
#define
|
_I2C_IFS_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_BUSHOLD_MASK
0x800UL
|
|
#define
|
_I2C_IFS_BUSHOLD_SHIFT
11
|
|
#define
|
_I2C_IFS_CLERR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_CLERR_MASK
0x40000UL
|
|
#define
|
_I2C_IFS_CLERR_SHIFT
18
|
|
#define
|
_I2C_IFS_CLTO_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_CLTO_MASK
0x8000UL
|
|
#define
|
_I2C_IFS_CLTO_SHIFT
15
|
|
#define
|
_I2C_IFS_MASK
0x0007FFCFUL
|
|
#define
|
_I2C_IFS_MSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_MSTOP_MASK
0x100UL
|
|
#define
|
_I2C_IFS_MSTOP_SHIFT
8
|
|
#define
|
_I2C_IFS_NACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_NACK_MASK
0x80UL
|
|
#define
|
_I2C_IFS_NACK_SHIFT
7
|
|
#define
|
_I2C_IFS_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_IFS_RSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_RSTART_MASK
0x2UL
|
|
#define
|
_I2C_IFS_RSTART_SHIFT
1
|
|
#define
|
_I2C_IFS_RXFULL_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_RXFULL_MASK
0x20000UL
|
|
#define
|
_I2C_IFS_RXFULL_SHIFT
17
|
|
#define
|
_I2C_IFS_RXUF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_RXUF_MASK
0x2000UL
|
|
#define
|
_I2C_IFS_RXUF_SHIFT
13
|
|
#define
|
_I2C_IFS_SSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_SSTOP_MASK
0x10000UL
|
|
#define
|
_I2C_IFS_SSTOP_SHIFT
16
|
|
#define
|
_I2C_IFS_START_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_START_MASK
0x1UL
|
|
#define
|
_I2C_IFS_START_SHIFT
0
|
|
#define
|
_I2C_IFS_TXC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_TXC_MASK
0x8UL
|
|
#define
|
_I2C_IFS_TXC_SHIFT
3
|
|
#define
|
_I2C_IFS_TXOF_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_IFS_TXOF_MASK
0x1000UL
|
|
#define
|
_I2C_IFS_TXOF_SHIFT
12
|
|
#define
|
_I2C_ROUTELOC0_MASK
0x00001F1FUL
|
|
#define
|
_I2C_ROUTELOC0_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC0
0x00000000UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC1
0x00000001UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC10
0x0000000AUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC11
0x0000000BUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC12
0x0000000CUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC13
0x0000000DUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC14
0x0000000EUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC15
0x0000000FUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC16
0x00000010UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC17
0x00000011UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC18
0x00000012UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC19
0x00000013UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC2
0x00000002UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC20
0x00000014UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC21
0x00000015UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC22
0x00000016UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC23
0x00000017UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC24
0x00000018UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC25
0x00000019UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC26
0x0000001AUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC27
0x0000001BUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC28
0x0000001CUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC29
0x0000001DUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC3
0x00000003UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC30
0x0000001EUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC31
0x0000001FUL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC4
0x00000004UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC5
0x00000005UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC6
0x00000006UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC7
0x00000007UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC8
0x00000008UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_LOC9
0x00000009UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_MASK
0x1F00UL
|
|
#define
|
_I2C_ROUTELOC0_SCLLOC_SHIFT
8
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC0
0x00000000UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC1
0x00000001UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC10
0x0000000AUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC11
0x0000000BUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC12
0x0000000CUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC13
0x0000000DUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC14
0x0000000EUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC15
0x0000000FUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC16
0x00000010UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC17
0x00000011UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC18
0x00000012UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC19
0x00000013UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC2
0x00000002UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC20
0x00000014UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC21
0x00000015UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC22
0x00000016UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC23
0x00000017UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC24
0x00000018UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC25
0x00000019UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC26
0x0000001AUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC27
0x0000001BUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC28
0x0000001CUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC29
0x0000001DUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC3
0x00000003UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC30
0x0000001EUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC31
0x0000001FUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC4
0x00000004UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC5
0x00000005UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC6
0x00000006UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC7
0x00000007UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC8
0x00000008UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_LOC9
0x00000009UL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_MASK
0x1FUL
|
|
#define
|
_I2C_ROUTELOC0_SDALOC_SHIFT
0
|
|
#define
|
_I2C_ROUTEPEN_MASK
0x00000003UL
|
|
#define
|
_I2C_ROUTEPEN_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_ROUTEPEN_SCLPEN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTEPEN_SCLPEN_MASK
0x2UL
|
|
#define
|
_I2C_ROUTEPEN_SCLPEN_SHIFT
1
|
|
#define
|
_I2C_ROUTEPEN_SDAPEN_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_ROUTEPEN_SDAPEN_MASK
0x1UL
|
|
#define
|
_I2C_ROUTEPEN_SDAPEN_SHIFT
0
|
|
#define
|
_I2C_RXDATA_MASK
0x000000FFUL
|
|
#define
|
_I2C_RXDATA_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_RXDATA_RXDATA_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDATA_RXDATA_MASK
0xFFUL
|
|
#define
|
_I2C_RXDATA_RXDATA_SHIFT
0
|
|
#define
|
_I2C_RXDATAP_MASK
0x000000FFUL
|
|
#define
|
_I2C_RXDATAP_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_RXDATAP_RXDATAP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDATAP_RXDATAP_MASK
0xFFUL
|
|
#define
|
_I2C_RXDATAP_RXDATAP_SHIFT
0
|
|
#define
|
_I2C_RXDOUBLE_MASK
0x0000FFFFUL
|
|
#define
|
_I2C_RXDOUBLE_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_RXDOUBLE_RXDATA0_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDOUBLE_RXDATA0_MASK
0xFFUL
|
|
#define
|
_I2C_RXDOUBLE_RXDATA0_SHIFT
0
|
|
#define
|
_I2C_RXDOUBLE_RXDATA1_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDOUBLE_RXDATA1_MASK
0xFF00UL
|
|
#define
|
_I2C_RXDOUBLE_RXDATA1_SHIFT
8
|
|
#define
|
_I2C_RXDOUBLEP_MASK
0x0000FFFFUL
|
|
#define
|
_I2C_RXDOUBLEP_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_RXDOUBLEP_RXDATAP0_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDOUBLEP_RXDATAP0_MASK
0xFFUL
|
|
#define
|
_I2C_RXDOUBLEP_RXDATAP0_SHIFT
0
|
|
#define
|
_I2C_RXDOUBLEP_RXDATAP1_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_RXDOUBLEP_RXDATAP1_MASK
0xFF00UL
|
|
#define
|
_I2C_RXDOUBLEP_RXDATAP1_SHIFT
8
|
|
#define
|
_I2C_SADDR_ADDR_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_SADDR_ADDR_MASK
0xFEUL
|
|
#define
|
_I2C_SADDR_ADDR_SHIFT
1
|
|
#define
|
_I2C_SADDR_MASK
0x000000FEUL
|
|
#define
|
_I2C_SADDR_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_SADDRMASK_MASK
0x000000FEUL
|
|
#define
|
_I2C_SADDRMASK_MASK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_SADDRMASK_MASK_MASK
0xFEUL
|
|
#define
|
_I2C_SADDRMASK_MASK_SHIFT
1
|
|
#define
|
_I2C_SADDRMASK_RESETVALUE
0x00000000UL
|
|
#define
|
_I2C_STATE_BUSHOLD_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_BUSHOLD_MASK
0x10UL
|
|
#define
|
_I2C_STATE_BUSHOLD_SHIFT
4
|
|
#define
|
_I2C_STATE_BUSY_DEFAULT
0x00000001UL
|
|
#define
|
_I2C_STATE_BUSY_MASK
0x1UL
|
|
#define
|
_I2C_STATE_BUSY_SHIFT
0
|
|
#define
|
_I2C_STATE_MASK
0x000000FFUL
|
|
#define
|
_I2C_STATE_MASTER_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_MASTER_MASK
0x2UL
|
|
#define
|
_I2C_STATE_MASTER_SHIFT
1
|
|
#define
|
_I2C_STATE_NACKED_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_NACKED_MASK
0x8UL
|
|
#define
|
_I2C_STATE_NACKED_SHIFT
3
|
|
#define
|
_I2C_STATE_RESETVALUE
0x00000001UL
|
|
#define
|
_I2C_STATE_STATE_ADDR
0x00000003UL
|
|
#define
|
_I2C_STATE_STATE_ADDRACK
0x00000004UL
|
|
#define
|
_I2C_STATE_STATE_DATA
0x00000005UL
|
|
#define
|
_I2C_STATE_STATE_DATAACK
0x00000006UL
|
|
#define
|
_I2C_STATE_STATE_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_STATE_IDLE
0x00000000UL
|
|
#define
|
_I2C_STATE_STATE_MASK
0xE0UL
|
|
#define
|
_I2C_STATE_STATE_SHIFT
5
|
|
#define
|
_I2C_STATE_STATE_START
0x00000002UL
|
|
#define
|
_I2C_STATE_STATE_WAIT
0x00000001UL
|
|
#define
|
_I2C_STATE_TRANSMITTER_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATE_TRANSMITTER_MASK
0x4UL
|
|
#define
|
_I2C_STATE_TRANSMITTER_SHIFT
2
|
|
#define
|
_I2C_STATUS_MASK
0x000003FFUL
|
|
#define
|
_I2C_STATUS_PABORT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PABORT_MASK
0x20UL
|
|
#define
|
_I2C_STATUS_PABORT_SHIFT
5
|
|
#define
|
_I2C_STATUS_PACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PACK_MASK
0x4UL
|
|
#define
|
_I2C_STATUS_PACK_SHIFT
2
|
|
#define
|
_I2C_STATUS_PCONT_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PCONT_MASK
0x10UL
|
|
#define
|
_I2C_STATUS_PCONT_SHIFT
4
|
|
#define
|
_I2C_STATUS_PNACK_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PNACK_MASK
0x8UL
|
|
#define
|
_I2C_STATUS_PNACK_SHIFT
3
|
|
#define
|
_I2C_STATUS_PSTART_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PSTART_MASK
0x1UL
|
|
#define
|
_I2C_STATUS_PSTART_SHIFT
0
|
|
#define
|
_I2C_STATUS_PSTOP_DEFAULT
0x00000000UL
|
|
#define
|
_I2C_STATUS_PSTOP_MASK
0x2UL
|
|
#define
|
_I2C_STATUS_PSTOP_SHIFT
1
|
|
|