PRS_TypeDef Struct ReferenceDevices > EFM32TG_PRS
Definition at line
48
of file
efm32tg_prs.h
.
Data Fields |
|
| PRS_CH_TypeDef | CH [8U] |
| uint32_t | RESERVED0 [1U] |
| __IOM uint32_t | ROUTE |
| __IOM uint32_t | SWLEVEL |
| __IOM uint32_t | SWPULSE |
Field Documentation
| PRS_CH_TypeDef PRS_TypeDef::CH[8U] |
Channel registers
Definition at line
54
of file
efm32tg_prs.h
.
| uint32_t PRS_TypeDef::RESERVED0[1U] |
Reserved registers
Definition at line
53
of file
efm32tg_prs.h
.
| __IOM uint32_t PRS_TypeDef::ROUTE |
I/O Routing Register
Definition at line
51
of file
efm32tg_prs.h
.
| __IOM uint32_t PRS_TypeDef::SWLEVEL |
Software Level Register
Definition at line
50
of file
efm32tg_prs.h
.
| __IOM uint32_t PRS_TypeDef::SWPULSE |
Software Pulse Register
Definition at line
49
of file
efm32tg_prs.h
.
The documentation for this struct was generated from the following file:
-
C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFM32TG/Include/
efm32tg_prs.h