CoreDevices > EFR32BG13P733F512GM48

Detailed Description

Processor and Core Peripheral Section.

Macros

#define __FPU_PRESENT   1U
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   3U
 
#define __Vendor_SysTickConfig   0U
 
#define __VTOR_PRESENT   1U
 

Macro Definition Documentation

#define __FPU_PRESENT   1U

Presence of FPU

Definition at line 128 of file efr32bg13p733f512gm48.h.

#define __MPU_PRESENT   1U

Presence of MPU

Definition at line 127 of file efr32bg13p733f512gm48.h.

#define __NVIC_PRIO_BITS   3U

NVIC interrupt priority bits

Definition at line 130 of file efr32bg13p733f512gm48.h.

Referenced by CORE_AtomicDisableIrq(), CORE_EnterAtomic(), CORE_IrqIsBlocked(), CORE_IrqIsDisabled(), CORE_YieldAtomic(), and LDMA_Init().

#define __Vendor_SysTickConfig   0U

Is 1 if different SysTick counter is used

Definition at line 131 of file efr32bg13p733f512gm48.h.

#define __VTOR_PRESENT   1U

Presence of VTOR register in SCB

Definition at line 129 of file efr32bg13p733f512gm48.h.