General-Purpose Input-Output#
Includes.
Modules#
Enumerations#
GPIO ports IDs.
GPIO Pin Modes.
GPIO Interrupt Configurations.
Functions#
Configure the GPIO pin interrupt.
Set the pin mode for a GPIO pin.
Get the GPIO pin status.
Set a single pin in GPIO configuration register to 1.
Set bits GPIO data out register to 1.
Set GPIO port configuration register.
Set slewrate for pins on a GPIO port.
Set a single pin in GPIO configuration register to 0.
Set bits in configuration register for a port to 0.
Read the pad value for a single pin in a GPIO port.
Get the current setting for a pin in a GPIO configuration register.
Read the pad values for GPIO port.
Get the current setting for a GPIO configuration register.
Toggle a single pin in GPIO port register.
Toggle pins in GPIO port register.
Enable one or more GPIO interrupts.
Disable one or more GPIO interrupts.
Clear one or more pending GPIO interrupts.
Set one or more pending GPIO interrupts from SW.
Get pending GPIO interrupts.
Get enabled GPIO interrupts.
Get enabled and pending GPIO interrupt flags.
Macros#
PAD configuration register base address.
UULP INTR base address.
ULP PAD configuration base address.
MCU HP base address.
MCU ULP base address.
SLEEP FSM base address.
MCU retention base address.
PAD configuration register for GPIO_n(n = 0 t0 63)
ULP PAD configuration register 0.
ULP PAD configuration register 1.
ULP PAD configuration register 2.
UULP V_bat PAD configuration base address.
PAD selection (0 to 21) A value of 1 on this gives control to M4SS.
PAD selection (22 to 33) A value of 1 on this gives control to M4SS.
MISC host base address.
ULP PAD register.
NPSS mask set register base address.
NPSS mask clear register base address.
NPSS clear register base address.
NPSS status register base address.
NPSS GPIO configuration register base address.
UULP GPIO status base address.
GPIO(25-30) pin configuration register.
Nibble shift for interrupt.
Byte shift for interrupt.
Word shift for interrupt.
GPIO LSB word mask.
GPIO LSB nibble mask.
GPIO maximum port pins.
GPIO Host PAD.
GPIO port A maximum pins.
GPIO port B maximum pins.
GPIO port C maximum pins.
GPIO port D maximum pins.
GPIO port E maximum pins.
GPIO port A mask.
GPIO port B mask.
GPIO port C mask.
GPIO port D mask.
GPIO instance clock.
Validate driver strength.
Validate GPIO parameters.
Validate driver disable state.
Validate GPIO HP pad selection.
Validate GPIO HP pin number.
Validate GPIO flags.
Validate ULP interrupts.
Validate ULP pins.
Validate UULP pins.
Validate UULP, ULP mode.
Validate UULP interrupt.
Validate GPIO port.
Validate GPIO mode.
Validate GPIO interrupt.
Validate ULP port and pin.
GPIO Group Interrupt 0.
GPIO Group Interrupt 1.
GPIO Pin Interrupt 0.
GPIO Pin Interrupt 1.
GPIO Pin Interrupt 2.
GPIO Pin Interrupt 3.
GPIO Pin Interrupt 4.
GPIO Pin Interrupt 5.
GPIO Pin Interrupt 6.
GPIO Pin Interrupt 7.
UULP Pin Interrupt 0.
ULP Pin Interrupt.
ULP Group Interrupt.
HP GPIO pin interrupt 0.
HP GPIO pin interrupt 1.
HP GPIO pin interrupt 2.
HP GPIO pin interrupt 3.
HP GPIO pin interrupt 4.
HP GPIO pin interrupt 5.
HP GPIO pin interrupt 6.
HP GPIO pin interrupt 7.
UULP GPIO pin interrupt 1.
UULP GPIO pin interrupt 2.
UULP GPIO pin interrupt 3.
UULP GPIO pin interrupt 4.
UULP GPIO pin interrupt 5.
ULP GPIO pin interrupt.
ULP GPIO group interrupt.
Maximum HP GPIO pin interrupts.
HP GPIO pin interrupt 0 number.
HP GPIO pin interrupt 1 number.
HP GPIO pin interrupt 2 number.
HP GPIO pin interrupt 3 number.
HP GPIO pin interrupt 4 number.
HP GPIO pin interrupt 5 number.
HP GPIO pin interrupt 6 number.
HP GPIO pin interrupt 7 number.
HP GPIO group interrupt 1 number.
HP GPIO group interrupt 2 number.
ULP GPIO pin interrupt number.
ULP GPIO group interrupt number.
UULP GPIO pin interrupt number.
GPIO group interrupt AND/OR.
GPIO group interrupt wakeup.
ULP GPIO port number.
GPIO mode 0.
GPIO mode 1.
GPIO mode 2.
GPIO mode 3.
GPIO mode 4.
GPIO mode 5.
GPIO mode 6.
GPIO mode 7.
GPIO mode 8.
GPIO mode 9.
GPIO mode 10.
GPIO mode 14.
Mode DISABLED for GPIO_P_MODEL.
Mode INPUT for GPIO_P_MODEL.
Mode INPUTPULL for GPIO_P_MODEL.
Mode INPUTPULLFILTER for GPIO_P_MODEL.
Mode PUSHPULL for GPIO_P_MODEL.
Mode PUSHPULLALT for GPIO_P_MODEL.
Mode WIREDOR for GPIO_P_MODEL.
Mode WIREDORPULLDOWN for GPIO_P_MODEL.
Mode WIREDAND for GPIO_P_MODEL.
Mode WIREDANDFILTER for GPIO_P_MODEL.
Mode WIREDANDPULLUP for GPIO_P_MODEL.
Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.
Mode WIREDANDALT for GPIO_P_MODEL.
Mode WIREDANDALTFILTER for GPIO_P_MODEL.
Mode WIREDANDALTPULLUP for GPIO_P_MODEL.
Mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.
Shifted mode DISABLED for GPIO_P_MODEL.
Shifted mode INPUT for GPIO_P_MODEL.
Shifted mode INPUTPULL for GPIO_P_MODEL.
Shifted mode INPUTPULLFILTER for GPIO_P_MODEL.
Shifted mode PUSHPULL for GPIO_P_MODEL.
Shifted mode PUSHPULLALT for GPIO_P_MODEL.
Shifted mode WIREDOR for GPIO_P_MODEL.
Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL.
Shifted mode WIREDAND for GPIO_P_MODEL.
Shifted mode WIREDANDFILTER for GPIO_P_MODEL.
Shifted mode WIREDANDPULLUP for GPIO_P_MODEL.
Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.
Shifted mode WIREDANDALT for GPIO_P_MODEL.
Shifted mode WIREDANDALTFILTER for GPIO_P_MODEL.
Shifted mode WIREDANDALTPULLUP for GPIO_P_MODEL.
Shifted mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.
GPIO PAD number 0.
GPIO PAD number 3.
GPIO PAD number 4.
GPIO PAD number 7.
GPIO PAD number 8.
GPIO Host PAD number 22.
GPIO Host PAD number 25.
GPIO Host PAD number 30.
GPIO Interrupt priority 14.
GPIO Interrupt priority 15.
GPIO ULP port number.
GPIO UULP pin mask.
GPIO bit 0 in configuration register.
GPIO bit 8 in configuration register.
GPIO bit 16 in configuration register.
GPIO bit 24 in configuration register.
GPIO port mask.
GPIO interrupt clear.
GPIO interrupt mask.
GPIO interrupt mask.
GPIO port A maximum pins.
GPIO port B maximum pins.
GPIO port C maximum pins.
GPIO port D maximum pins.
GPIO port A pin mask.
GPIO port B pin mask.
GPIO port C pin mask.
GPIO port D pin mask.
GPIO pins selection for selected port.
GPIO pins mask for selected port.
Validation of GPIO port.
Validating GPIO port and pin.
Highest GPIO pin number.
Highest GPIO port number.
Highest EXT GPIO interrupt number.
Enumeration Documentation#
sl_gpio_port_t#
sl_gpio_port_t
GPIO ports IDs.
| Enumerator | |
|---|---|
| SL_GPIO_PORT_A | GPIO Port A. |
| SL_GPIO_PORT_B | GPIO Port B. |
| SL_GPIO_PORT_C | GPIO Port C. |
| SL_GPIO_PORT_D | GPIO Port D. |
153 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_mode_t#
sl_gpio_mode_t
GPIO Pin Modes.
| Enumerator | |
|---|---|
| SL_GPIO_MODE_0 | Pin MUX GPIO Mode 0. |
| SL_GPIO_MODE_1 | Pin MUX GPIO Mode 1. |
| SL_GPIO_MODE_2 | Pin MUX GPIO Mode 2. |
| SL_GPIO_MODE_3 | Pin MUX GPIO Mode 3. |
| SL_GPIO_MODE_4 | Pin MUX GPIO Mode 4. |
| SL_GPIO_MODE_5 | Pin MUX GPIO Mode 5. |
| SL_GPIO_MODE_6 | Pin MUX GPIO Mode 6. |
| SL_GPIO_MODE_7 | Pin MUX GPIO Mode 7. |
| SL_GPIO_MODE_8 | Pin MUX GPIO Mode 8. |
| SL_GPIO_MODE_9 | Pin MUX GPIO Mode 9. |
| SL_GPIO_MODE_10 | Pin MUX GPIO Mode 10. |
| SL_GPIO_MODE_14 | Pin MUX GPIO Mode 14. |
| SL_GPIO_MODE_DISABLED | Input disabled. Pull-up if DOUT is set. |
| SL_GPIO_MODE_INPUT | Input enabled. Filter if DOUT is set. |
| SL_GPIO_MODE_INPUT_PULL | Input enabled. DOUT determines pull direction. |
| SL_GPIO_MODE_INPUT_PULL_FILTER | Input enabled with filter. DOUT determines pull direction. |
| SL_GPIO_MODE_PUSH_PULL | Push-pull output. |
| SL_GPIO_MODE_PUSH_PULL_ALTERNATE | Push-pull using alternate control. |
| SL_GPIO_MODE_WIRED_OR | Wired-or output. |
| SL_GPIO_MODE_WIRED_OR_PULL_DOWN | Wired-or output with pull-down. |
| SL_GPIO_MODE_WIRED_AND | Open-drain output. |
| SL_GPIO_MODE_WIRED_AND_FILTER | Open-drain output with filter. |
| SL_GPIO_MODE_WIRED_AND_PULLUP | Open-drain output with pull-up. |
| SL_GPIO_MODE_WIRED_AND_PULLUP_FILTER | Open-drain output with filter and pull-up. |
| SL_GPIO_MODE_WIRED_AND_ALTERNATE | Open-drain output using alternate control. |
| SL_GPIO_MODE_WIRED_AND_ALTERNATE_FILTER | Open-drain output using alternate control with filter. |
| SL_GPIO_MODE_WIRED_AND_ALTERNATE_PULLUP | Open-drain output using alternate control with pull-up. |
| SL_GPIO_MODE_WIRED_AND_ALTERNATE_PULLUP_FILTER | Open-drain output using alternate control with filter and pull-up. |
190 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_interrupt_flag_t#
sl_gpio_interrupt_flag_t
GPIO Interrupt Configurations.
| Enumerator | |
|---|---|
| SL_GPIO_INTERRUPT_DISABLE | disable the interrupt |
| SL_GPIO_INTERRUPT_ENABLE | enable the interrupt |
| SL_GPIO_INTERRUPT_RISING_EDGE | interrupt when rising edge is detected |
| SL_GPIO_INTERRUPT_FALLING_EDGE | interrupt when falling edge is detected |
227 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hFunction Documentation#
sl_gpio_configure_interrupt#
void sl_gpio_configure_interrupt (sl_gpio_port_t port, uint8_t pin, uint32_t int_no, sl_gpio_interrupt_flag_t flags)
Configure the GPIO pin interrupt.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins. |
| [in] | int_no | - The interrupt number to trigger. |
| [in] | flags | - Interrupt configuration flags |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
256 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_set_pin_mode#
void sl_gpio_set_pin_mode (sl_gpio_port_t port, uint8_t pin, sl_gpio_mode_t mode, uint32_t output_value)
Set the pin mode for a GPIO pin.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins. |
| [in] | mode | - The desired pin mode. |
| [in] | output_value | - A value to set for the pin in the GPIO register. The GPIO setting is important for some input mode configurations. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance.
Returns
None
277 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_pin_mode#
sl_gpio_mode_t sl_gpio_get_pin_mode (sl_gpio_port_t port, uint8_t pin)
Get the GPIO pin status.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode();
Returns
returns Pin status '0' - Output '1' - Input
298 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_set_pin_output#
static __INLINE void sl_gpio_set_pin_output (sl_gpio_port_t port, uint8_t pin)
Set a single pin in GPIO configuration register to 1.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode(); sl_si91x_gpio_set_pin_direction();
Returns
None
318 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_set_port_output#
static __INLINE void sl_gpio_set_port_output (sl_gpio_port_t port, uint32_t pins)
Set bits GPIO data out register to 1.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pins | - The GPIO pins in a port are set to 1's. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode(); sl_si91x_gpio_set_pin_direction();
Returns
None
345 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_set_port_output_value#
static __INLINE void sl_gpio_set_port_output_value (sl_gpio_port_t port, uint32_t val, uint32_t mask)
Set GPIO port configuration register.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | val | - Value to write to port configuration register. |
| [in] | mask | - Mask indicating which bits to modify. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode(); sl_si91x_gpio_set_pin_direction();
Returns
None
371 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_set_slew_rate#
static __INLINE void sl_gpio_set_slew_rate (sl_gpio_port_t port, uint32_t slewrate, uint32_t slewrate_alt)
Set slewrate for pins on a GPIO port.
| [in] | port | - The GPIO port to configure. |
| [in] | slewrate | - The slewrate to configure for pins on this GPIO port. |
| [in] | slewrate_alt | - The slewrate to configure for pins using alternate modes on this GPIO port. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance
Returns
None
391 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_clear_pin_output#
static __INLINE void sl_gpio_clear_pin_output (sl_gpio_port_t port, uint8_t pin)
Set a single pin in GPIO configuration register to 0.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin to set. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(); for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode(); sl_si91x_gpio_set_pin_direction();
Returns
None
415 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_clear_port_output#
static __INLINE void sl_gpio_clear_port_output (sl_gpio_port_t port, uint32_t pins)
Set bits in configuration register for a port to 0.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pins | - The GPIO pins in a port to clear. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
442 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_pin_input#
static __INLINE uint8_t sl_gpio_get_pin_input (sl_gpio_port_t port, uint8_t pin)
Read the pad value for a single pin in a GPIO port.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
The GPIO pin value '0' - Output '1' - Input
472 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_pin_output#
static __INLINE uint8_t sl_gpio_get_pin_output (sl_gpio_port_t port, uint8_t pin)
Get the current setting for a pin in a GPIO configuration register.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin to get setting for. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
The GPIO pin value '0' - Output '1' - Input
501 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_port_input#
static __INLINE uint32_t sl_gpio_get_port_input (sl_gpio_port_t port)
Read the pad values for GPIO port.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
The pad values for the GPIO port.
527 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_port_output#
static __INLINE uint32_t sl_gpio_get_port_output (sl_gpio_port_t port)
Get the current setting for a GPIO configuration register.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
The port value for the requested port.
551 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_toggle_pin_output#
static __INLINE void sl_gpio_toggle_pin_output (sl_gpio_port_t port, uint8_t pin)
Toggle a single pin in GPIO port register.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pin | - The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
579 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_toggle_port_output#
static __INLINE void sl_gpio_toggle_port_output (sl_gpio_port_t port, uint32_t pins)
Toggle pins in GPIO port register.
| [in] | port | - The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4 |
| [in] | pins | - Port pins to toggle. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_si91x_gpio_enable_ulp_pad_receiver(), for ULP instance Use corresponding pad receiver API for corresponding GPIO instance. sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
606 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_enable_interrupts#
static __INLINE void sl_gpio_enable_interrupts (uint32_t flags)
Enable one or more GPIO interrupts.
| [in] | flags | - GPIO interrupt sources to enable. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
626 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_disable_interrupts#
static __INLINE void sl_gpio_disable_interrupts (uint32_t flags)
Disable one or more GPIO interrupts.
| [in] | flags | - GPIO interrupt sources to disable. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
655 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_clear_interrupts#
static __INLINE void sl_gpio_clear_interrupts (uint32_t flags)
Clear one or more pending GPIO interrupts.
| [in] | flags | - Bitwise logic OR of GPIO interrupt sources to clear. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
684 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_set_interrupts#
static __INLINE void sl_gpio_set_interrupts (uint32_t flags)
Set one or more pending GPIO interrupts from SW.
| [in] | flags | - GPIO interrupt sources to set to pending. |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
701 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_pending_interrupts#
static __INLINE uint32_t sl_gpio_get_pending_interrupts (void )
Get pending GPIO interrupts.
| [in] |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
GPIO interrupt sources pending.
719 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_enabled_interrupts#
static __INLINE uint32_t sl_gpio_get_enabled_interrupts (void )
Get enabled GPIO interrupts.
| [in] |
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
Enabled GPIO interrupt sources.
739 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hsl_gpio_get_enabled_pending_interrupts#
static __INLINE uint32_t sl_gpio_get_enabled_pending_interrupts (void )
Get enabled and pending GPIO interrupt flags.
| [in] |
Useful for handling more interrupt sources in the same interrupt handler.
sl_si91x_gpio_enable_clock()sl_si91x_gpio_enable_pad_selection(), for HP instance sl_si91x_gpio_enable_pad_receiver(), for HP instance sl_gpio_set_pin_mode()sl_si91x_gpio_set_pin_direction()
Returns
None
760 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hMacro Definition Documentation#
PAD_REG_BASE#
#define PAD_REG_BASEValue:
0x46004000UL
PAD configuration register base address.
49 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hNPSS_INT_BASE#
#define NPSS_INT_BASEValue:
0x12080000UL
UULP INTR base address.
50 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PAD_REG_BASE#
#define ULP_PAD_REG_BASEValue:
0x2404A000UL
ULP PAD configuration base address.
51 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO#
#define GPIOValue:
((EGPIO_Type *)EGPIO_BASE)
MCU HP base address.
53 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_GPIO#
#define ULP_GPIOValue:
((EGPIO_Type *)EGPIO1_BASE)
MCU ULP base address.
54 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_GPIO_FSM#
#define UULP_GPIO_FSMValue:
((MCU_FSM_Type *)MCU_FSM_BASE)
SLEEP FSM base address.
55 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_GPIO#
#define UULP_GPIOValue:
((MCU_RET_Type *)MCU_RET_BASE)
MCU retention base address.
56 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPAD_REG#
#define PAD_REGValue:
(x)
PAD configuration register for GPIO_n(n = 0 t0 63)
58 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PAD_CONFIG0_REG#
#define ULP_PAD_CONFIG0_REGValue:
((ULP_PAD_CONFIG_Type0 *)(ULP_PAD_REG_BASE + 0x0))
ULP PAD configuration register 0.
59 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PAD_CONFIG1_REG#
#define ULP_PAD_CONFIG1_REGValue:
((ULP_PAD_CONFIG_Type1 *)(ULP_PAD_REG_BASE + 0x4))
ULP PAD configuration register 1.
60 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PAD_CONFIG2_REG#
#define ULP_PAD_CONFIG2_REGValue:
((ULP_PAD_CONFIG_Type2 *)(ULP_PAD_REG_BASE + 0x8))
ULP PAD configuration register 2.
61 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PAD_CONFIG_REG#
#define UULP_PAD_CONFIG_REGValue:
(x)
UULP V_bat PAD configuration base address.
63 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPADSELECTION#
#define PADSELECTIONValue:
(*(volatile uint32_t *)(0x41300000 + 0x610))
PAD selection (0 to 21) A value of 1 on this gives control to M4SS.
65 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPADSELECTION_1#
#define PADSELECTION_1Value:
(*(volatile uint32_t *)(0x41300000 + 0x618))
PAD selection (22 to 33) A value of 1 on this gives control to M4SS.
67 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hHOST_PADS_GPIO_MODE#
#define HOST_PADS_GPIO_MODEValue:
(*(volatile uint32_t *)(0x46008000 + 0x44))
MISC host base address.
69 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PAD_CONFIG_REG#
#define ULP_PAD_CONFIG_REGValue:
(*(volatile uint32_t *)(0x2404A008))
ULP PAD register.
70 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_NPSS_INTERRUPT_MASK_SET_REG#
#define GPIO_NPSS_INTERRUPT_MASK_SET_REGValue:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x00))
NPSS mask set register base address.
72 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_NPSS_INTERRUPT_MASK_CLR_REG#
#define GPIO_NPSS_INTERRUPT_MASK_CLR_REGValue:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x04))
NPSS mask clear register base address.
74 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_NPSS_INTERRUPT_CLEAR_REG#
#define GPIO_NPSS_INTERRUPT_CLEAR_REGValue:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x08))
NPSS clear register base address.
76 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_NPSS_INTERRUPT_STATUS_REG#
#define GPIO_NPSS_INTERRUPT_STATUS_REGValue:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x0C))
NPSS status register base address.
78 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_NPSS_GPIO_CONFIG_REG#
#define GPIO_NPSS_GPIO_CONFIG_REGValue:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x10))
NPSS GPIO configuration register base address.
80 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_GPIO_STATUS#
#define UULP_GPIO_STATUSValue:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x14))
UULP GPIO status base address.
82 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_25_30_CONFIG_REG#
#define GPIO_25_30_CONFIG_REGValue:
(*(volatile uint32_t *)(0X46008000 + 0x0C))
GPIO(25-30) pin configuration register.
83 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hCLR#
#define CLRValue:
0
85 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSET#
#define SETValue:
1
86 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_DEBUG_ASSERT#
#define SL_DEBUG_ASSERT
88 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hNIBBLE_SHIFT#
#define NIBBLE_SHIFTValue:
4
Nibble shift for interrupt.
90 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hBYTE_SHIFT#
#define BYTE_SHIFTValue:
8
Byte shift for interrupt.
91 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hWORD_SHIFT#
#define WORD_SHIFTValue:
16
Word shift for interrupt.
92 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hLSB_WORD_MASK#
#define LSB_WORD_MASKValue:
0x00FF
GPIO LSB word mask.
93 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hLSB_NIBBLE_MASK#
#define LSB_NIBBLE_MASKValue:
0x0F
GPIO LSB nibble mask.
94 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hMAX_GPIO_PORT_PIN#
#define MAX_GPIO_PORT_PINValue:
16
GPIO maximum port pins.
96 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hHOST_PAD#
#define HOST_PADValue:
12
GPIO Host PAD.
97 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PA_COUNT#
#define GPIO_PA_COUNTValue:
16
GPIO port A maximum pins.
99 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PB_COUNT#
#define GPIO_PB_COUNTValue:
16
GPIO port B maximum pins.
100 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PC_COUNT#
#define GPIO_PC_COUNTValue:
16
GPIO port C maximum pins.
101 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PD_COUNT#
#define GPIO_PD_COUNTValue:
9
GPIO port D maximum pins.
102 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PE_COUNT#
#define GPIO_PE_COUNTValue:
12
GPIO port E maximum pins.
103 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PA_MASK#
#define GPIO_PA_MASKValue:
0xFFFFUL
GPIO port A mask.
105 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PB_MASK#
#define GPIO_PB_MASKValue:
0xFFFFUL
GPIO port B mask.
106 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PC_MASK#
#define GPIO_PC_MASKValue:
0xFFFFUL
GPIO port C mask.
107 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PD_MASK#
#define GPIO_PD_MASKValue:
0x01FFUL
GPIO port D mask.
108 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_PERIPHERAL_CLK#
#define SL_PERIPHERAL_CLKValue:
M4CLK
GPIO instance clock.
110 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUNUSED_VARIABLE#
#define UNUSED_VARIABLEValue:
(expr)
112 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_ASSERT#
#define SL_GPIO_ASSERTValue:
(expr)
115 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_STRENGTH#
#define SL_GPIO_VALIDATE_STRENGTHValue:
(strength)
Validate driver strength.
120 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_PARAMETER#
#define SL_GPIO_VALIDATE_PARAMETERValue:
(value)
Validate GPIO parameters.
121 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_DISABLE_STATE#
#define SL_GPIO_VALIDATE_DISABLE_STATEValue:
(disable_state)
Validate driver disable state.
122 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_PAD#
#define SL_GPIO_VALIDATE_PADValue:
(pad_num)
Validate GPIO HP pad selection.
123 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_PIN#
#define SL_GPIO_VALIDATE_PINValue:
(pin_num)
Validate GPIO HP pin number.
124 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_FLAG#
#define SL_GPIO_VALIDATE_FLAGValue:
(flag)
Validate GPIO flags.
125 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_ULP_INTR#
#define SL_GPIO_VALIDATE_ULP_INTRValue:
(ulp_intr)
Validate ULP interrupts.
126 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_ULP_PIN#
#define SL_GPIO_VALIDATE_ULP_PINValue:
(pin_num)
Validate ULP pins.
127 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_UULP_PIN#
#define SL_GPIO_VALIDATE_UULP_PINValue:
(pin_num)
Validate UULP pins.
128 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_MODE_PARAMETER#
#define SL_GPIO_VALIDATE_MODE_PARAMETERValue:
(mode)
Validate UULP, ULP mode.
129 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_UULP_INTR#
#define SL_GPIO_VALIDATE_UULP_INTRValue:
(interrupt)
Validate UULP interrupt.
130 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_PORT#
#define SL_GPIO_VALIDATE_PORTValue:
(port)
Validate GPIO port.
131 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_MODE#
#define SL_GPIO_VALIDATE_MODEValue:
(mode)
Validate GPIO mode.
132 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_INTR#
#define SL_GPIO_VALIDATE_INTRValue:
(interrupt)
Validate GPIO interrupt.
Validate GPIO port and pin
133 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_NDEBUG_PORT_PIN#
#define SL_GPIO_NDEBUG_PORT_PINValue:
135 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_VALIDATE_ULP_PORT_PIN#
#define SL_GPIO_VALIDATE_ULP_PORT_PINValue:
(port, pin)
Validate ULP port and pin.
142 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGRP_IRQ0_Handler#
#define GRP_IRQ0_HandlerValue:
IRQ050_Handler
GPIO Group Interrupt 0.
144 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGRP_IRQ1_Handler#
#define GRP_IRQ1_HandlerValue:
IRQ051_Handler
GPIO Group Interrupt 1.
145 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ0_Handler#
#define PIN_IRQ0_HandlerValue:
IRQ052_Handler
GPIO Pin Interrupt 0.
147 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ1_Handler#
#define PIN_IRQ1_HandlerValue:
IRQ053_Handler
GPIO Pin Interrupt 1.
148 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ2_Handler#
#define PIN_IRQ2_HandlerValue:
IRQ054_Handler
GPIO Pin Interrupt 2.
149 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ3_Handler#
#define PIN_IRQ3_HandlerValue:
IRQ055_Handler
GPIO Pin Interrupt 3.
150 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ4_Handler#
#define PIN_IRQ4_HandlerValue:
IRQ056_Handler
GPIO Pin Interrupt 4.
151 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ5_Handler#
#define PIN_IRQ5_HandlerValue:
IRQ057_Handler
GPIO Pin Interrupt 5.
152 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ6_Handler#
#define PIN_IRQ6_HandlerValue:
IRQ058_Handler
GPIO Pin Interrupt 6.
153 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_IRQ7_Handler#
#define PIN_IRQ7_HandlerValue:
IRQ059_Handler
GPIO Pin Interrupt 7.
154 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_IRQ_Handler#
#define UULP_PIN_IRQ_HandlerValue:
IRQ021_Handler
UULP Pin Interrupt 0.
156 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PIN_IRQ_Handler#
#define ULP_PIN_IRQ_HandlerValue:
IRQ018_Handler
ULP Pin Interrupt.
158 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_GROUP_IRQ_Handler#
#define ULP_GROUP_IRQ_HandlerValue:
IRQ019_Handler
ULP Group Interrupt.
159 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_0#
#define PIN_INTR_0Value:
0
HP GPIO pin interrupt 0.
161 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_1#
#define PIN_INTR_1Value:
1
HP GPIO pin interrupt 1.
162 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_2#
#define PIN_INTR_2Value:
2
HP GPIO pin interrupt 2.
163 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_3#
#define PIN_INTR_3Value:
3
HP GPIO pin interrupt 3.
164 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_4#
#define PIN_INTR_4Value:
4
HP GPIO pin interrupt 4.
165 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_5#
#define PIN_INTR_5Value:
5
HP GPIO pin interrupt 5.
166 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_6#
#define PIN_INTR_6Value:
6
HP GPIO pin interrupt 6.
167 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPIN_INTR_7#
#define PIN_INTR_7Value:
7
HP GPIO pin interrupt 7.
168 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_INTR_1#
#define UULP_PIN_INTR_1Value:
1
UULP GPIO pin interrupt 1.
170 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_INTR_2#
#define UULP_PIN_INTR_2Value:
2
UULP GPIO pin interrupt 2.
171 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_INTR_3#
#define UULP_PIN_INTR_3Value:
3
UULP GPIO pin interrupt 3.
172 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_INTR_4#
#define UULP_PIN_INTR_4Value:
4
UULP GPIO pin interrupt 4.
173 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_INTR_5#
#define UULP_PIN_INTR_5Value:
5
UULP GPIO pin interrupt 5.
174 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PIN_INT#
#define ULP_PIN_INTValue:
0
ULP GPIO pin interrupt.
176 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_GROUP_INT#
#define ULP_GROUP_INTValue:
0
ULP GPIO group interrupt.
177 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hMAX_GPIO_PIN_INT#
#define MAX_GPIO_PIN_INTValue:
8
Maximum HP GPIO pin interrupts.
179 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT0_NVIC_NAME#
#define PININT0_NVIC_NAMEValue:
EGPIO_PIN_0_IRQn
HP GPIO pin interrupt 0 number.
181 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT1_NVIC_NAME#
#define PININT1_NVIC_NAMEValue:
EGPIO_PIN_1_IRQn
HP GPIO pin interrupt 1 number.
182 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT2_NVIC_NAME#
#define PININT2_NVIC_NAMEValue:
EGPIO_PIN_2_IRQn
HP GPIO pin interrupt 2 number.
183 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT3_NVIC_NAME#
#define PININT3_NVIC_NAMEValue:
EGPIO_PIN_3_IRQn
HP GPIO pin interrupt 3 number.
184 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT4_NVIC_NAME#
#define PININT4_NVIC_NAMEValue:
EGPIO_PIN_4_IRQn
HP GPIO pin interrupt 4 number.
185 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT5_NVIC_NAME#
#define PININT5_NVIC_NAMEValue:
EGPIO_PIN_5_IRQn
HP GPIO pin interrupt 5 number.
186 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT6_NVIC_NAME#
#define PININT6_NVIC_NAMEValue:
EGPIO_PIN_6_IRQn
HP GPIO pin interrupt 6 number.
187 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPININT7_NVIC_NAME#
#define PININT7_NVIC_NAMEValue:
EGPIO_PIN_7_IRQn
HP GPIO pin interrupt 7 number.
188 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGROUP_0_INTERRUPT_NAME#
#define GROUP_0_INTERRUPT_NAMEValue:
EGPIO_GROUP_0_IRQn
HP GPIO group interrupt 1 number.
190 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGROUP_1_INTERRUPT_NAME#
#define GROUP_1_INTERRUPT_NAMEValue:
EGPIO_GROUP_1_IRQn
HP GPIO group interrupt 2 number.
191 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PININT0_NVIC_NAME#
#define ULP_PININT0_NVIC_NAMEValue:
ULP_EGPIO_PIN_IRQn
ULP GPIO pin interrupt number.
193 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_GROUP_INTERRUPT_NAME#
#define ULP_GROUP_INTERRUPT_NAMEValue:
ULP_EGPIO_GROUP_IRQn
ULP GPIO group interrupt number.
194 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PININT_NVIC_NAME#
#define UULP_PININT_NVIC_NAMEValue:
NPSS_TO_MCU_GPIO_INTR_IRQn
UULP GPIO pin interrupt number.
196 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_GROUP_INTERRUPT_OR#
#define SL_GPIO_GROUP_INTERRUPT_ORValue:
1
GPIO group interrupt AND/OR.
198 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_GPIO_GROUP_INTERRUPT_WAKEUP#
#define SL_GPIO_GROUP_INTERRUPT_WAKEUPValue:
4
GPIO group interrupt wakeup.
199 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hSL_ULP_GPIO_PORT#
#define SL_ULP_GPIO_PORTValue:
4
ULP GPIO port number.
200 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE0#
#define _MODE0Value:
0
GPIO mode 0.
202 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE1#
#define _MODE1Value:
1
GPIO mode 1.
203 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE2#
#define _MODE2Value:
2
GPIO mode 2.
204 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE3#
#define _MODE3Value:
3
GPIO mode 3.
205 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE4#
#define _MODE4Value:
4
GPIO mode 4.
206 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE5#
#define _MODE5Value:
5
GPIO mode 5.
207 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE6#
#define _MODE6Value:
6
GPIO mode 6.
208 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE7#
#define _MODE7Value:
7
GPIO mode 7.
209 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE8#
#define _MODE8Value:
8
GPIO mode 8.
210 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE9#
#define _MODE9Value:
9
GPIO mode 9.
211 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE10#
#define _MODE10Value:
10
GPIO mode 10.
212 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_MODE14#
#define _MODE14Value:
14
GPIO mode 14.
213 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_DISABLED#
#define _GPIO_P_MODEL_MODE0_DISABLEDValue:
0x00000000UL
Mode DISABLED for GPIO_P_MODEL.
215 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_INPUT#
#define _GPIO_P_MODEL_MODE0_INPUTValue:
0x00000001UL
Mode INPUT for GPIO_P_MODEL.
216 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_INPUTPULL#
#define _GPIO_P_MODEL_MODE0_INPUTPULLValue:
0x00000002UL
Mode INPUTPULL for GPIO_P_MODEL.
217 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_INPUTPULLFILTER#
#define _GPIO_P_MODEL_MODE0_INPUTPULLFILTERValue:
0x00000003UL
Mode INPUTPULLFILTER for GPIO_P_MODEL.
218 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_PUSHPULL#
#define _GPIO_P_MODEL_MODE0_PUSHPULLValue:
0x00000004UL
Mode PUSHPULL for GPIO_P_MODEL.
219 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_PUSHPULLALT#
#define _GPIO_P_MODEL_MODE0_PUSHPULLALTValue:
0x00000005UL
Mode PUSHPULLALT for GPIO_P_MODEL.
220 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDOR#
#define _GPIO_P_MODEL_MODE0_WIREDORValue:
0x00000006UL
Mode WIREDOR for GPIO_P_MODEL.
221 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN#
#define _GPIO_P_MODEL_MODE0_WIREDORPULLDOWNValue:
0x00000007UL
Mode WIREDORPULLDOWN for GPIO_P_MODEL.
222 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDAND#
#define _GPIO_P_MODEL_MODE0_WIREDANDValue:
0x00000008UL
Mode WIREDAND for GPIO_P_MODEL.
223 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDFILTER#
#define _GPIO_P_MODEL_MODE0_WIREDANDFILTERValue:
0x00000009UL
Mode WIREDANDFILTER for GPIO_P_MODEL.
224 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDPULLUP#
#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPValue:
0x0000000AUL
Mode WIREDANDPULLUP for GPIO_P_MODEL.
225 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER#
#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTERValue:
0x0000000BUL
Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.
226 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDALT#
#define _GPIO_P_MODEL_MODE0_WIREDANDALTValue:
0x0000000CUL
Mode WIREDANDALT for GPIO_P_MODEL.
227 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER#
#define _GPIO_P_MODEL_MODE0_WIREDANDALTFILTERValue:
0x0000000DUL
Mode WIREDANDALTFILTER for GPIO_P_MODEL.
228 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP#
#define _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPValue:
0x0000000EUL
Mode WIREDANDALTPULLUP for GPIO_P_MODEL.
229 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER#
#define _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTERValue:
0x0000000FUL
Mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.
230 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_DISABLED#
#define GPIO_P_MODEL_MODE0_DISABLEDValue:
(_GPIO_P_MODEL_MODE0_DISABLED << 0)
Shifted mode DISABLED for GPIO_P_MODEL.
232 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_INPUT#
#define GPIO_P_MODEL_MODE0_INPUTValue:
(_GPIO_P_MODEL_MODE0_INPUT << 0)
Shifted mode INPUT for GPIO_P_MODEL.
233 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_INPUTPULL#
#define GPIO_P_MODEL_MODE0_INPUTPULLValue:
(_GPIO_P_MODEL_MODE0_INPUTPULL << 0)
Shifted mode INPUTPULL for GPIO_P_MODEL.
234 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_INPUTPULLFILTER#
#define GPIO_P_MODEL_MODE0_INPUTPULLFILTERValue:
(_GPIO_P_MODEL_MODE0_INPUTPULLFILTER << 0)
Shifted mode INPUTPULLFILTER for GPIO_P_MODEL.
235 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_PUSHPULL#
#define GPIO_P_MODEL_MODE0_PUSHPULLValue:
(_GPIO_P_MODEL_MODE0_PUSHPULL << 0)
Shifted mode PUSHPULL for GPIO_P_MODEL.
237 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_PUSHPULLALT#
#define GPIO_P_MODEL_MODE0_PUSHPULLALTValue:
(_GPIO_P_MODEL_MODE0_PUSHPULLALT << 0)
Shifted mode PUSHPULLALT for GPIO_P_MODEL.
238 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDOR#
#define GPIO_P_MODEL_MODE0_WIREDORValue:
(_GPIO_P_MODEL_MODE0_WIREDOR << 0)
Shifted mode WIREDOR for GPIO_P_MODEL.
240 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDORPULLDOWN#
#define GPIO_P_MODEL_MODE0_WIREDORPULLDOWNValue:
(_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN << 0)
Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL.
241 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDAND#
#define GPIO_P_MODEL_MODE0_WIREDANDValue:
(_GPIO_P_MODEL_MODE0_WIREDAND << 0)
Shifted mode WIREDAND for GPIO_P_MODEL.
243 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDFILTER#
#define GPIO_P_MODEL_MODE0_WIREDANDFILTERValue:
(_GPIO_P_MODEL_MODE0_WIREDANDFILTER << 0)
Shifted mode WIREDANDFILTER for GPIO_P_MODEL.
244 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDPULLUP#
#define GPIO_P_MODEL_MODE0_WIREDANDPULLUPValue:
(_GPIO_P_MODEL_MODE0_WIREDANDPULLUP << 0)
Shifted mode WIREDANDPULLUP for GPIO_P_MODEL.
246 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER#
#define GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTERValue:
(_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER << 0)
Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.
248 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDALT#
#define GPIO_P_MODEL_MODE0_WIREDANDALTValue:
(_GPIO_P_MODEL_MODE0_WIREDANDALT << 0)
Shifted mode WIREDANDALT for GPIO_P_MODEL.
250 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDALTFILTER#
#define GPIO_P_MODEL_MODE0_WIREDANDALTFILTERValue:
(_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER << 0)
Shifted mode WIREDANDALTFILTER for GPIO_P_MODEL.
252 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDALTPULLUP#
#define GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPValue:
(_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP << 0)
Shifted mode WIREDANDALTPULLUP for GPIO_P_MODEL.
254 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER#
#define GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTERValue:
(_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER << 0)
Shifted mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.
256 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PAD_0#
#define GPIO_PAD_0Value:
0
GPIO PAD number 0.
259 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PAD_3#
#define GPIO_PAD_3Value:
3
GPIO PAD number 3.
260 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PAD_4#
#define GPIO_PAD_4Value:
4
GPIO PAD number 4.
261 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PAD_7#
#define GPIO_PAD_7Value:
7
GPIO PAD number 7.
262 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hGPIO_PAD_8#
#define GPIO_PAD_8Value:
8
GPIO PAD number 8.
263 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPAD_SELECT#
#define PAD_SELECTValue:
22
GPIO Host PAD number 22.
265 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hHOST_PAD_MIN#
#define HOST_PAD_MINValue:
25
GPIO Host PAD number 25.
266 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hHOST_PAD_MAX#
#define HOST_PAD_MAXValue:
30
GPIO Host PAD number 30.
267 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPRIORITY_14#
#define PRIORITY_14Value:
14
GPIO Interrupt priority 14.
269 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPRIORITY_15#
#define PRIORITY_15Value:
15
GPIO Interrupt priority 15.
270 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hULP_PORT_NUM#
#define ULP_PORT_NUMValue:
0
GPIO ULP port number.
272 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hUULP_PIN_MASK#
#define UULP_PIN_MASKValue:
0x1F
GPIO UULP pin mask.
273 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hBIT_0#
#define BIT_0Value:
0
GPIO bit 0 in configuration register.
275 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hBIT_8#
#define BIT_8Value:
8
GPIO bit 8 in configuration register.
276 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hBIT_16#
#define BIT_16Value:
16
GPIO bit 16 in configuration register.
277 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hBIT_24#
#define BIT_24Value:
24
GPIO bit 24 in configuration register.
278 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hPORT_MASK#
#define PORT_MASKValue:
0xFFFF
GPIO port mask.
280 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hINTR_CLR#
#define INTR_CLRValue:
0x07
GPIO interrupt clear.
281 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hINTERRUPT_MASK#
#define INTERRUPT_MASKValue:
0x0F
GPIO interrupt mask.
282 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hMASK_CTRL#
#define MASK_CTRLValue:
0x03
283 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.hMASK_INTR#
#define MASK_INTRValue:
0x01
GPIO interrupt mask.
284 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_gpio_brd4325a.h_GPIO_PORT_A_PIN_COUNT#
#define _GPIO_PORT_A_PIN_COUNTValue:
GPIO_PA_COUNT
GPIO port A maximum pins.
49 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_B_PIN_COUNT#
#define _GPIO_PORT_B_PIN_COUNTValue:
GPIO_PB_COUNT
GPIO port B maximum pins.
50 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_C_PIN_COUNT#
#define _GPIO_PORT_C_PIN_COUNTValue:
GPIO_PC_COUNT
GPIO port C maximum pins.
51 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_D_PIN_COUNT#
#define _GPIO_PORT_D_PIN_COUNTValue:
GPIO_PD_COUNT
GPIO port D maximum pins.
52 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_E_PIN_COUNT#
#define _GPIO_PORT_E_PIN_COUNTValue:
0
53 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_F_PIN_COUNT#
#define _GPIO_PORT_F_PIN_COUNTValue:
0
54 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_G_PIN_COUNT#
#define _GPIO_PORT_G_PIN_COUNTValue:
0
55 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_H_PIN_COUNT#
#define _GPIO_PORT_H_PIN_COUNTValue:
0
56 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_I_PIN_COUNT#
#define _GPIO_PORT_I_PIN_COUNTValue:
0
57 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_J_PIN_COUNT#
#define _GPIO_PORT_J_PIN_COUNTValue:
0
58 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_K_PIN_COUNT#
#define _GPIO_PORT_K_PIN_COUNTValue:
0
59 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_A_PIN_MASK#
#define _GPIO_PORT_A_PIN_MASKValue:
(GPIO_PA_MASK)
GPIO port A pin mask.
61 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_B_PIN_MASK#
#define _GPIO_PORT_B_PIN_MASKValue:
(GPIO_PB_MASK)
GPIO port B pin mask.
62 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_C_PIN_MASK#
#define _GPIO_PORT_C_PIN_MASKValue:
(GPIO_PC_MASK)
GPIO port C pin mask.
63 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_D_PIN_MASK#
#define _GPIO_PORT_D_PIN_MASKValue:
(GPIO_PD_MASK)
GPIO port D pin mask.
64 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_E_PIN_MASK#
#define _GPIO_PORT_E_PIN_MASKValue:
0x0000UL
65 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_F_PIN_MASK#
#define _GPIO_PORT_F_PIN_MASKValue:
0x0000UL
66 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_G_PIN_MASK#
#define _GPIO_PORT_G_PIN_MASKValue:
0x0000UL
67 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_H_PIN_MASK#
#define _GPIO_PORT_H_PIN_MASKValue:
0x0000UL
68 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_I_PIN_MASK#
#define _GPIO_PORT_I_PIN_MASKValue:
0x0000UL
69 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_J_PIN_MASK#
#define _GPIO_PORT_J_PIN_MASKValue:
0x0000UL
70 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_K_PIN_MASK#
#define _GPIO_PORT_K_PIN_MASKValue:
0x0000UL
GPIO pins selection for selected port.
71 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_SIZE#
#define _GPIO_PORT_SIZEValue:
GPIO pins mask for selected port.
74 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h_GPIO_PORT_MASK#
#define _GPIO_PORT_MASKValue:
89 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hSL_GPIO_PORT_VALID#
#define SL_GPIO_PORT_VALIDValue:
(port)
Validation of GPIO port.
103 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hSL_GPIO_PORT_PIN_VALID#
#define SL_GPIO_PORT_PIN_VALIDValue:
(port, pin)
Validating GPIO port and pin.
105 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hGPIO_PIN_MAX#
#define GPIO_PIN_MAXValue:
15
Highest GPIO pin number.
108 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hGPIO_PORT_MAX#
#define GPIO_PORT_MAXValue:
3
Highest GPIO port number.
126 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.hGPIO_EXTINTNO_MAX#
#define GPIO_EXTINTNO_MAXValue:
15
Highest EXT GPIO interrupt number.
131 of file components/siwx917_soc/drivers/unified_api/inc/sl_si91x_peripheral_gpio.h