General-Purpose Input-Output#

Includes.

Modules#

PAD_CONFIG_Type

UULP_PAD_CONFIG_Type

ULP_PAD_CONFIG_Type0

ULP_PAD_CONFIG_Type1

ULP_PAD_CONFIG_Type2

Enumerations#

enum
sl_gpio_port_t {
SL_GPIO_PORT_A = 0
SL_GPIO_PORT_B = 1
SL_GPIO_PORT_C = 2
SL_GPIO_PORT_D = 3
}

GPIO ports IDs.

enum
sl_gpio_mode_t {
SL_GPIO_MODE_0 = _MODE0
SL_GPIO_MODE_1 = _MODE1
SL_GPIO_MODE_2 = _MODE2
SL_GPIO_MODE_3 = _MODE3
SL_GPIO_MODE_4 = _MODE4
SL_GPIO_MODE_5 = _MODE5
SL_GPIO_MODE_6 = _MODE6
SL_GPIO_MODE_7 = _MODE7
SL_GPIO_MODE_8 = _MODE8
SL_GPIO_MODE_9 = _MODE9
SL_GPIO_MODE_10 = _MODE10
SL_GPIO_MODE_14 = _MODE14
SL_GPIO_MODE_DISABLED = _GPIO_P_MODEL_MODE0_DISABLED
SL_GPIO_MODE_INPUT = _GPIO_P_MODEL_MODE0_INPUT
SL_GPIO_MODE_INPUT_PULL = _GPIO_P_MODEL_MODE0_INPUTPULL
SL_GPIO_MODE_INPUT_PULL_FILTER = _GPIO_P_MODEL_MODE0_INPUTPULLFILTER
SL_GPIO_MODE_PUSH_PULL = _GPIO_P_MODEL_MODE0_PUSHPULL
SL_GPIO_MODE_PUSH_PULL_ALTERNATE = _GPIO_P_MODEL_MODE0_PUSHPULLALT
SL_GPIO_MODE_WIRED_OR = _GPIO_P_MODEL_MODE0_WIREDOR
SL_GPIO_MODE_WIRED_OR_PULL_DOWN = _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN
SL_GPIO_MODE_WIRED_AND = _GPIO_P_MODEL_MODE0_WIREDAND
SL_GPIO_MODE_WIRED_AND_FILTER = _GPIO_P_MODEL_MODE0_WIREDANDFILTER
SL_GPIO_MODE_WIRED_AND_PULLUP = _GPIO_P_MODEL_MODE0_WIREDANDPULLUP
SL_GPIO_MODE_WIRED_AND_PULLUP_FILTER = _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER
SL_GPIO_MODE_WIRED_AND_ALTERNATE = _GPIO_P_MODEL_MODE0_WIREDANDALT
SL_GPIO_MODE_WIRED_AND_ALTERNATE_FILTER = _GPIO_P_MODEL_MODE0_WIREDANDALTFILTER
SL_GPIO_MODE_WIRED_AND_ALTERNATE_PULLUP = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP
SL_GPIO_MODE_WIRED_AND_ALTERNATE_PULLUP_FILTER = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER
}

GPIO Pin Modes.

enum
sl_gpio_interrupt_flag_t {
SL_GPIO_INTERRUPT_DISABLE = 0
SL_GPIO_INTERRUPT_ENABLE = (1 << 0)
SL_GPIO_INTERRUPT_RISING_EDGE = (1 << 1)
SL_GPIO_INTERRUPT_FALLING_EDGE = (1 << 2)
}

GPIO Interrupt Configurations.

Functions#

void
sl_gpio_configure_interrupt(sl_gpio_port_t port, uint8_t pin, uint32_t int_no, sl_gpio_interrupt_flag_t flags)

Configure the GPIO pin interrupt.

void
sl_gpio_set_pin_mode(sl_gpio_port_t port, uint8_t pin, sl_gpio_mode_t mode, uint32_t output_value)

Set the pin mode for a GPIO pin.

sl_gpio_mode_t
sl_gpio_get_pin_mode(sl_gpio_port_t port, uint8_t pin)

Get the GPIO pin status.

__INLINE void
sl_gpio_set_pin_output(sl_gpio_port_t port, uint8_t pin)

Set a single pin in GPIO configuration register to 1.

__INLINE void
sl_gpio_set_port_output(sl_gpio_port_t port, uint32_t pins)

Set bits GPIO data out register to 1.

__INLINE void
sl_gpio_set_port_output_value(sl_gpio_port_t port, uint32_t val, uint32_t mask)

Set GPIO port configuration register.

__INLINE void
sl_gpio_set_slew_rate(sl_gpio_port_t port, uint32_t slewrate, uint32_t slewrate_alt)

Set slewrate for pins on a GPIO port.

__INLINE void
sl_gpio_clear_pin_output(sl_gpio_port_t port, uint8_t pin)

Set a single pin in GPIO configuration register to 0.

__INLINE void
sl_gpio_clear_port_output(sl_gpio_port_t port, uint32_t pins)

Set bits in configuration register for a port to 0.

__INLINE uint8_t
sl_gpio_get_pin_input(sl_gpio_port_t port, uint8_t pin)

Read the pad value for a single pin in a GPIO port.

__INLINE uint8_t
sl_gpio_get_pin_output(sl_gpio_port_t port, uint8_t pin)

Get the current setting for a pin in a GPIO configuration register.

__INLINE uint32_t
sl_gpio_get_port_input(sl_gpio_port_t port)

Read the pad values for GPIO port.

__INLINE uint32_t
sl_gpio_get_port_output(sl_gpio_port_t port)

Get the current setting for a GPIO configuration register.

__INLINE void
sl_gpio_toggle_pin_output(sl_gpio_port_t port, uint8_t pin)

Toggle a single pin in GPIO port register.

__INLINE void
sl_gpio_toggle_port_output(sl_gpio_port_t port, uint32_t pins)

Toggle pins in GPIO port register.

__INLINE void
sl_gpio_enable_interrupts(uint32_t flags)

Enable one or more GPIO interrupts.

__INLINE void
sl_gpio_disable_interrupts(uint32_t flags)

Disable one or more GPIO interrupts.

__INLINE void
sl_gpio_clear_interrupts(uint32_t flags)

Clear one or more pending GPIO interrupts.

__INLINE void
sl_gpio_set_interrupts(uint32_t flags)

Set one or more pending GPIO interrupts from SW.

__INLINE uint32_t
sl_gpio_get_pending_interrupts(void)

Get pending GPIO interrupts.

__INLINE uint32_t
sl_gpio_get_enabled_interrupts(void)

Get enabled GPIO interrupts.

__INLINE uint32_t
sl_gpio_get_enabled_pending_interrupts(void)

Get enabled and pending GPIO interrupt flags.

Macros#

#define
PAD_REG_BASE 0x46004000UL

PAD configuration register base address.

#define
NPSS_INT_BASE 0x12080000UL

UULP INTR base address.

#define
ULP_PAD_REG_BASE 0x2404A000UL

ULP PAD configuration base address.

#define
GPIO ((EGPIO_Type *)EGPIO_BASE)

MCU HP base address.

#define
ULP_GPIO ((EGPIO_Type *)EGPIO1_BASE)

MCU ULP base address.

#define
UULP_GPIO_FSM ((MCU_FSM_Type *)MCU_FSM_BASE)

SLEEP FSM base address.

#define
UULP_GPIO ((MCU_RET_Type *)MCU_RET_BASE)

MCU retention base address.

#define
PAD_REG (x)

PAD configuration register for GPIO_n(n = 0 t0 63)

#define
ULP_PAD_CONFIG0_REG ((ULP_PAD_CONFIG_Type0 *)(ULP_PAD_REG_BASE + 0x0))

ULP PAD configuration register 0.

#define
ULP_PAD_CONFIG1_REG ((ULP_PAD_CONFIG_Type1 *)(ULP_PAD_REG_BASE + 0x4))

ULP PAD configuration register 1.

#define
ULP_PAD_CONFIG2_REG ((ULP_PAD_CONFIG_Type2 *)(ULP_PAD_REG_BASE + 0x8))

ULP PAD configuration register 2.

#define
UULP_PAD_CONFIG_REG (x)

UULP V_bat PAD configuration base address.

#define
PADSELECTION (*(volatile uint32_t *)(0x41300000 + 0x610))

PAD selection (0 to 21) A value of 1 on this gives control to M4SS.

#define
PADSELECTION_1 (*(volatile uint32_t *)(0x41300000 + 0x618))

PAD selection (22 to 33) A value of 1 on this gives control to M4SS.

#define
HOST_PADS_GPIO_MODE (*(volatile uint32_t *)(0x46008000 + 0x44))

MISC host base address.

#define
ULP_PAD_CONFIG_REG (*(volatile uint32_t *)(0x2404A008))

ULP PAD register.

#define
GPIO_NPSS_INTERRUPT_MASK_SET_REG (*(volatile uint32_t *)(NPSS_INT_BASE + 0x00))

NPSS mask set register base address.

#define
GPIO_NPSS_INTERRUPT_MASK_CLR_REG (*(volatile uint32_t *)(NPSS_INT_BASE + 0x04))

NPSS mask clear register base address.

#define
GPIO_NPSS_INTERRUPT_CLEAR_REG (*(volatile uint32_t *)(NPSS_INT_BASE + 0x08))

NPSS clear register base address.

#define
GPIO_NPSS_INTERRUPT_STATUS_REG (*(volatile uint32_t *)(NPSS_INT_BASE + 0x0C))

NPSS status register base address.

#define
GPIO_NPSS_GPIO_CONFIG_REG (*(volatile uint32_t *)(NPSS_INT_BASE + 0x10))

NPSS GPIO configuration register base address.

#define
UULP_GPIO_STATUS (*(volatile uint32_t *)(NPSS_INT_BASE + 0x14))

UULP GPIO status base address.

#define
GPIO_25_30_CONFIG_REG (*(volatile uint32_t *)(0X46008000 + 0x0C))

GPIO(25-30) pin configuration register.

#define
CLR 0
#define
SET 1
#define
NIBBLE_SHIFT 4

Nibble shift for interrupt.

#define
BYTE_SHIFT 8

Byte shift for interrupt.

#define
WORD_SHIFT 16

Word shift for interrupt.

#define
LSB_WORD_MASK 0x00FF

GPIO LSB word mask.

#define
LSB_NIBBLE_MASK 0x0F

GPIO LSB nibble mask.

#define
MAX_GPIO_PORT_PIN 16

GPIO maximum port pins.

#define
HOST_PAD 12

GPIO Host PAD.

#define
GPIO_PA_COUNT 16

GPIO port A maximum pins.

#define
GPIO_PB_COUNT 16

GPIO port B maximum pins.

#define
GPIO_PC_COUNT 16

GPIO port C maximum pins.

#define
GPIO_PD_COUNT 9

GPIO port D maximum pins.

#define
GPIO_PE_COUNT 12

GPIO port E maximum pins.

#define
GPIO_PA_MASK 0xFFFFUL

GPIO port A mask.

#define
GPIO_PB_MASK 0xFFFFUL

GPIO port B mask.

#define
GPIO_PC_MASK 0xFFFFUL

GPIO port C mask.

#define
GPIO_PD_MASK 0x01FFUL

GPIO port D mask.

#define
SL_PERIPHERAL_CLK M4CLK

GPIO instance clock.

#define
UNUSED_VARIABLE (expr)
#define
SL_GPIO_ASSERT (expr)
#define
SL_GPIO_VALIDATE_STRENGTH (strength)

Validate driver strength.

#define
SL_GPIO_VALIDATE_PARAMETER (value)

Validate GPIO parameters.

#define
SL_GPIO_VALIDATE_DISABLE_STATE (disable_state)

Validate driver disable state.

#define
SL_GPIO_VALIDATE_PAD (pad_num)

Validate GPIO HP pad selection.

#define
SL_GPIO_VALIDATE_PIN (pin_num)

Validate GPIO HP pin number.

#define
SL_GPIO_VALIDATE_FLAG (flag)

Validate GPIO flags.

#define
SL_GPIO_VALIDATE_ULP_INTR (ulp_intr)

Validate ULP interrupts.

#define
SL_GPIO_VALIDATE_ULP_PIN (pin_num)

Validate ULP pins.

#define
SL_GPIO_VALIDATE_UULP_PIN (pin_num)

Validate UULP pins.

#define
SL_GPIO_VALIDATE_MODE_PARAMETER (mode)

Validate UULP, ULP mode.

#define
SL_GPIO_VALIDATE_UULP_INTR (interrupt)

Validate UULP interrupt.

#define
SL_GPIO_VALIDATE_PORT (port)

Validate GPIO port.

#define
SL_GPIO_VALIDATE_MODE (mode)

Validate GPIO mode.

#define
SL_GPIO_VALIDATE_INTR (interrupt)

Validate GPIO interrupt.

#define
SL_GPIO_NDEBUG_PORT_PIN (port, pin)
#define
SL_GPIO_VALIDATE_ULP_PORT_PIN (port, pin)

Validate ULP port and pin.

#define
GRP_IRQ0_Handler IRQ050_Handler

GPIO Group Interrupt 0.

#define
GRP_IRQ1_Handler IRQ051_Handler

GPIO Group Interrupt 1.

#define
PIN_IRQ0_Handler IRQ052_Handler

GPIO Pin Interrupt 0.

#define
PIN_IRQ1_Handler IRQ053_Handler

GPIO Pin Interrupt 1.

#define
PIN_IRQ2_Handler IRQ054_Handler

GPIO Pin Interrupt 2.

#define
PIN_IRQ3_Handler IRQ055_Handler

GPIO Pin Interrupt 3.

#define
PIN_IRQ4_Handler IRQ056_Handler

GPIO Pin Interrupt 4.

#define
PIN_IRQ5_Handler IRQ057_Handler

GPIO Pin Interrupt 5.

#define
PIN_IRQ6_Handler IRQ058_Handler

GPIO Pin Interrupt 6.

#define
PIN_IRQ7_Handler IRQ059_Handler

GPIO Pin Interrupt 7.

#define
UULP_PIN_IRQ_Handler IRQ021_Handler

UULP Pin Interrupt 0.

#define
ULP_PIN_IRQ_Handler IRQ018_Handler

ULP Pin Interrupt.

#define
ULP_GROUP_IRQ_Handler IRQ019_Handler

ULP Group Interrupt.

#define
PIN_INTR_0 0

HP GPIO pin interrupt 0.

#define
PIN_INTR_1 1

HP GPIO pin interrupt 1.

#define
PIN_INTR_2 2

HP GPIO pin interrupt 2.

#define
PIN_INTR_3 3

HP GPIO pin interrupt 3.

#define
PIN_INTR_4 4

HP GPIO pin interrupt 4.

#define
PIN_INTR_5 5

HP GPIO pin interrupt 5.

#define
PIN_INTR_6 6

HP GPIO pin interrupt 6.

#define
PIN_INTR_7 7

HP GPIO pin interrupt 7.

#define
UULP_PIN_INTR_1 1

UULP GPIO pin interrupt 1.

#define
UULP_PIN_INTR_2 2

UULP GPIO pin interrupt 2.

#define
UULP_PIN_INTR_3 3

UULP GPIO pin interrupt 3.

#define
UULP_PIN_INTR_4 4

UULP GPIO pin interrupt 4.

#define
UULP_PIN_INTR_5 5

UULP GPIO pin interrupt 5.

#define
ULP_PIN_INT 0

ULP GPIO pin interrupt.

#define
ULP_GROUP_INT 0

ULP GPIO group interrupt.

#define
MAX_GPIO_PIN_INT 8

Maximum HP GPIO pin interrupts.

#define
PININT0_NVIC_NAME EGPIO_PIN_0_IRQn

HP GPIO pin interrupt 0 number.

#define
PININT1_NVIC_NAME EGPIO_PIN_1_IRQn

HP GPIO pin interrupt 1 number.

#define
PININT2_NVIC_NAME EGPIO_PIN_2_IRQn

HP GPIO pin interrupt 2 number.

#define
PININT3_NVIC_NAME EGPIO_PIN_3_IRQn

HP GPIO pin interrupt 3 number.

#define
PININT4_NVIC_NAME EGPIO_PIN_4_IRQn

HP GPIO pin interrupt 4 number.

#define
PININT5_NVIC_NAME EGPIO_PIN_5_IRQn

HP GPIO pin interrupt 5 number.

#define
PININT6_NVIC_NAME EGPIO_PIN_6_IRQn

HP GPIO pin interrupt 6 number.

#define
PININT7_NVIC_NAME EGPIO_PIN_7_IRQn

HP GPIO pin interrupt 7 number.

#define
GROUP_0_INTERRUPT_NAME EGPIO_GROUP_0_IRQn

HP GPIO group interrupt 1 number.

#define
GROUP_1_INTERRUPT_NAME EGPIO_GROUP_1_IRQn

HP GPIO group interrupt 2 number.

#define
ULP_PININT0_NVIC_NAME ULP_EGPIO_PIN_IRQn

ULP GPIO pin interrupt number.

#define
ULP_GROUP_INTERRUPT_NAME ULP_EGPIO_GROUP_IRQn

ULP GPIO group interrupt number.

#define
UULP_PININT_NVIC_NAME NPSS_TO_MCU_GPIO_INTR_IRQn

UULP GPIO pin interrupt number.

#define
SL_GPIO_GROUP_INTERRUPT_OR 1

GPIO group interrupt AND/OR.

#define
SL_GPIO_GROUP_INTERRUPT_WAKEUP 4

GPIO group interrupt wakeup.

#define
SL_ULP_GPIO_PORT 4

ULP GPIO port number.

#define
_MODE0 0

GPIO mode 0.

#define
_MODE1 1

GPIO mode 1.

#define
_MODE2 2

GPIO mode 2.

#define
_MODE3 3

GPIO mode 3.

#define
_MODE4 4

GPIO mode 4.

#define
_MODE5 5

GPIO mode 5.

#define
_MODE6 6

GPIO mode 6.

#define
_MODE7 7

GPIO mode 7.

#define
_MODE8 8

GPIO mode 8.

#define
_MODE9 9

GPIO mode 9.

#define
_MODE10 10

GPIO mode 10.

#define
_MODE14 14

GPIO mode 14.

#define
_GPIO_P_MODEL_MODE0_DISABLED 0x00000000UL

Mode DISABLED for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_INPUT 0x00000001UL

Mode INPUT for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_INPUTPULL 0x00000002UL

Mode INPUTPULL for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_INPUTPULLFILTER 0x00000003UL

Mode INPUTPULLFILTER for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_PUSHPULL 0x00000004UL

Mode PUSHPULL for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_PUSHPULLALT 0x00000005UL

Mode PUSHPULLALT for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDOR 0x00000006UL

Mode WIREDOR for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN 0x00000007UL

Mode WIREDORPULLDOWN for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDAND 0x00000008UL

Mode WIREDAND for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDFILTER 0x00000009UL

Mode WIREDANDFILTER for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDPULLUP 0x0000000AUL

Mode WIREDANDPULLUP for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER 0x0000000BUL

Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDALT 0x0000000CUL

Mode WIREDANDALT for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER 0x0000000DUL

Mode WIREDANDALTFILTER for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP 0x0000000EUL

Mode WIREDANDALTPULLUP for GPIO_P_MODEL.

#define
_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER 0x0000000FUL

Mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_DISABLED (_GPIO_P_MODEL_MODE0_DISABLED << 0)

Shifted mode DISABLED for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_INPUT (_GPIO_P_MODEL_MODE0_INPUT << 0)

Shifted mode INPUT for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_INPUTPULL (_GPIO_P_MODEL_MODE0_INPUTPULL << 0)

Shifted mode INPUTPULL for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_INPUTPULLFILTER (_GPIO_P_MODEL_MODE0_INPUTPULLFILTER << 0)

Shifted mode INPUTPULLFILTER for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_PUSHPULL (_GPIO_P_MODEL_MODE0_PUSHPULL << 0)

Shifted mode PUSHPULL for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_PUSHPULLALT (_GPIO_P_MODEL_MODE0_PUSHPULLALT << 0)

Shifted mode PUSHPULLALT for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDOR (_GPIO_P_MODEL_MODE0_WIREDOR << 0)

Shifted mode WIREDOR for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDORPULLDOWN (_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN << 0)

Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDAND (_GPIO_P_MODEL_MODE0_WIREDAND << 0)

Shifted mode WIREDAND for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDFILTER (_GPIO_P_MODEL_MODE0_WIREDANDFILTER << 0)

Shifted mode WIREDANDFILTER for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDPULLUP (_GPIO_P_MODEL_MODE0_WIREDANDPULLUP << 0)

Shifted mode WIREDANDPULLUP for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER (_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER << 0)

Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDALT (_GPIO_P_MODEL_MODE0_WIREDANDALT << 0)

Shifted mode WIREDANDALT for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDALTFILTER (_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER << 0)

Shifted mode WIREDANDALTFILTER for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP (_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP << 0)

Shifted mode WIREDANDALTPULLUP for GPIO_P_MODEL.

#define
GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER (_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER << 0)

Shifted mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.

#define
GPIO_PAD_0 0

GPIO PAD number 0.

#define
GPIO_PAD_3 3

GPIO PAD number 3.

#define
GPIO_PAD_4 4

GPIO PAD number 4.

#define
GPIO_PAD_7 7

GPIO PAD number 7.

#define
GPIO_PAD_8 8

GPIO PAD number 8.

#define
PAD_SELECT 22

GPIO Host PAD number 22.

#define
HOST_PAD_MIN 25

GPIO Host PAD number 25.

#define
HOST_PAD_MAX 30

GPIO Host PAD number 30.

#define
PRIORITY_14 14

GPIO Interrupt priority 14.

#define
PRIORITY_15 15

GPIO Interrupt priority 15.

#define
ULP_PORT_NUM 0

GPIO ULP port number.

#define
UULP_PIN_MASK 0x1F

GPIO UULP pin mask.

#define
BIT_0 0

GPIO bit 0 in configuration register.

#define
BIT_8 8

GPIO bit 8 in configuration register.

#define
BIT_16 16

GPIO bit 16 in configuration register.

#define
BIT_24 24

GPIO bit 24 in configuration register.

#define
PORT_MASK 0xFFFF

GPIO port mask.

#define
INTR_CLR 0x07

GPIO interrupt clear.

#define
INTERRUPT_MASK 0x0F

GPIO interrupt mask.

#define
MASK_CTRL 0x03
#define
MASK_INTR 0x01

GPIO interrupt mask.

#define
_GPIO_PORT_A_PIN_COUNT GPIO_PA_COUNT

GPIO port A maximum pins.

#define
_GPIO_PORT_B_PIN_COUNT GPIO_PB_COUNT

GPIO port B maximum pins.

#define
_GPIO_PORT_C_PIN_COUNT GPIO_PC_COUNT

GPIO port C maximum pins.

#define
_GPIO_PORT_D_PIN_COUNT GPIO_PD_COUNT

GPIO port D maximum pins.

#define
_GPIO_PORT_A_PIN_MASK (GPIO_PA_MASK)

GPIO port A pin mask.

#define
_GPIO_PORT_B_PIN_MASK (GPIO_PB_MASK)

GPIO port B pin mask.

#define
_GPIO_PORT_C_PIN_MASK (GPIO_PC_MASK)

GPIO port C pin mask.

#define
_GPIO_PORT_D_PIN_MASK (GPIO_PD_MASK)

GPIO port D pin mask.

#define
_GPIO_PORT_E_PIN_MASK 0x0000UL
#define
_GPIO_PORT_F_PIN_MASK 0x0000UL
#define
_GPIO_PORT_G_PIN_MASK 0x0000UL
#define
_GPIO_PORT_H_PIN_MASK 0x0000UL
#define
_GPIO_PORT_I_PIN_MASK 0x0000UL
#define
_GPIO_PORT_J_PIN_MASK 0x0000UL
#define
_GPIO_PORT_K_PIN_MASK 0x0000UL

GPIO pins selection for selected port.

#define
_GPIO_PORT_SIZE (port)

GPIO pins mask for selected port.

#define
_GPIO_PORT_MASK (port)
#define
SL_GPIO_PORT_VALID (port)

Validation of GPIO port.

#define
SL_GPIO_PORT_PIN_VALID (port, pin)

Validating GPIO port and pin.

#define
GPIO_PIN_MAX 15

Highest GPIO pin number.

#define
GPIO_PORT_MAX 3

Highest GPIO port number.

#define
GPIO_EXTINTNO_MAX 15

Highest EXT GPIO interrupt number.

Enumeration Documentation#

sl_gpio_port_t#

sl_gpio_port_t

GPIO ports IDs.

Enumerator
SL_GPIO_PORT_A

GPIO Port A.

SL_GPIO_PORT_B

GPIO Port B.

SL_GPIO_PORT_C

GPIO Port C.

SL_GPIO_PORT_D

GPIO Port D.


sl_gpio_mode_t#

sl_gpio_mode_t

GPIO Pin Modes.

Enumerator
SL_GPIO_MODE_0

Pin MUX GPIO Mode 0.

SL_GPIO_MODE_1

Pin MUX GPIO Mode 1.

SL_GPIO_MODE_2

Pin MUX GPIO Mode 2.

SL_GPIO_MODE_3

Pin MUX GPIO Mode 3.

SL_GPIO_MODE_4

Pin MUX GPIO Mode 4.

SL_GPIO_MODE_5

Pin MUX GPIO Mode 5.

SL_GPIO_MODE_6

Pin MUX GPIO Mode 6.

SL_GPIO_MODE_7

Pin MUX GPIO Mode 7.

SL_GPIO_MODE_8

Pin MUX GPIO Mode 8.

SL_GPIO_MODE_9

Pin MUX GPIO Mode 9.

SL_GPIO_MODE_10

Pin MUX GPIO Mode 10.

SL_GPIO_MODE_14

Pin MUX GPIO Mode 14.

SL_GPIO_MODE_DISABLED

Input disabled. Pull-up if DOUT is set.

SL_GPIO_MODE_INPUT

Input enabled. Filter if DOUT is set.

SL_GPIO_MODE_INPUT_PULL

Input enabled. DOUT determines pull direction.

SL_GPIO_MODE_INPUT_PULL_FILTER

Input enabled with filter. DOUT determines pull direction.

SL_GPIO_MODE_PUSH_PULL

Push-pull output.

SL_GPIO_MODE_PUSH_PULL_ALTERNATE

Push-pull using alternate control.

SL_GPIO_MODE_WIRED_OR

Wired-or output.

SL_GPIO_MODE_WIRED_OR_PULL_DOWN

Wired-or output with pull-down.

SL_GPIO_MODE_WIRED_AND

Open-drain output.

SL_GPIO_MODE_WIRED_AND_FILTER

Open-drain output with filter.

SL_GPIO_MODE_WIRED_AND_PULLUP

Open-drain output with pull-up.

SL_GPIO_MODE_WIRED_AND_PULLUP_FILTER

Open-drain output with filter and pull-up.

SL_GPIO_MODE_WIRED_AND_ALTERNATE

Open-drain output using alternate control.

SL_GPIO_MODE_WIRED_AND_ALTERNATE_FILTER

Open-drain output using alternate control with filter.

SL_GPIO_MODE_WIRED_AND_ALTERNATE_PULLUP

Open-drain output using alternate control with pull-up.

SL_GPIO_MODE_WIRED_AND_ALTERNATE_PULLUP_FILTER

Open-drain output using alternate control with filter and pull-up.


sl_gpio_interrupt_flag_t#

sl_gpio_interrupt_flag_t

GPIO Interrupt Configurations.

Enumerator
SL_GPIO_INTERRUPT_DISABLE

disable the interrupt

SL_GPIO_INTERRUPT_ENABLE

enable the interrupt

SL_GPIO_INTERRUPT_RISING_EDGE

interrupt when rising edge is detected

SL_GPIO_INTERRUPT_FALLING_EDGE

interrupt when falling edge is detected


Function Documentation#

sl_gpio_configure_interrupt#

void sl_gpio_configure_interrupt (sl_gpio_port_t port, uint8_t pin, uint32_t int_no, sl_gpio_interrupt_flag_t flags)

Configure the GPIO pin interrupt.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins.

uint32_t[in]int_no

- The interrupt number to trigger.

sl_gpio_interrupt_flag_t[in]flags

- Interrupt configuration flags

Returns

  • None


sl_gpio_set_pin_mode#

void sl_gpio_set_pin_mode (sl_gpio_port_t port, uint8_t pin, sl_gpio_mode_t mode, uint32_t output_value)

Set the pin mode for a GPIO pin.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins.

sl_gpio_mode_t[in]mode

- The desired pin mode.

uint32_t[in]output_value

- A value to set for the pin in the GPIO register. The GPIO setting is important for some input mode configurations.

Returns

  • None


sl_gpio_get_pin_mode#

sl_gpio_mode_t sl_gpio_get_pin_mode (sl_gpio_port_t port, uint8_t pin)

Get the GPIO pin status.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins.

Returns

  • returns Pin status '0' - Output '1' - Input


sl_gpio_set_pin_output#

static __INLINE void sl_gpio_set_pin_output (sl_gpio_port_t port, uint8_t pin)

Set a single pin in GPIO configuration register to 1.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins.

Returns

  • None


sl_gpio_set_port_output#

static __INLINE void sl_gpio_set_port_output (sl_gpio_port_t port, uint32_t pins)

Set bits GPIO data out register to 1.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint32_t[in]pins

- The GPIO pins in a port are set to 1's.

Returns

  • None


sl_gpio_set_port_output_value#

static __INLINE void sl_gpio_set_port_output_value (sl_gpio_port_t port, uint32_t val, uint32_t mask)

Set GPIO port configuration register.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint32_t[in]val

- Value to write to port configuration register.

uint32_t[in]mask

- Mask indicating which bits to modify.

Returns

  • None


sl_gpio_set_slew_rate#

static __INLINE void sl_gpio_set_slew_rate (sl_gpio_port_t port, uint32_t slewrate, uint32_t slewrate_alt)

Set slewrate for pins on a GPIO port.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The GPIO port to configure.

uint32_t[in]slewrate

- The slewrate to configure for pins on this GPIO port.

uint32_t[in]slewrate_alt

- The slewrate to configure for pins using alternate modes on this GPIO port.

Returns

  • None


sl_gpio_clear_pin_output#

static __INLINE void sl_gpio_clear_pin_output (sl_gpio_port_t port, uint8_t pin)

Set a single pin in GPIO configuration register to 0.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin to set.

Returns

  • None


sl_gpio_clear_port_output#

static __INLINE void sl_gpio_clear_port_output (sl_gpio_port_t port, uint32_t pins)

Set bits in configuration register for a port to 0.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint32_t[in]pins

- The GPIO pins in a port to clear.

Returns

  • None


sl_gpio_get_pin_input#

static __INLINE uint8_t sl_gpio_get_pin_input (sl_gpio_port_t port, uint8_t pin)

Read the pad value for a single pin in a GPIO port.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins.

Returns

  • The GPIO pin value '0' - Output '1' - Input


sl_gpio_get_pin_output#

static __INLINE uint8_t sl_gpio_get_pin_output (sl_gpio_port_t port, uint8_t pin)

Get the current setting for a pin in a GPIO configuration register.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin to get setting for.

Returns

  • The GPIO pin value '0' - Output '1' - Input


sl_gpio_get_port_input#

static __INLINE uint32_t sl_gpio_get_port_input (sl_gpio_port_t port)

Read the pad values for GPIO port.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

Returns

  • The pad values for the GPIO port.


sl_gpio_get_port_output#

static __INLINE uint32_t sl_gpio_get_port_output (sl_gpio_port_t port)

Get the current setting for a GPIO configuration register.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

Returns

  • The port value for the requested port.


sl_gpio_toggle_pin_output#

static __INLINE void sl_gpio_toggle_pin_output (sl_gpio_port_t port, uint8_t pin)

Toggle a single pin in GPIO port register.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint8_t[in]pin

- The pin number on the port. HP instance has total 57 GPIO pins. Port 0, 1, 2 has 16 pins each. Port 3 has 9 pins. ULP instance has total 12 pins.

Returns

  • None


sl_gpio_toggle_port_output#

static __INLINE void sl_gpio_toggle_port_output (sl_gpio_port_t port, uint32_t pins)

Toggle pins in GPIO port register.

Parameters
TypeDirectionArgument NameDescription
sl_gpio_port_t[in]port

- The port to associate with the pin. HP instance - PORT 0,1,2,3 ULP instance - PORT 4

uint32_t[in]pins

- Port pins to toggle.

Returns

  • None


sl_gpio_enable_interrupts#

static __INLINE void sl_gpio_enable_interrupts (uint32_t flags)

Enable one or more GPIO interrupts.

Parameters
TypeDirectionArgument NameDescription
uint32_t[in]flags

- GPIO interrupt sources to enable.

Returns

  • None


sl_gpio_disable_interrupts#

static __INLINE void sl_gpio_disable_interrupts (uint32_t flags)

Disable one or more GPIO interrupts.

Parameters
TypeDirectionArgument NameDescription
uint32_t[in]flags

- GPIO interrupt sources to disable.

Returns

  • None


sl_gpio_clear_interrupts#

static __INLINE void sl_gpio_clear_interrupts (uint32_t flags)

Clear one or more pending GPIO interrupts.

Parameters
TypeDirectionArgument NameDescription
uint32_t[in]flags

- Bitwise logic OR of GPIO interrupt sources to clear.

Returns

  • None


sl_gpio_set_interrupts#

static __INLINE void sl_gpio_set_interrupts (uint32_t flags)

Set one or more pending GPIO interrupts from SW.

Parameters
TypeDirectionArgument NameDescription
uint32_t[in]flags

- GPIO interrupt sources to set to pending.

Returns

  • None


sl_gpio_get_pending_interrupts#

static __INLINE uint32_t sl_gpio_get_pending_interrupts (void )

Get pending GPIO interrupts.

Parameters
TypeDirectionArgument NameDescription
void[in]

Returns

  • GPIO interrupt sources pending.


sl_gpio_get_enabled_interrupts#

static __INLINE uint32_t sl_gpio_get_enabled_interrupts (void )

Get enabled GPIO interrupts.

Parameters
TypeDirectionArgument NameDescription
void[in]

Returns

  • Enabled GPIO interrupt sources.


sl_gpio_get_enabled_pending_interrupts#

static __INLINE uint32_t sl_gpio_get_enabled_pending_interrupts (void )

Get enabled and pending GPIO interrupt flags.

Parameters
TypeDirectionArgument NameDescription
void[in]

Useful for handling more interrupt sources in the same interrupt handler.

Returns

  • None


Macro Definition Documentation#

PAD_REG_BASE#

#define PAD_REG_BASE
Value:
0x46004000UL

PAD configuration register base address.


NPSS_INT_BASE#

#define NPSS_INT_BASE
Value:
0x12080000UL

UULP INTR base address.


ULP_PAD_REG_BASE#

#define ULP_PAD_REG_BASE
Value:
0x2404A000UL

ULP PAD configuration base address.


GPIO#

#define GPIO
Value:
((EGPIO_Type *)EGPIO_BASE)

MCU HP base address.


ULP_GPIO#

#define ULP_GPIO
Value:
((EGPIO_Type *)EGPIO1_BASE)

MCU ULP base address.


UULP_GPIO_FSM#

#define UULP_GPIO_FSM
Value:
((MCU_FSM_Type *)MCU_FSM_BASE)

SLEEP FSM base address.


UULP_GPIO#

#define UULP_GPIO
Value:
((MCU_RET_Type *)MCU_RET_BASE)

MCU retention base address.


PAD_REG#

#define PAD_REG
Value:
(x)

PAD configuration register for GPIO_n(n = 0 t0 63)


ULP_PAD_CONFIG0_REG#

#define ULP_PAD_CONFIG0_REG
Value:
((ULP_PAD_CONFIG_Type0 *)(ULP_PAD_REG_BASE + 0x0))

ULP PAD configuration register 0.


ULP_PAD_CONFIG1_REG#

#define ULP_PAD_CONFIG1_REG
Value:
((ULP_PAD_CONFIG_Type1 *)(ULP_PAD_REG_BASE + 0x4))

ULP PAD configuration register 1.


ULP_PAD_CONFIG2_REG#

#define ULP_PAD_CONFIG2_REG
Value:
((ULP_PAD_CONFIG_Type2 *)(ULP_PAD_REG_BASE + 0x8))

ULP PAD configuration register 2.


UULP_PAD_CONFIG_REG#

#define UULP_PAD_CONFIG_REG
Value:
(x)

UULP V_bat PAD configuration base address.


PADSELECTION#

#define PADSELECTION
Value:
  (*(volatile uint32_t *)(0x41300000 + 0x610))

PAD selection (0 to 21) A value of 1 on this gives control to M4SS.


PADSELECTION_1#

#define PADSELECTION_1
Value:
  (*(volatile uint32_t *)(0x41300000 + 0x618))

PAD selection (22 to 33) A value of 1 on this gives control to M4SS.


HOST_PADS_GPIO_MODE#

#define HOST_PADS_GPIO_MODE
Value:
(*(volatile uint32_t *)(0x46008000 + 0x44))

MISC host base address.


ULP_PAD_CONFIG_REG#

#define ULP_PAD_CONFIG_REG
Value:
(*(volatile uint32_t *)(0x2404A008))

ULP PAD register.


GPIO_NPSS_INTERRUPT_MASK_SET_REG#

#define GPIO_NPSS_INTERRUPT_MASK_SET_REG
Value:
  (*(volatile uint32_t *)(NPSS_INT_BASE + 0x00))

NPSS mask set register base address.


GPIO_NPSS_INTERRUPT_MASK_CLR_REG#

#define GPIO_NPSS_INTERRUPT_MASK_CLR_REG
Value:
  (*(volatile uint32_t *)(NPSS_INT_BASE + 0x04))

NPSS mask clear register base address.


GPIO_NPSS_INTERRUPT_CLEAR_REG#

#define GPIO_NPSS_INTERRUPT_CLEAR_REG
Value:
  (*(volatile uint32_t *)(NPSS_INT_BASE + 0x08))

NPSS clear register base address.


GPIO_NPSS_INTERRUPT_STATUS_REG#

#define GPIO_NPSS_INTERRUPT_STATUS_REG
Value:
  (*(volatile uint32_t *)(NPSS_INT_BASE + 0x0C))

NPSS status register base address.


GPIO_NPSS_GPIO_CONFIG_REG#

#define GPIO_NPSS_GPIO_CONFIG_REG
Value:
  (*(volatile uint32_t *)(NPSS_INT_BASE + 0x10))

NPSS GPIO configuration register base address.


UULP_GPIO_STATUS#

#define UULP_GPIO_STATUS
Value:
(*(volatile uint32_t *)(NPSS_INT_BASE + 0x14))

UULP GPIO status base address.


GPIO_25_30_CONFIG_REG#

#define GPIO_25_30_CONFIG_REG
Value:
(*(volatile uint32_t *)(0X46008000 + 0x0C))

GPIO(25-30) pin configuration register.


CLR#

#define CLR
Value:
0

SET#

#define SET
Value:
1

SL_DEBUG_ASSERT#

#define SL_DEBUG_ASSERT

NIBBLE_SHIFT#

#define NIBBLE_SHIFT
Value:
4

Nibble shift for interrupt.


BYTE_SHIFT#

#define BYTE_SHIFT
Value:
8

Byte shift for interrupt.


WORD_SHIFT#

#define WORD_SHIFT
Value:
16

Word shift for interrupt.


LSB_WORD_MASK#

#define LSB_WORD_MASK
Value:
0x00FF

GPIO LSB word mask.


LSB_NIBBLE_MASK#

#define LSB_NIBBLE_MASK
Value:
0x0F

GPIO LSB nibble mask.


MAX_GPIO_PORT_PIN#

#define MAX_GPIO_PORT_PIN
Value:
16

GPIO maximum port pins.


HOST_PAD#

#define HOST_PAD
Value:
12

GPIO Host PAD.


GPIO_PA_COUNT#

#define GPIO_PA_COUNT
Value:
16

GPIO port A maximum pins.


GPIO_PB_COUNT#

#define GPIO_PB_COUNT
Value:
16

GPIO port B maximum pins.


GPIO_PC_COUNT#

#define GPIO_PC_COUNT
Value:
16

GPIO port C maximum pins.


GPIO_PD_COUNT#

#define GPIO_PD_COUNT
Value:
9

GPIO port D maximum pins.


GPIO_PE_COUNT#

#define GPIO_PE_COUNT
Value:
12

GPIO port E maximum pins.


GPIO_PA_MASK#

#define GPIO_PA_MASK
Value:
0xFFFFUL

GPIO port A mask.


GPIO_PB_MASK#

#define GPIO_PB_MASK
Value:
0xFFFFUL

GPIO port B mask.


GPIO_PC_MASK#

#define GPIO_PC_MASK
Value:
0xFFFFUL

GPIO port C mask.


GPIO_PD_MASK#

#define GPIO_PD_MASK
Value:
0x01FFUL

GPIO port D mask.


SL_PERIPHERAL_CLK#

#define SL_PERIPHERAL_CLK
Value:
M4CLK

GPIO instance clock.


UNUSED_VARIABLE#

#define UNUSED_VARIABLE
Value:
(expr)

SL_GPIO_ASSERT#

#define SL_GPIO_ASSERT
Value:
(expr)

SL_GPIO_VALIDATE_STRENGTH#

#define SL_GPIO_VALIDATE_STRENGTH
Value:
(strength)

Validate driver strength.


SL_GPIO_VALIDATE_PARAMETER#

#define SL_GPIO_VALIDATE_PARAMETER
Value:
(value)

Validate GPIO parameters.


SL_GPIO_VALIDATE_DISABLE_STATE#

#define SL_GPIO_VALIDATE_DISABLE_STATE
Value:
(disable_state)

Validate driver disable state.


SL_GPIO_VALIDATE_PAD#

#define SL_GPIO_VALIDATE_PAD
Value:
(pad_num)

Validate GPIO HP pad selection.


SL_GPIO_VALIDATE_PIN#

#define SL_GPIO_VALIDATE_PIN
Value:
(pin_num)

Validate GPIO HP pin number.


SL_GPIO_VALIDATE_FLAG#

#define SL_GPIO_VALIDATE_FLAG
Value:
(flag)

Validate GPIO flags.


SL_GPIO_VALIDATE_ULP_INTR#

#define SL_GPIO_VALIDATE_ULP_INTR
Value:
(ulp_intr)

Validate ULP interrupts.


SL_GPIO_VALIDATE_ULP_PIN#

#define SL_GPIO_VALIDATE_ULP_PIN
Value:
(pin_num)

Validate ULP pins.


SL_GPIO_VALIDATE_UULP_PIN#

#define SL_GPIO_VALIDATE_UULP_PIN
Value:
(pin_num)

Validate UULP pins.


SL_GPIO_VALIDATE_MODE_PARAMETER#

#define SL_GPIO_VALIDATE_MODE_PARAMETER
Value:
(mode)

Validate UULP, ULP mode.


SL_GPIO_VALIDATE_UULP_INTR#

#define SL_GPIO_VALIDATE_UULP_INTR
Value:
(interrupt)

Validate UULP interrupt.


SL_GPIO_VALIDATE_PORT#

#define SL_GPIO_VALIDATE_PORT
Value:
(port)

Validate GPIO port.


SL_GPIO_VALIDATE_MODE#

#define SL_GPIO_VALIDATE_MODE
Value:
(mode)

Validate GPIO mode.


SL_GPIO_VALIDATE_INTR#

#define SL_GPIO_VALIDATE_INTR
Value:
(interrupt)

Validate GPIO interrupt.

Validate GPIO port and pin


SL_GPIO_NDEBUG_PORT_PIN#

#define SL_GPIO_NDEBUG_PORT_PIN
Value:
(port == 0 ? ((pin > 57) ? 0 : 1) \
: port == 1 ? ((pin > 41) ? 0 : 1) \
: port == 2 ? ((pin > 25) ? 0 : 1) \
: port == 3 ? ((pin > 9) ? 0 : 1) \
: 0)

SL_GPIO_VALIDATE_ULP_PORT_PIN#

#define SL_GPIO_VALIDATE_ULP_PORT_PIN
Value:
(port, pin)

Validate ULP port and pin.


GRP_IRQ0_Handler#

#define GRP_IRQ0_Handler
Value:
IRQ050_Handler

GPIO Group Interrupt 0.


GRP_IRQ1_Handler#

#define GRP_IRQ1_Handler
Value:
IRQ051_Handler

GPIO Group Interrupt 1.


PIN_IRQ0_Handler#

#define PIN_IRQ0_Handler
Value:
IRQ052_Handler

GPIO Pin Interrupt 0.


PIN_IRQ1_Handler#

#define PIN_IRQ1_Handler
Value:
IRQ053_Handler

GPIO Pin Interrupt 1.


PIN_IRQ2_Handler#

#define PIN_IRQ2_Handler
Value:
IRQ054_Handler

GPIO Pin Interrupt 2.


PIN_IRQ3_Handler#

#define PIN_IRQ3_Handler
Value:
IRQ055_Handler

GPIO Pin Interrupt 3.


PIN_IRQ4_Handler#

#define PIN_IRQ4_Handler
Value:
IRQ056_Handler

GPIO Pin Interrupt 4.


PIN_IRQ5_Handler#

#define PIN_IRQ5_Handler
Value:
IRQ057_Handler

GPIO Pin Interrupt 5.


PIN_IRQ6_Handler#

#define PIN_IRQ6_Handler
Value:
IRQ058_Handler

GPIO Pin Interrupt 6.


PIN_IRQ7_Handler#

#define PIN_IRQ7_Handler
Value:
IRQ059_Handler

GPIO Pin Interrupt 7.


UULP_PIN_IRQ_Handler#

#define UULP_PIN_IRQ_Handler
Value:
IRQ021_Handler

UULP Pin Interrupt 0.


ULP_PIN_IRQ_Handler#

#define ULP_PIN_IRQ_Handler
Value:
IRQ018_Handler

ULP Pin Interrupt.


ULP_GROUP_IRQ_Handler#

#define ULP_GROUP_IRQ_Handler
Value:
IRQ019_Handler

ULP Group Interrupt.


PIN_INTR_0#

#define PIN_INTR_0
Value:
0

HP GPIO pin interrupt 0.


PIN_INTR_1#

#define PIN_INTR_1
Value:
1

HP GPIO pin interrupt 1.


PIN_INTR_2#

#define PIN_INTR_2
Value:
2

HP GPIO pin interrupt 2.


PIN_INTR_3#

#define PIN_INTR_3
Value:
3

HP GPIO pin interrupt 3.


PIN_INTR_4#

#define PIN_INTR_4
Value:
4

HP GPIO pin interrupt 4.


PIN_INTR_5#

#define PIN_INTR_5
Value:
5

HP GPIO pin interrupt 5.


PIN_INTR_6#

#define PIN_INTR_6
Value:
6

HP GPIO pin interrupt 6.


PIN_INTR_7#

#define PIN_INTR_7
Value:
7

HP GPIO pin interrupt 7.


UULP_PIN_INTR_1#

#define UULP_PIN_INTR_1
Value:
1

UULP GPIO pin interrupt 1.


UULP_PIN_INTR_2#

#define UULP_PIN_INTR_2
Value:
2

UULP GPIO pin interrupt 2.


UULP_PIN_INTR_3#

#define UULP_PIN_INTR_3
Value:
3

UULP GPIO pin interrupt 3.


UULP_PIN_INTR_4#

#define UULP_PIN_INTR_4
Value:
4

UULP GPIO pin interrupt 4.


UULP_PIN_INTR_5#

#define UULP_PIN_INTR_5
Value:
5

UULP GPIO pin interrupt 5.


ULP_PIN_INT#

#define ULP_PIN_INT
Value:
0

ULP GPIO pin interrupt.


ULP_GROUP_INT#

#define ULP_GROUP_INT
Value:
0

ULP GPIO group interrupt.


MAX_GPIO_PIN_INT#

#define MAX_GPIO_PIN_INT
Value:
8

Maximum HP GPIO pin interrupts.


PININT0_NVIC_NAME#

#define PININT0_NVIC_NAME
Value:
EGPIO_PIN_0_IRQn

HP GPIO pin interrupt 0 number.


PININT1_NVIC_NAME#

#define PININT1_NVIC_NAME
Value:
EGPIO_PIN_1_IRQn

HP GPIO pin interrupt 1 number.


PININT2_NVIC_NAME#

#define PININT2_NVIC_NAME
Value:
EGPIO_PIN_2_IRQn

HP GPIO pin interrupt 2 number.


PININT3_NVIC_NAME#

#define PININT3_NVIC_NAME
Value:
EGPIO_PIN_3_IRQn

HP GPIO pin interrupt 3 number.


PININT4_NVIC_NAME#

#define PININT4_NVIC_NAME
Value:
EGPIO_PIN_4_IRQn

HP GPIO pin interrupt 4 number.


PININT5_NVIC_NAME#

#define PININT5_NVIC_NAME
Value:
EGPIO_PIN_5_IRQn

HP GPIO pin interrupt 5 number.


PININT6_NVIC_NAME#

#define PININT6_NVIC_NAME
Value:
EGPIO_PIN_6_IRQn

HP GPIO pin interrupt 6 number.


PININT7_NVIC_NAME#

#define PININT7_NVIC_NAME
Value:
EGPIO_PIN_7_IRQn

HP GPIO pin interrupt 7 number.


GROUP_0_INTERRUPT_NAME#

#define GROUP_0_INTERRUPT_NAME
Value:
EGPIO_GROUP_0_IRQn

HP GPIO group interrupt 1 number.


GROUP_1_INTERRUPT_NAME#

#define GROUP_1_INTERRUPT_NAME
Value:
EGPIO_GROUP_1_IRQn

HP GPIO group interrupt 2 number.


ULP_PININT0_NVIC_NAME#

#define ULP_PININT0_NVIC_NAME
Value:
ULP_EGPIO_PIN_IRQn

ULP GPIO pin interrupt number.


ULP_GROUP_INTERRUPT_NAME#

#define ULP_GROUP_INTERRUPT_NAME
Value:
ULP_EGPIO_GROUP_IRQn

ULP GPIO group interrupt number.


UULP_PININT_NVIC_NAME#

#define UULP_PININT_NVIC_NAME
Value:
NPSS_TO_MCU_GPIO_INTR_IRQn

UULP GPIO pin interrupt number.


SL_GPIO_GROUP_INTERRUPT_OR#

#define SL_GPIO_GROUP_INTERRUPT_OR
Value:
1

GPIO group interrupt AND/OR.


SL_GPIO_GROUP_INTERRUPT_WAKEUP#

#define SL_GPIO_GROUP_INTERRUPT_WAKEUP
Value:
4

GPIO group interrupt wakeup.


SL_ULP_GPIO_PORT#

#define SL_ULP_GPIO_PORT
Value:
4

ULP GPIO port number.


_MODE0#

#define _MODE0
Value:
0

GPIO mode 0.


_MODE1#

#define _MODE1
Value:
1

GPIO mode 1.


_MODE2#

#define _MODE2
Value:
2

GPIO mode 2.


_MODE3#

#define _MODE3
Value:
3

GPIO mode 3.


_MODE4#

#define _MODE4
Value:
4

GPIO mode 4.


_MODE5#

#define _MODE5
Value:
5

GPIO mode 5.


_MODE6#

#define _MODE6
Value:
6

GPIO mode 6.


_MODE7#

#define _MODE7
Value:
7

GPIO mode 7.


_MODE8#

#define _MODE8
Value:
8

GPIO mode 8.


_MODE9#

#define _MODE9
Value:
9

GPIO mode 9.


_MODE10#

#define _MODE10
Value:
10

GPIO mode 10.


_MODE14#

#define _MODE14
Value:
14

GPIO mode 14.


_GPIO_P_MODEL_MODE0_DISABLED#

#define _GPIO_P_MODEL_MODE0_DISABLED
Value:
0x00000000UL

Mode DISABLED for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_INPUT#

#define _GPIO_P_MODEL_MODE0_INPUT
Value:
0x00000001UL

Mode INPUT for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_INPUTPULL#

#define _GPIO_P_MODEL_MODE0_INPUTPULL
Value:
0x00000002UL

Mode INPUTPULL for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_INPUTPULLFILTER#

#define _GPIO_P_MODEL_MODE0_INPUTPULLFILTER
Value:
0x00000003UL

Mode INPUTPULLFILTER for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_PUSHPULL#

#define _GPIO_P_MODEL_MODE0_PUSHPULL
Value:
0x00000004UL

Mode PUSHPULL for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_PUSHPULLALT#

#define _GPIO_P_MODEL_MODE0_PUSHPULLALT
Value:
0x00000005UL

Mode PUSHPULLALT for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDOR#

#define _GPIO_P_MODEL_MODE0_WIREDOR
Value:
0x00000006UL

Mode WIREDOR for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN#

#define _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN
Value:
0x00000007UL

Mode WIREDORPULLDOWN for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDAND#

#define _GPIO_P_MODEL_MODE0_WIREDAND
Value:
0x00000008UL

Mode WIREDAND for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDFILTER#

#define _GPIO_P_MODEL_MODE0_WIREDANDFILTER
Value:
0x00000009UL

Mode WIREDANDFILTER for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDPULLUP#

#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUP
Value:
0x0000000AUL

Mode WIREDANDPULLUP for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER#

#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER
Value:
0x0000000BUL

Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDALT#

#define _GPIO_P_MODEL_MODE0_WIREDANDALT
Value:
0x0000000CUL

Mode WIREDANDALT for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER#

#define _GPIO_P_MODEL_MODE0_WIREDANDALTFILTER
Value:
0x0000000DUL

Mode WIREDANDALTFILTER for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP#

#define _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP
Value:
0x0000000EUL

Mode WIREDANDALTPULLUP for GPIO_P_MODEL.


_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER#

#define _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER
Value:
0x0000000FUL

Mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_DISABLED#

#define GPIO_P_MODEL_MODE0_DISABLED
Value:
(_GPIO_P_MODEL_MODE0_DISABLED << 0)

Shifted mode DISABLED for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_INPUT#

#define GPIO_P_MODEL_MODE0_INPUT
Value:
(_GPIO_P_MODEL_MODE0_INPUT << 0)

Shifted mode INPUT for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_INPUTPULL#

#define GPIO_P_MODEL_MODE0_INPUTPULL
Value:
(_GPIO_P_MODEL_MODE0_INPUTPULL << 0)

Shifted mode INPUTPULL for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_INPUTPULLFILTER#

#define GPIO_P_MODEL_MODE0_INPUTPULLFILTER
Value:
  (_GPIO_P_MODEL_MODE0_INPUTPULLFILTER << 0)

Shifted mode INPUTPULLFILTER for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_PUSHPULL#

#define GPIO_P_MODEL_MODE0_PUSHPULL
Value:
(_GPIO_P_MODEL_MODE0_PUSHPULL << 0)

Shifted mode PUSHPULL for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_PUSHPULLALT#

#define GPIO_P_MODEL_MODE0_PUSHPULLALT
Value:
  (_GPIO_P_MODEL_MODE0_PUSHPULLALT << 0)

Shifted mode PUSHPULLALT for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDOR#

#define GPIO_P_MODEL_MODE0_WIREDOR
Value:
(_GPIO_P_MODEL_MODE0_WIREDOR << 0)

Shifted mode WIREDOR for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDORPULLDOWN#

#define GPIO_P_MODEL_MODE0_WIREDORPULLDOWN
Value:
  (_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN << 0)

Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDAND#

#define GPIO_P_MODEL_MODE0_WIREDAND
Value:
(_GPIO_P_MODEL_MODE0_WIREDAND << 0)

Shifted mode WIREDAND for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDFILTER#

#define GPIO_P_MODEL_MODE0_WIREDANDFILTER
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDFILTER << 0)

Shifted mode WIREDANDFILTER for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDPULLUP#

#define GPIO_P_MODEL_MODE0_WIREDANDPULLUP
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDPULLUP << 0)

Shifted mode WIREDANDPULLUP for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER#

#define GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER << 0)

Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDALT#

#define GPIO_P_MODEL_MODE0_WIREDANDALT
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDALT << 0)

Shifted mode WIREDANDALT for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDALTFILTER#

#define GPIO_P_MODEL_MODE0_WIREDANDALTFILTER
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER << 0)

Shifted mode WIREDANDALTFILTER for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP#

#define GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP << 0)

Shifted mode WIREDANDALTPULLUP for GPIO_P_MODEL.


GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER#

#define GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER
Value:
  (_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER << 0)

Shifted mode WIREDANDALTPULLUPFILTER for GPIO_P_MODEL.


GPIO_PAD_0#

#define GPIO_PAD_0
Value:
0

GPIO PAD number 0.


GPIO_PAD_3#

#define GPIO_PAD_3
Value:
3

GPIO PAD number 3.


GPIO_PAD_4#

#define GPIO_PAD_4
Value:
4

GPIO PAD number 4.


GPIO_PAD_7#

#define GPIO_PAD_7
Value:
7

GPIO PAD number 7.


GPIO_PAD_8#

#define GPIO_PAD_8
Value:
8

GPIO PAD number 8.


PAD_SELECT#

#define PAD_SELECT
Value:
22

GPIO Host PAD number 22.


HOST_PAD_MIN#

#define HOST_PAD_MIN
Value:
25

GPIO Host PAD number 25.


HOST_PAD_MAX#

#define HOST_PAD_MAX
Value:
30

GPIO Host PAD number 30.


PRIORITY_14#

#define PRIORITY_14
Value:
14

GPIO Interrupt priority 14.


PRIORITY_15#

#define PRIORITY_15
Value:
15

GPIO Interrupt priority 15.


ULP_PORT_NUM#

#define ULP_PORT_NUM
Value:
0

GPIO ULP port number.


UULP_PIN_MASK#

#define UULP_PIN_MASK
Value:
0x1F

GPIO UULP pin mask.


BIT_0#

#define BIT_0
Value:
0

GPIO bit 0 in configuration register.


BIT_8#

#define BIT_8
Value:
8

GPIO bit 8 in configuration register.


BIT_16#

#define BIT_16
Value:
16

GPIO bit 16 in configuration register.


BIT_24#

#define BIT_24
Value:
24

GPIO bit 24 in configuration register.


PORT_MASK#

#define PORT_MASK
Value:
0xFFFF

GPIO port mask.


INTR_CLR#

#define INTR_CLR
Value:
0x07

GPIO interrupt clear.


INTERRUPT_MASK#

#define INTERRUPT_MASK
Value:
0x0F

GPIO interrupt mask.


MASK_CTRL#

#define MASK_CTRL
Value:
0x03

MASK_INTR#

#define MASK_INTR
Value:
0x01

GPIO interrupt mask.


_GPIO_PORT_A_PIN_COUNT#

#define _GPIO_PORT_A_PIN_COUNT
Value:
GPIO_PA_COUNT

GPIO port A maximum pins.


_GPIO_PORT_B_PIN_COUNT#

#define _GPIO_PORT_B_PIN_COUNT
Value:
GPIO_PB_COUNT

GPIO port B maximum pins.


_GPIO_PORT_C_PIN_COUNT#

#define _GPIO_PORT_C_PIN_COUNT
Value:
GPIO_PC_COUNT

GPIO port C maximum pins.


_GPIO_PORT_D_PIN_COUNT#

#define _GPIO_PORT_D_PIN_COUNT
Value:
GPIO_PD_COUNT

GPIO port D maximum pins.


_GPIO_PORT_E_PIN_COUNT#

#define _GPIO_PORT_E_PIN_COUNT
Value:
0

_GPIO_PORT_F_PIN_COUNT#

#define _GPIO_PORT_F_PIN_COUNT
Value:
0

_GPIO_PORT_G_PIN_COUNT#

#define _GPIO_PORT_G_PIN_COUNT
Value:
0

_GPIO_PORT_H_PIN_COUNT#

#define _GPIO_PORT_H_PIN_COUNT
Value:
0

_GPIO_PORT_I_PIN_COUNT#

#define _GPIO_PORT_I_PIN_COUNT
Value:
0

_GPIO_PORT_J_PIN_COUNT#

#define _GPIO_PORT_J_PIN_COUNT
Value:
0

_GPIO_PORT_K_PIN_COUNT#

#define _GPIO_PORT_K_PIN_COUNT
Value:
0

_GPIO_PORT_A_PIN_MASK#

#define _GPIO_PORT_A_PIN_MASK
Value:
(GPIO_PA_MASK)

GPIO port A pin mask.


_GPIO_PORT_B_PIN_MASK#

#define _GPIO_PORT_B_PIN_MASK
Value:
(GPIO_PB_MASK)

GPIO port B pin mask.


_GPIO_PORT_C_PIN_MASK#

#define _GPIO_PORT_C_PIN_MASK
Value:
(GPIO_PC_MASK)

GPIO port C pin mask.


_GPIO_PORT_D_PIN_MASK#

#define _GPIO_PORT_D_PIN_MASK
Value:
(GPIO_PD_MASK)

GPIO port D pin mask.


_GPIO_PORT_E_PIN_MASK#

#define _GPIO_PORT_E_PIN_MASK
Value:
0x0000UL

_GPIO_PORT_F_PIN_MASK#

#define _GPIO_PORT_F_PIN_MASK
Value:
0x0000UL

_GPIO_PORT_G_PIN_MASK#

#define _GPIO_PORT_G_PIN_MASK
Value:
0x0000UL

_GPIO_PORT_H_PIN_MASK#

#define _GPIO_PORT_H_PIN_MASK
Value:
0x0000UL

_GPIO_PORT_I_PIN_MASK#

#define _GPIO_PORT_I_PIN_MASK
Value:
0x0000UL

_GPIO_PORT_J_PIN_MASK#

#define _GPIO_PORT_J_PIN_MASK
Value:
0x0000UL

_GPIO_PORT_K_PIN_MASK#

#define _GPIO_PORT_K_PIN_MASK
Value:
0x0000UL

GPIO pins selection for selected port.


_GPIO_PORT_SIZE#

#define _GPIO_PORT_SIZE
Value:
((port) == 0 ? _GPIO_PORT_A_PIN_COUNT \
: (port) == 1 ? _GPIO_PORT_B_PIN_COUNT \
: (port) == 2 ? _GPIO_PORT_C_PIN_COUNT \
: (port) == 3 ? _GPIO_PORT_D_PIN_COUNT \
: (port) == 4 ? _GPIO_PORT_E_PIN_COUNT \
: (port) == 5 ? _GPIO_PORT_F_PIN_COUNT \
: (port) == 6 ? _GPIO_PORT_G_PIN_COUNT \
: (port) == 7 ? _GPIO_PORT_H_PIN_COUNT \
: (port) == 8 ? _GPIO_PORT_I_PIN_COUNT \
: (port) == 9 ? _GPIO_PORT_J_PIN_COUNT \
: (port) == 10 ? _GPIO_PORT_K_PIN_COUNT \
: 0)

GPIO pins mask for selected port.


_GPIO_PORT_MASK#

#define _GPIO_PORT_MASK
Value:
(((int)port) == 0 ? _GPIO_PORT_A_PIN_MASK \
: ((int)port) == 1 ? _GPIO_PORT_B_PIN_MASK \
: ((int)port) == 2 ? _GPIO_PORT_C_PIN_MASK \
: ((int)port) == 3 ? _GPIO_PORT_D_PIN_MASK \
: ((int)port) == 4 ? _GPIO_PORT_E_PIN_MASK \
: ((int)port) == 5 ? _GPIO_PORT_F_PIN_MASK \
: ((int)port) == 6 ? _GPIO_PORT_G_PIN_MASK \
: ((int)port) == 7 ? _GPIO_PORT_H_PIN_MASK \
: ((int)port) == 8 ? _GPIO_PORT_I_PIN_MASK \
: ((int)port) == 9 ? _GPIO_PORT_J_PIN_MASK \
: ((int)port) == 10 ? _GPIO_PORT_K_PIN_MASK \
: 0UL)

SL_GPIO_PORT_VALID#

#define SL_GPIO_PORT_VALID
Value:
(port)

Validation of GPIO port.


SL_GPIO_PORT_PIN_VALID#

#define SL_GPIO_PORT_PIN_VALID
Value:
(port, pin)

Validating GPIO port and pin.


GPIO_PIN_MAX#

#define GPIO_PIN_MAX
Value:
15

Highest GPIO pin number.


GPIO_PORT_MAX#

#define GPIO_PORT_MAX
Value:
3

Highest GPIO port number.


GPIO_EXTINTNO_MAX#

#define GPIO_EXTINTNO_MAX
Value:
15

Highest EXT GPIO interrupt number.