UULP GPIO PAD configuration register fields.

Public Attributes#

__IOM uint32_t

(@ 0x2404861C) UULP VBAT GPIO configuration register

__IOM uint32_t

[2..0] GPIO Mode for UULP_VBAT_GPIO_n(n=0:4)

__IOM uint32_t

[3..3] Receiver of PAD enable

__IOM uint32_t

[4..4] Direction of PAD

__IOM uint32_t

[5..5] Value driven on PAD in OUTPUT mode

__IOM uint32_t

[6..6] PAD selection between M4,TA

__IOM uint32_t

[7..7] Reserved

__IOM uint32_t

[8..8] Polarity of UULP GPIO

__IOM uint32_t

[31..9] Reserved1

struct UULP_PAD_CONFIG_Type::@3::@5
union UULP_PAD_CONFIG_Type::@3

Public Attribute Documentation#

UULP_PAD_CONFIG_REG#

__IOM uint32_t UULP_PAD_CONFIG_Type::UULP_PAD_CONFIG_REG

(@ 0x2404861C) UULP VBAT GPIO configuration register


GPIO_MODE#

__IOM uint32_t UULP_PAD_CONFIG_Type::GPIO_MODE

[2..0] GPIO Mode for UULP_VBAT_GPIO_n(n=0:4)


GPIO_REN#

__IOM uint32_t UULP_PAD_CONFIG_Type::GPIO_REN

[3..3] Receiver of PAD enable


GPIO_OEN#

__IOM uint32_t UULP_PAD_CONFIG_Type::GPIO_OEN

[4..4] Direction of PAD


GPIO_OUTPUT#

__IOM uint32_t UULP_PAD_CONFIG_Type::GPIO_OUTPUT

[5..5] Value driven on PAD in OUTPUT mode


GPIO_PAD_SELECT#

__IOM uint32_t UULP_PAD_CONFIG_Type::GPIO_PAD_SELECT

[6..6] PAD selection between M4,TA


RESERVED#

__IOM uint32_t UULP_PAD_CONFIG_Type::RESERVED

[7..7] Reserved


GPIO_POLARITY#

__IOM uint32_t UULP_PAD_CONFIG_Type::GPIO_POLARITY

[8..8] Polarity of UULP GPIO


RESERVED1#

__IOM uint32_t UULP_PAD_CONFIG_Type::RESERVED1

[31..9] Reserved1


UULP_GPIO_PAD_CONFIG_REG_b#

struct UULP_PAD_CONFIG_Type::@3::@5 UULP_PAD_CONFIG_Type::UULP_GPIO_PAD_CONFIG_REG_b

@4#

union UULP_PAD_CONFIG_Type::@3 UULP_PAD_CONFIG_Type::@4