ULP GPIO PAD configuration register1 fields.

Public Attributes#

__IOM uint32_t
ULP_PAD_CONFIG_REG1
__IOM uint32_t
PADCONFIG_E1_E2_1

[1..0] Drive strength selector for ULP_GPIO_8 - ULP_GPIO_11

__IOM uint32_t
PADCONFIG_POS_1

[2..2] Power on start enable for ULP_GPIO_8 - ULP_GPIO_11

__IOM uint32_t
PADCONFIG_SMT_1

[3..3] Active high schmitt trigger for ULP_GPIO_8 - ULP_GPIO_11

__IOM uint32_t
RESERVED

[4..4] Reserved

__IOM uint32_t
PADCONFIG_SR_1

[5..5] Slew rate control for ULP_GPIO_8 - ULP_GPIO_11

__IOM uint32_t
PADCONFIG_P1_P2_1

[7..6] Driver disabled state control for ULP_GPIO_8 - ULP_GPIO_11

__IOM uint32_t
RESERVED1

[15..8] Reserved1

__IOM uint32_t
RESERVED2

[31..16] Reserved2

struct ULP_PAD_CONFIG_Type1::@9::@11
ULP_GPIO_PAD_CONFIG_REG_1
union ULP_PAD_CONFIG_Type1::@9
@10

Public Attribute Documentation#

ULP_PAD_CONFIG_REG1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::ULP_PAD_CONFIG_REG1

PADCONFIG_E1_E2_1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::PADCONFIG_E1_E2_1

[1..0] Drive strength selector for ULP_GPIO_8 - ULP_GPIO_11


PADCONFIG_POS_1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::PADCONFIG_POS_1

[2..2] Power on start enable for ULP_GPIO_8 - ULP_GPIO_11


PADCONFIG_SMT_1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::PADCONFIG_SMT_1

[3..3] Active high schmitt trigger for ULP_GPIO_8 - ULP_GPIO_11


RESERVED#

__IOM uint32_t ULP_PAD_CONFIG_Type1::RESERVED

[4..4] Reserved


PADCONFIG_SR_1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::PADCONFIG_SR_1

[5..5] Slew rate control for ULP_GPIO_8 - ULP_GPIO_11


PADCONFIG_P1_P2_1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::PADCONFIG_P1_P2_1

[7..6] Driver disabled state control for ULP_GPIO_8 - ULP_GPIO_11


RESERVED1#

__IOM uint32_t ULP_PAD_CONFIG_Type1::RESERVED1

[15..8] Reserved1


RESERVED2#

__IOM uint32_t ULP_PAD_CONFIG_Type1::RESERVED2

[31..16] Reserved2


ULP_GPIO_PAD_CONFIG_REG_1#

struct ULP_PAD_CONFIG_Type1::@9::@11 ULP_PAD_CONFIG_Type1::ULP_GPIO_PAD_CONFIG_REG_1

@10#

union ULP_PAD_CONFIG_Type1::@9 ULP_PAD_CONFIG_Type1::@10