EUSART_AdvancedInit_TypeDef Struct Reference
Advanced initialization structure.
#include <em_eusart.h>
Data Fields | |
| EUSART_HwFlowControl_TypeDef | hwFlowControl |
| Hardware flow control mode. | |
| bool | collisionDetectEnable |
| Enable the collision Detection feature. | |
| bool | msbFirst |
| If true, data will be send with most significant bit first. | |
| EUSART_InvertIO_TypeDef | invertIO |
| Enable inversion of Rx and/or Tx signals. | |
| bool | dmaWakeUpOnRx |
| Enable the automatic wake up from EM2 to EM1 for DMA Rx operation. | |
| bool | dmaWakeUpOnTx |
| Enable the automatic wake up from EM2 to EM1 for DMA Tx operation. | |
| bool | dmaHaltOnError |
| Enable DMA requests blocking while framing or parity errors. | |
| uint8_t | startFrame |
| Start frame that will enable Rx operation. 0x00 Disable this feature. | |
| bool | txAutoTristate |
| Enable automatic tristating of transmistter output when there is nothing to transmit. | |
| bool | prsRxEnable |
| Enable EUSART capability to use a PRS channel as an input data line for the receiver. | |
| EUSART_PrsChannel_TypeDef | prsRxChannel |
| PRS Channel used to transmit data from PRS to the EUSART. | |
| bool | multiProcessorEnable |
| Enable Multiprocessor mode. Address and data filtering using the 9th bit. | |
| bool | multiProcessorAddressBitHigh |
| Multiprocessor address bit value. If true, 9th bit of address frame must bit 1, 0 otherwise. | |
Advanced initialization structure.
Field Documentation
◆ hwFlowControl
| EUSART_HwFlowControl_TypeDef EUSART_AdvancedInit_TypeDef::hwFlowControl |
Hardware flow control mode.
◆ collisionDetectEnable
| bool EUSART_AdvancedInit_TypeDef::collisionDetectEnable |
Enable the collision Detection feature.
Internal (setting loopbackEnable) or external loopback must be done to use this feature.
◆ msbFirst
| bool EUSART_AdvancedInit_TypeDef::msbFirst |
If true, data will be send with most significant bit first.
◆ invertIO
| EUSART_InvertIO_TypeDef EUSART_AdvancedInit_TypeDef::invertIO |
Enable inversion of Rx and/or Tx signals.
◆ dmaWakeUpOnRx
| bool EUSART_AdvancedInit_TypeDef::dmaWakeUpOnRx |
Enable the automatic wake up from EM2 to EM1 for DMA Rx operation.
◆ dmaWakeUpOnTx
| bool EUSART_AdvancedInit_TypeDef::dmaWakeUpOnTx |
Enable the automatic wake up from EM2 to EM1 for DMA Tx operation.
◆ dmaHaltOnError
| bool EUSART_AdvancedInit_TypeDef::dmaHaltOnError |
Enable DMA requests blocking while framing or parity errors.
◆ startFrame
| uint8_t EUSART_AdvancedInit_TypeDef::startFrame |
Start frame that will enable Rx operation. 0x00 Disable this feature.
◆ txAutoTristate
| bool EUSART_AdvancedInit_TypeDef::txAutoTristate |
Enable automatic tristating of transmistter output when there is nothing to transmit.
◆ prsRxEnable
| bool EUSART_AdvancedInit_TypeDef::prsRxEnable |
Enable EUSART capability to use a PRS channel as an input data line for the receiver.
The configured Rx GPIO signal won't be routed to the EUSART receiver.
◆ prsRxChannel
| EUSART_PrsChannel_TypeDef EUSART_AdvancedInit_TypeDef::prsRxChannel |
PRS Channel used to transmit data from PRS to the EUSART.
◆ multiProcessorEnable
| bool EUSART_AdvancedInit_TypeDef::multiProcessorEnable |
Enable Multiprocessor mode. Address and data filtering using the 9th bit.
◆ multiProcessorAddressBitHigh
| bool EUSART_AdvancedInit_TypeDef::multiProcessorAddressBitHigh |
Multiprocessor address bit value. If true, 9th bit of address frame must bit 1, 0 otherwise.