CMU - Clock Management Unit

Description

Clock management unit (CMU) Peripheral API.

This module contains functions for the CMU peripheral of Silicon Labs 32-bit MCUs and SoCs. The CMU module controls oscillators, clocks gates, clock multiplexers, pre-scalers, calibration modules and wait-states.

Data Structures

struct CMU_LFXOInit_TypeDef
LFXO initialization structure.
struct CMU_HFXOInit_TypeDef
HFXO initialization structure.
struct CMU_DPLLInit_TypeDef
DPLL initialization structure.

Functions

uint32_t CMU_Calibrate (uint32_t cycles, CMU_Select_TypeDef ref)
Calibrate an oscillator.
void CMU_CalibrateConfig (uint32_t downCycles, CMU_Select_TypeDef downSel, CMU_Select_TypeDef upSel)
Configure clock calibration.
uint32_t CMU_CalibrateCountGet (void)
Get calibration count value.
void CMU_ClkOutPinConfig (uint32_t clkNo, CMU_Select_TypeDef sel, CMU_ClkDiv_TypeDef clkDiv, GPIO_Port_TypeDef port, unsigned int pin)
Direct a clock to a GPIO pin.
CMU_ClkDiv_TypeDef CMU_ClockDivGet ( CMU_Clock_TypeDef clock)
Get clock divisor.
void CMU_ClockDivSet ( CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div)
Set clock divisor.
uint32_t CMU_ClockFreqGet ( CMU_Clock_TypeDef clock)
Get clock frequency for a clock point.
CMU_Select_TypeDef CMU_ClockSelectGet ( CMU_Clock_TypeDef clock)
Get currently selected reference clock used for a clock branch.
void CMU_ClockSelectSet ( CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
Select reference clock/oscillator used for a clock branch.
uint16_t CMU_LF_ClockPrecisionGet ( CMU_Clock_TypeDef clock)
Gets the precision (in PPM) of the specified low frequency clock branch.
CMU_HFRCODPLLFreq_TypeDef CMU_HFRCODPLLBandGet (void)
Get HFRCODPLL band in use.
void CMU_HFRCODPLLBandSet ( CMU_HFRCODPLLFreq_TypeDef freq)
Set HFRCODPLL band and the tuning value based on the value in the calibration table made during production.
bool CMU_DPLLLock (const CMU_DPLLInit_TypeDef *init)
Lock the DPLL to a given frequency.
void CMU_HFXOInit (const CMU_HFXOInit_TypeDef *hfxoInit)
Initialize all HFXO control registers.
void CMU_LFXOInit (const CMU_LFXOInit_TypeDef *lfxoInit)
Initialize LFXO control registers.
void CMU_LFXOPrecisionSet (uint16_t precision)
Sets LFXO's crystal precision, in PPM.
uint32_t CMU_OscillatorTuningGet ( CMU_Osc_TypeDef osc)
Get oscillator frequency tuning setting.
void CMU_OscillatorTuningSet ( CMU_Osc_TypeDef osc, uint32_t val)
Set the oscillator frequency tuning control.
void CMU_UpdateWaitStates (uint32_t freq, int vscale)
Configure wait state settings necessary to switch to a given core clock frequency at a certain voltage scale level.
void CMU_PCNTClockExternalSet (unsigned int instance, bool external)
Select the PCNTn clock.
CMU_HFRCOEM23Freq_TypeDef CMU_HFRCOEM23BandGet (void)
Get HFRCOEM23 band in use.
void CMU_HFRCOEM23BandSet ( CMU_HFRCOEM23Freq_TypeDef freq)
Set HFRCOEM23 band and the tuning value based on the value in the calibration table made during production.
void CMU_ClockEnable ( CMU_Clock_TypeDef clock, bool enable)
Enable/disable a clock.
void CMU_CalibrateCont (bool enable)
Configures continuous calibration mode.
void CMU_CalibrateStart (void)
Starts calibration.
void CMU_CalibrateStop (void)
Stop calibration counters.
void CMU_DPLLUnlock (void)
Unlock the DPLL.
void CMU_IntClear (uint32_t flags)
Clear one or more pending CMU interrupt flags.
void CMU_IntDisable (uint32_t flags)
Disable one or more CMU interrupt sources.
void CMU_IntEnable (uint32_t flags)
Enable one or more CMU interrupt sources.
uint32_t CMU_IntGet (void)
Get pending CMU interrupt sources.
uint32_t CMU_IntGetEnabled (void)
Get enabled and pending CMU interrupt flags.
void CMU_IntSet (uint32_t flags)
Set one or more pending CMU interrupt sources.
void CMU_Lock (void)
Lock CMU register access in order to protect registers contents against unintended modification.
void CMU_OscillatorEnable ( CMU_Osc_TypeDef osc, bool enable, bool wait)
Enable/disable oscillator.
void CMU_Unlock (void)
Unlock CMU register access so that writing to registers is possible.
void CMU_WdogLock (void)
Lock WDOG register access in order to protect registers contents against unintended modification.
void CMU_WdogUnlock (void)
Unlock WDOG register access so that writing to registers is possible.
uint32_t CMU_PrescToLog2 (uint32_t presc)
Convert prescaler dividend to a logarithmic value.

Macros

#define CMU_HFRCODPLL_MIN cmuHFRCODPLLFreq_1M0Hz
HFRCODPLL maximum frequency.
#define CMU_HFRCODPLL_MAX cmuHFRCODPLLFreq_80M0Hz
HFRCODPLL minimum frequency.
#define CMU_HFRCOEM23_MIN cmuHFRCOEM23Freq_1M0Hz
HFRCOEM23 maximum frequency.
#define CMU_HFRCOEM23_MAX cmuHFRCOEM23Freq_40M0Hz
HFRCOEM23 minimum frequency.
#define CMU_LFXOINIT_DEFAULT
Default LFXO initialization values for XTAL mode.
#define CMU_LFXOINIT_EXTERNAL_CLOCK
Default LFXO initialization values for external clock mode.
#define CMU_LFXOINIT_EXTERNAL_SINE
Default LFXO initialization values for external sine mode.
#define CMU_HFXOINIT_DEFAULT
Default HFXO initialization values for XTAL mode.
#define CMU_HFXOINIT_EXTERNAL_SINE
Default HFXO initialization values for external sine mode.
#define CMU_HFXOINIT_EXTERNAL_SINEPKDET
Default HFXO initialization values for external sine mode with peak detector.
#define CMU_DPLL_LFXO_TO_40MHZ
DPLL initialization values for 39,998,805 Hz using LFXO as reference clock, M=2 and N=3661.
#define CMU_DPLL_HFXO_TO_76_8MHZ
DPLL initialization values for 76,800,000 Hz using HFXO as reference clock, M = 1919, N = 3839.
#define CMU_DPLL_HFXO_TO_80MHZ
DPLL initialization values for 80,000,000 Hz using HFXO as reference clock, M = 1919, N = 3999.
#define CMU_DPLLINIT_DEFAULT
Default configurations for DPLL initialization.

Typedefs

typedef uint32_t CMU_ClkDiv_TypeDef
Clock divider configuration.

Enumerations

enum CMU_HFRCODPLLFreq_TypeDef {
cmuHFRCODPLLFreq_1M0Hz = 1000000U,
cmuHFRCODPLLFreq_2M0Hz = 2000000U,
cmuHFRCODPLLFreq_4M0Hz = 4000000U,
cmuHFRCODPLLFreq_7M0Hz = 7000000U,
cmuHFRCODPLLFreq_13M0Hz = 13000000U,
cmuHFRCODPLLFreq_16M0Hz = 16000000U,
cmuHFRCODPLLFreq_19M0Hz = 19000000U,
cmuHFRCODPLLFreq_26M0Hz = 26000000U,
cmuHFRCODPLLFreq_32M0Hz = 32000000U,
cmuHFRCODPLLFreq_38M0Hz = 38000000U,
cmuHFRCODPLLFreq_48M0Hz = 48000000U,
cmuHFRCODPLLFreq_56M0Hz = 56000000U,
cmuHFRCODPLLFreq_64M0Hz = 64000000U,
cmuHFRCODPLLFreq_80M0Hz = 80000000U,
cmuHFRCODPLLFreq_UserDefined = 0
}
HFRCODPLL frequency bands.
enum CMU_HFRCOEM23Freq_TypeDef {
cmuHFRCOEM23Freq_1M0Hz = 1000000U,
cmuHFRCOEM23Freq_2M0Hz = 2000000U,
cmuHFRCOEM23Freq_4M0Hz = 4000000U,
cmuHFRCOEM23Freq_13M0Hz = 13000000U,
cmuHFRCOEM23Freq_16M0Hz = 16000000U,
cmuHFRCOEM23Freq_19M0Hz = 19000000U,
cmuHFRCOEM23Freq_26M0Hz = 26000000U,
cmuHFRCOEM23Freq_32M0Hz = 32000000U,
cmuHFRCOEM23Freq_40M0Hz = 40000000U,
cmuHFRCOEM23Freq_UserDefined = 0
}
HFRCOEM23 frequency bands.
enum CMU_Clock_TypeDef {
cmuClock_SYSCLK ,
cmuClock_HCLK ,
cmuClock_EXPCLK ,
cmuClock_PCLK ,
cmuClock_LSPCLK ,
cmuClock_IADCCLK ,
cmuClock_EM01GRPACLK ,
cmuClock_EM23GRPACLK ,
cmuClock_EM4GRPACLK ,
cmuClock_WDOG0CLK ,
cmuClock_WDOG1CLK ,
cmuClock_DPLLREFCLK ,
cmuClock_TRACECLK ,
cmuClock_RTCCCLK ,
cmuClock_HFRCOEM23 ,
cmuClock_CORE ,
cmuClock_SYSTICK ,
cmuClock_ACMP0 ,
cmuClock_ACMP1 ,
cmuClock_BURTC ,
cmuClock_GPCRC ,
cmuClock_GPIO ,
cmuClock_I2C0 ,
cmuClock_I2C1 ,
cmuClock_IADC0 ,
cmuClock_LDMA ,
cmuClock_LETIMER0 ,
cmuClock_PRS ,
cmuClock_RTCC ,
cmuClock_TIMER0 ,
cmuClock_TIMER1 ,
cmuClock_TIMER2 ,
cmuClock_TIMER3 ,
cmuClock_USART0 ,
cmuClock_USART1 ,
cmuClock_USART2 ,
cmuClock_WDOG0 ,
cmuClock_WDOG1 ,
cmuClock_PDM
}
Clock points in CMU clock-tree.
enum CMU_Osc_TypeDef {
cmuOsc_LFXO ,
cmuOsc_LFRCO ,
cmuOsc_FSRCO ,
cmuOsc_HFXO ,
cmuOsc_HFRCODPLL ,
cmuOsc_HFRCOEM23 ,
cmuOsc_ULFRCO
}
Oscillator types.
enum CMU_Select_TypeDef {
cmuSelect_Error ,
cmuSelect_Disabled ,
cmuSelect_FSRCO ,
cmuSelect_HFXO ,
cmuSelect_HFRCODPLL ,
cmuSelect_HFRCOEM23 ,
cmuSelect_CLKIN0 ,
cmuSelect_LFXO ,
cmuSelect_LFRCO ,
cmuSelect_ULFRCO ,
cmuSelect_PCLK ,
cmuSelect_HCLK ,
cmuSelect_HCLKDIV1024 ,
cmuSelect_EM01GRPACLK ,
cmuSelect_EXPCLK ,
cmuSelect_PRS
}
Selectable clock sources.
enum CMU_DPLLEdgeSel_TypeDef {
cmuDPLLEdgeSel_Fall = 0,
cmuDPLLEdgeSel_Rise = 1
}
DPLL reference clock edge detect selector.
enum CMU_DPLLLockMode_TypeDef {
cmuDPLLLockMode_Freq = _DPLL_CFG_MODE_FLL,
cmuDPLLLockMode_Phase = _DPLL_CFG_MODE_PLL
}
DPLL lock mode selector.
enum CMU_LfxoOscMode_TypeDef {
cmuLfxoOscMode_Crystal = _LFXO_CFG_MODE_XTAL,
cmuLfxoOscMode_AcCoupledSine = _LFXO_CFG_MODE_BUFEXTCLK,
cmuLfxoOscMode_External = _LFXO_CFG_MODE_DIGEXTCLK
}
LFXO oscillator modes.
enum CMU_LfxoStartupDelay_TypeDef {
cmuLfxoStartupDelay_2Cycles = _LFXO_CFG_TIMEOUT_CYCLES2,
cmuLfxoStartupDelay_256Cycles = _LFXO_CFG_TIMEOUT_CYCLES256,
cmuLfxoStartupDelay_1KCycles = _LFXO_CFG_TIMEOUT_CYCLES1K,
cmuLfxoStartupDelay_2KCycles = _LFXO_CFG_TIMEOUT_CYCLES2K,
cmuLfxoStartupDelay_4KCycles = _LFXO_CFG_TIMEOUT_CYCLES4K,
cmuLfxoStartupDelay_8KCycles = _LFXO_CFG_TIMEOUT_CYCLES8K,
cmuLfxoStartupDelay_16KCycles = _LFXO_CFG_TIMEOUT_CYCLES16K,
cmuLfxoStartupDelay_32KCycles = _LFXO_CFG_TIMEOUT_CYCLES32K
}
LFXO start-up timeout delay.
enum CMU_HfxoOscMode_TypeDef {
cmuHfxoOscMode_Crystal = _HFXO_CFG_MODE_XTAL,
cmuHfxoOscMode_ExternalSine = _HFXO_CFG_MODE_EXTCLK
}
HFXO oscillator modes.
enum CMU_HfxoCbLsbTimeout_TypeDef {
cmuHfxoCbLsbTimeout_8us = _HFXO_XTALCFG_TIMEOUTCBLSB_T8US,
cmuHfxoCbLsbTimeout_20us = _HFXO_XTALCFG_TIMEOUTCBLSB_T20US,
cmuHfxoCbLsbTimeout_41us = _HFXO_XTALCFG_TIMEOUTCBLSB_T41US,
cmuHfxoCbLsbTimeout_62us = _HFXO_XTALCFG_TIMEOUTCBLSB_T62US,
cmuHfxoCbLsbTimeout_83us = _HFXO_XTALCFG_TIMEOUTCBLSB_T83US,
cmuHfxoCbLsbTimeout_104us = _HFXO_XTALCFG_TIMEOUTCBLSB_T104US,
cmuHfxoCbLsbTimeout_125us = _HFXO_XTALCFG_TIMEOUTCBLSB_T125US,
cmuHfxoCbLsbTimeout_166us = _HFXO_XTALCFG_TIMEOUTCBLSB_T166US,
cmuHfxoCbLsbTimeout_208us = _HFXO_XTALCFG_TIMEOUTCBLSB_T208US,
cmuHfxoCbLsbTimeout_250us = _HFXO_XTALCFG_TIMEOUTCBLSB_T250US,
cmuHfxoCbLsbTimeout_333us = _HFXO_XTALCFG_TIMEOUTCBLSB_T333US,
cmuHfxoCbLsbTimeout_416us = _HFXO_XTALCFG_TIMEOUTCBLSB_T416US,
cmuHfxoCbLsbTimeout_833us = _HFXO_XTALCFG_TIMEOUTCBLSB_T833US,
cmuHfxoCbLsbTimeout_1250us = _HFXO_XTALCFG_TIMEOUTCBLSB_T1250US,
cmuHfxoCbLsbTimeout_2083us = _HFXO_XTALCFG_TIMEOUTCBLSB_T2083US,
cmuHfxoCbLsbTimeout_3750us = _HFXO_XTALCFG_TIMEOUTCBLSB_T3750US
}
HFXO core bias LSB change timeout.
enum CMU_HfxoSteadyStateTimeout_TypeDef {
cmuHfxoSteadyStateTimeout_16us = _HFXO_XTALCFG_TIMEOUTSTEADY_T16US,
cmuHfxoSteadyStateTimeout_41us = _HFXO_XTALCFG_TIMEOUTSTEADY_T41US,
cmuHfxoSteadyStateTimeout_83us = _HFXO_XTALCFG_TIMEOUTSTEADY_T83US,
cmuHfxoSteadyStateTimeout_125us = _HFXO_XTALCFG_TIMEOUTSTEADY_T125US,
cmuHfxoSteadyStateTimeout_166us = _HFXO_XTALCFG_TIMEOUTSTEADY_T166US,
cmuHfxoSteadyStateTimeout_208us = _HFXO_XTALCFG_TIMEOUTSTEADY_T208US,
cmuHfxoSteadyStateTimeout_250us = _HFXO_XTALCFG_TIMEOUTSTEADY_T250US,
cmuHfxoSteadyStateTimeout_333us = _HFXO_XTALCFG_TIMEOUTSTEADY_T333US,
cmuHfxoSteadyStateTimeout_416us = _HFXO_XTALCFG_TIMEOUTSTEADY_T416US,
cmuHfxoSteadyStateTimeout_500us = _HFXO_XTALCFG_TIMEOUTSTEADY_T500US,
cmuHfxoSteadyStateTimeout_666us = _HFXO_XTALCFG_TIMEOUTSTEADY_T666US,
cmuHfxoSteadyStateTimeout_833us = _HFXO_XTALCFG_TIMEOUTSTEADY_T833US,
cmuHfxoSteadyStateTimeout_1666us = _HFXO_XTALCFG_TIMEOUTSTEADY_T1666US,
cmuHfxoSteadyStateTimeout_2500us = _HFXO_XTALCFG_TIMEOUTSTEADY_T2500US,
cmuHfxoSteadyStateTimeout_4166us = _HFXO_XTALCFG_TIMEOUTSTEADY_T4166US,
cmuHfxoSteadyStateTimeout_7500us = _HFXO_XTALCFG_TIMEOUTSTEADY_T7500US
}
HFXO steady state timeout.
enum CMU_HfxoCoreDegen_TypeDef {
cmuHfxoCoreDegen_None = _HFXO_XTALCTRL_COREDGENANA_NONE,
cmuHfxoCoreDegen_33 = _HFXO_XTALCTRL_COREDGENANA_DGEN33,
cmuHfxoCoreDegen_50 = _HFXO_XTALCTRL_COREDGENANA_DGEN50,
cmuHfxoCoreDegen_100 = _HFXO_XTALCTRL_COREDGENANA_DGEN100
}
HFXO core degeneration control.
enum CMU_HfxoCtuneFixCap_TypeDef {
cmuHfxoCtuneFixCap_None = _HFXO_XTALCTRL_CTUNEFIXANA_NONE,
cmuHfxoCtuneFixCap_Xi = _HFXO_XTALCTRL_CTUNEFIXANA_XI,
cmuHfxoCtuneFixCap_Xo = _HFXO_XTALCTRL_CTUNEFIXANA_XO,
cmuHfxoCtuneFixCap_Both = _HFXO_XTALCTRL_CTUNEFIXANA_BOTH
}
HFXO XI and XO pin fixed capacitor control.
enum CMU_Precision_TypeDef {
cmuPrecisionDefault ,
cmuPrecisionHigh
}
Oscillator precision modes.

Function Documentation

CMU_Calibrate()

uint32_t CMU_Calibrate ( uint32_t cycles,
CMU_Select_TypeDef ref
)

Calibrate an oscillator.

Run a calibration of a selectable reference clock againt HCLK. Please refer to the reference manual, CMU chapter, for further details.

Note
This function will not return until calibration measurement is completed.
Parameters
[in] cycles The number of HCLK cycles to run calibration. Increasing this number increases precision, but the calibration will take more time.
[in] ref The reference clock used to compare against HCLK.
Returns
The number of ticks the selected reference clock ticked while running cycles ticks of the HCLK clock.

CMU_CalibrateConfig()

void CMU_CalibrateConfig ( uint32_t downCycles,
CMU_Select_TypeDef downSel,
CMU_Select_TypeDef upSel
)

Configure clock calibration.

Configure a calibration for a selectable clock source against another selectable reference clock. Refer to the reference manual, CMU chapter, for further details.

Note
After configuration, a call to CMU_CalibrateStart() is required, and the resulting calibration value can be read with the CMU_CalibrateCountGet() function call.
Parameters
[in] downCycles The number of downSel clock cycles to run calibration. Increasing this number increases precision, but the calibration will take more time.
[in] downSel The clock which will be counted down downCycles cycles.
[in] upSel The reference clock, the number of cycles generated by this clock will be counted and added up, the result can be given with the CMU_CalibrateCountGet() function call.

CMU_CalibrateCountGet()

uint32_t CMU_CalibrateCountGet ( void )

Get calibration count value.

Note
If continuous calibrartion mode is active, calibration busy will almost always be off, and we just need to read the value, where the normal case would be that this function call has been triggered by the CALRDY interrupt flag.
Returns
Calibration count, the number of UPSEL clocks (see CMU_CalibrateConfig() ) in the period of DOWNSEL oscillator clock cycles configured by a previous write operation to CMU->CALCNT.

CMU_ClkOutPinConfig()

void CMU_ClkOutPinConfig ( uint32_t clkNo,
CMU_Select_TypeDef sel,
CMU_ClkDiv_TypeDef clkDiv,
GPIO_Port_TypeDef port,
unsigned int pin
)

Direct a clock to a GPIO pin.

Parameters
[in] clkNo Selects between CLKOUT0, CLKOUT1 or CLKOUT2 outputs. Use values 0,1or 2.
[in] sel Select clock source.
[in] clkDiv Select a clock divisor (1..32). Only applicable when cmuSelect_EXPCLK is slexted as clock source.
[in] port GPIO port.
[in] pin GPIO pin.
Note
Refer to the reference manual and the datasheet for details on which GPIO port/pins that are available.

CMU_ClockDivGet()

Get clock divisor.

Parameters
[in] clock Clock point to get divisor for. Notice that not all clock points have a divisors. Please refer to CMU overview in reference manual.
Returns
The current clock point divisor. 1 is returned if clock specifies a clock point without divisor.

CMU_ClockDivSet()

void CMU_ClockDivSet (