LDMA - Linked DMA
Description
Linked Direct Memory Access (LDMA) Peripheral API.
LDMA API functions provide full support for the LDMA peripheral.
LDMA supports these DMA transfer types:
- Memory to memory.
- Memory to peripheral.
- Peripheral to memory.
- Peripheral to peripheral.
- Constant value to memory.
LDMA supports linked lists of DMA descriptors allowing:
- Circular and ping-pong buffer transfers.
- Scatter-gather transfers.
- Looped transfers.
LDMA has some advanced features:
- Intra-channel synchronization (SYNC), allowing hardware events to pause and restart a DMA sequence.
- Immediate-write (WRI), allowing DMA to write a constant anywhere in the memory map.
- Complex flow control allowing if-else constructs.
Basic understanding of LDMA controller is assumed. Please refer to the reference manual for further details. The LDMA examples described in the reference manual are particularly helpful in understanding LDMA operations.
In order to use the DMA controller, the initialization function LDMA_Init() must have been executed once (normally during system initialization).
DMA transfers are initiated by a call to LDMA_StartTransfer() , transfer properties are controlled by the contents of LDMA_TransferCfg_t and LDMA_Descriptor_t structure parameters. The LDMA_Descriptor_t structure parameter may be a pointer to an array of descriptors, descriptors in array should be linked together as needed.
Transfer and descriptor initialization macros are provided for the most common transfer types. Due to the flexibility of LDMA peripheral, only a small subset of all possible initializer macros are provided, users should create new ones when needed.
Examples of LDMA usage:
A simple memory to memory transfer:
A linked list of three memory to memory transfers:
DMA from serial port peripheral to memory:
Ping-pong DMA from serial port peripheral to memory:
- Note
- LDMA module does not implement LDMA interrupt handler. A template for an LDMA IRQ handler is included here as an example.
Data Structures |
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union | LDMA_Descriptor_t |
DMA descriptor.
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struct | LDMA_Init_t |
LDMA initialization configuration structure.
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struct | LDMA_TransferCfg_t |
DMA transfer configuration structure.
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Functions |
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void | LDMA_DeInit (void) |
De-initialize the LDMA controller.
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void | LDMA_EnableChannelRequest (int ch, bool enable) |
Enable or disable an LDMA channel request.
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void | LDMA_Init (const LDMA_Init_t *init) |
Initialize the LDMA controller.
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void | LDMA_StartTransfer (int ch, const LDMA_TransferCfg_t *transfer, const LDMA_Descriptor_t *descriptor) |
Start a DMA transfer.
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void | LDMA_StopTransfer (int ch) |
Stop a DMA transfer.
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bool | LDMA_TransferDone (int ch) |
Check if a DMA transfer has completed.
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uint32_t | LDMA_TransferRemainingCount (int ch) |
Get the number of items remaining in a transfer.
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bool | LDMA_ChannelEnabled (int ch) |
Check if a certain channel is enabled.
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void | LDMA_IntClear (uint32_t flags) |
Clear one or more pending LDMA interrupts.
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void | LDMA_IntDisable (uint32_t flags) |
Disable one or more LDMA interrupts.
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void | LDMA_IntEnable (uint32_t flags) |
Enable one or more LDMA interrupts.
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uint32_t | LDMA_IntGet (void) |
Get pending LDMA interrupt flags.
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uint32_t | LDMA_IntGetEnabled (void) |
Get enabled and pending LDMA interrupt flags.
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void | LDMA_IntSet (uint32_t flags) |
Set one or more pending LDMA interrupts.
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Macros |
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#define | LDMA_INIT_DEFAULT |
Default DMA initialization structure.
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#define | LDMA_TRANSFER_CFG_MEMORY () |
Generic DMA transfer configuration for memory to memory transfers.
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#define | LDMA_TRANSFER_CFG_MEMORY_LOOP (loopCnt) |
Generic DMA transfer configuration for looped memory to memory transfers.
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#define | LDMA_TRANSFER_CFG_PERIPHERAL (signal) |
Generic DMA transfer configuration for memory to/from peripheral transfers.
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#define | LDMA_TRANSFER_CFG_PERIPHERAL_LOOP (signal, loopCnt) |
Generic DMA transfer configuration for looped memory to/from peripheral transfers.
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#define | LDMA_DESCRIPTOR_SINGLE_M2M_WORD (src, dest, count) |
DMA descriptor initializer for single memory to memory word transfer.
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#define | LDMA_DESCRIPTOR_SINGLE_M2M_HALF (src, dest, count) |
DMA descriptor initializer for single memory to memory half-word transfer.
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#define | LDMA_DESCRIPTOR_SINGLE_M2M_BYTE (src, dest, count) |
DMA descriptor initializer for single memory to memory byte transfer.
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#define | LDMA_DESCRIPTOR_LINKABS_M2M_WORD (src, dest, count) |
DMA descriptor initializer for linked memory to memory word transfer.
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#define | LDMA_DESCRIPTOR_LINKABS_M2M_HALF (src, dest, count) |
DMA descriptor initializer for linked memory to memory half-word transfer.
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#define | LDMA_DESCRIPTOR_LINKABS_M2M_BYTE (src, dest, count) |
DMA descriptor initializer for linked memory to memory byte transfer.
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#define | LDMA_DESCRIPTOR_LINKREL_M2M_WORD (src, dest, count, linkjmp) |
DMA descriptor initializer for linked memory to memory word transfer.
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#define | LDMA_DESCRIPTOR_LINKREL_M2M_HALF (src, dest, count, linkjmp) |
DMA descriptor initializer for linked memory to memory half-word transfer.
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#define | LDMA_DESCRIPTOR_LINKREL_M2M_BYTE (src, dest, count, linkjmp) |
DMA descriptor initializer for linked memory to memory byte transfer.
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#define | LDMA_DESCRIPTOR_SINGLE_P2M_BYTE (src, dest, count) |
DMA descriptor initializer for byte transfers from a peripheral to memory.
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#define | LDMA_DESCRIPTOR_SINGLE_P2P_BYTE (src, dest, count) |
DMA descriptor initializer for byte transfers from a peripheral to a peripheral.
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#define | LDMA_DESCRIPTOR_SINGLE_M2P_BYTE (src, dest, count) |
DMA descriptor initializer for byte transfers from memory to a peripheral.
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#define | LDMA_DESCRIPTOR_LINKREL_P2M_BYTE (src, dest, count, linkjmp) |
DMA descriptor initializer for byte transfers from a peripheral to memory.
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#define | LDMA_DESCRIPTOR_LINKREL_P2M_WORD (src, dest, count, linkjmp) |
DMA descriptor initializer for word transfers from a peripheral to memory.
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#define | LDMA_DESCRIPTOR_LINKREL_M2P_BYTE (src, dest, count, linkjmp) |
DMA descriptor initializer for byte transfers from memory to a peripheral.
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#define | LDMA_DESCRIPTOR_SINGLE_WRITE (value, address) |
DMA descriptor initializer for Immediate WRITE transfer.
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#define | LDMA_DESCRIPTOR_LINKABS_WRITE (value, address) |
DMA descriptor initializer for Immediate WRITE transfer.
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#define | LDMA_DESCRIPTOR_LINKREL_WRITE (value, address, linkjmp) |
DMA descriptor initializer for Immediate WRITE transfer.
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#define | LDMA_DESCRIPTOR_SINGLE_SYNC (set, clr, matchValue, matchEnable) |
DMA descriptor initializer for SYNC transfer.
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#define | LDMA_DESCRIPTOR_LINKABS_SYNC (set, clr, matchValue, matchEnable) |
DMA descriptor initializer for SYNC transfer.
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#define | LDMA_DESCRIPTOR_LINKREL_SYNC (set, clr, matchValue, matchEnable, linkjmp) |
DMA descriptor initializer for SYNC transfer.
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Enumerations |
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enum |
LDMA_CtrlBlockSize_t
{
ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1, ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2, ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3, ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4, ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6, ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8, ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16, ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32, ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64, ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128, ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256, ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512, ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024, ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL } |
Controls the number of unit data transfers per arbitration cycle, providing a means to balance DMA channels' load on the controller.
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enum |
LDMA_CtrlStructType_t
{
ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER, ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE, ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE } |
DMA structure type.
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enum |
LDMA_CtrlReqMode_t
{
ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK, ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL } |
DMA transfer block or cycle selector.
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enum |
LDMA_CtrlSrcInc_t
{
ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE, ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO, ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR, ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE } |
Source address increment unit size.
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enum |
LDMA_CtrlSize_t
{
ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE, ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD, ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD } |
DMA transfer unit size.
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enum |
LDMA_CtrlDstInc_t
{
ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE, ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO, ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR, ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE } |
Destination address increment unit size.
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enum |
LDMA_CtrlSrcAddrMode_t
{
ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE, ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE } |
Source addressing mode.
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enum |
LDMA_CtrlDstAddrMode_t
{
ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE, ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE } |
Destination addressing mode.
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enum |
LDMA_LinkMode_t
{
ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE, ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE } |
DMA link load address mode.
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enum |
LDMA_CfgArbSlots_t
{
ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE, ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO, ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR, ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT } |
Insert extra arbitration slots to increase channel arbitration priority.
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enum |
LDMA_CfgSrcIncSign_t
{
ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE, ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE } |
Source address increment sign.
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enum |
LDMA_CfgDstIncSign_t
{
ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE, ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE } |
Destination address increment sign.
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enum |
LDMA_PeripheralSignal_t
{
ldmaPeripheralSignal_NONE = LDMAXBAR_CH_REQSEL_SOURCESEL_NONE, ldmaPeripheralSignal_LDMAXBAR_PRSREQ0 = LDMAXBAR_CH_REQSEL_SIGSEL_LDMAXBARPRSREQ0 | LDMAXBAR_CH_REQSEL_SOURCESEL_LDMAXBAR, ldmaPeripheralSignal_LDMAXBAR_PRSREQ1 = LDMAXBAR_CH_REQSEL_SIGSEL_LDMAXBARPRSREQ1 | LDMAXBAR_CH_REQSEL_SOURCESEL_LDMAXBAR, ldmaPeripheralSignal_TIMER0_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER0_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER0_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER0_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0, ldmaPeripheralSignal_TIMER1_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_TIMER1_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1, ldmaPeripheralSignal_USART0_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART0_RXDATAVRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART0RXDATAVRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART0_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART0_TXBLRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXBLRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART0_TXEMPTY = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0, ldmaPeripheralSignal_USART1_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_USART1RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_RXDATAVRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_USART1TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_TXBLRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART1TXBLRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART1_TXEMPTY = LDMAXBAR_CH_REQSEL_SIGSEL_USART1TXEMPTY | LDMAXBAR_CH_REQSEL_SOURCESEL_USART1, ldmaPeripheralSignal_USART2_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_USART2RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART2_RXDATAVRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART2RXDATAVRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART2_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_USART2TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART2_TXBLRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART2TXBLRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_USART2_TXEMPTY = LDMAXBAR_CH_REQSEL_SIGSEL_USART2TXEMPTY | LDMAXBAR_CH_REQSEL_SOURCESEL_USART2, ldmaPeripheralSignal_I2C0_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C0, ldmaPeripheralSignal_I2C0_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_I2C0TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C0, ldmaPeripheralSignal_I2C1_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C1, ldmaPeripheralSignal_I2C1_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_I2C1TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C1, ldmaPeripheralSignal_AGC_RSSI = LDMAXBAR_CH_REQSEL_SIGSEL_AGCRSSI | LDMAXBAR_CH_REQSEL_SOURCESEL_AGC, ldmaPeripheralSignal_PROTIMER_BOF = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERBOF | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERCC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERCC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERCC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_CC3 = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERCC3 | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_CC4 = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERCC4 | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_POF = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERPOF | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_PROTIMER_WOF = LDMAXBAR_CH_REQSEL_SIGSEL_PROTIMERWOF | LDMAXBAR_CH_REQSEL_SOURCESEL_PROTIMER, ldmaPeripheralSignal_MODEM_DEBUG = LDMAXBAR_CH_REQSEL_SIGSEL_MODEMDEBUG | LDMAXBAR_CH_REQSEL_SOURCESEL_MODEM, ldmaPeripheralSignal_IADC0_IADC_SCAN = LDMAXBAR_CH_REQSEL_SIGSEL_IADC0IADC_SCAN | LDMAXBAR_CH_REQSEL_SOURCESEL_IADC0, ldmaPeripheralSignal_IADC0_IADC_SINGLE = LDMAXBAR_CH_REQSEL_SIGSEL_IADC0IADC_SINGLE | LDMAXBAR_CH_REQSEL_SOURCESEL_IADC0, ldmaPeripheralSignal_MSC_WDATA = LDMAXBAR_CH_REQSEL_SIGSEL_MSCWDATA | LDMAXBAR_CH_REQSEL_SOURCESEL_MSC, ldmaPeripheralSignal_TIMER2_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2, ldmaPeripheralSignal_TIMER2_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2, ldmaPeripheralSignal_TIMER2_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2, ldmaPeripheralSignal_TIMER2_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2, ldmaPeripheralSignal_TIMER3_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3, ldmaPeripheralSignal_TIMER3_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3, ldmaPeripheralSignal_TIMER3_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3, ldmaPeripheralSignal_TIMER3_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3 } |
Peripherals that can trigger LDMA transfers.
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Function Documentation
◆ LDMA_DeInit()
void LDMA_DeInit | ( | void |
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De-initialize the LDMA controller.
LDMA interrupts are disabled and the LDMA clock is stopped.
◆ LDMA_EnableChannelRequest()
void LDMA_EnableChannelRequest | ( | int |
ch,
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bool |
enable
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Enable or disable an LDMA channel request.
Use this function to enable or disable an LDMA channel request. This will prevent the LDMA from proceeding after its current transaction if disabled.
- Parameters
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[in] ch
LDMA channel to enable or disable requests. [in] enable
If 'true', the request will be enabled. If 'false', the request will be disabled.
◆ LDMA_Init()
void LDMA_Init | ( | const LDMA_Init_t * |
init
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Initialize the LDMA controller.
This function will disable all the LDMA channels and enable the LDMA bus clock in the CMU. This function will also enable the LDMA IRQ in the NVIC and set the LDMA IRQ priority to a user-configurable priority. The LDMA interrupt priority is configured using the LDMA_Init_t structure.
- Note
- Since this function enables the LDMA IRQ, always add a custom LDMA_IRQHandler to the application to handle any interrupts from LDMA.
- Parameters
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[in] init
A pointer to the initialization structure used to configure the LDMA.
◆ LDMA_StartTransfer()
void LDMA_StartTransfer | ( | int |
ch,
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const LDMA_TransferCfg_t * |
transfer,
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const LDMA_Descriptor_t * |
descriptor
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Start a DMA transfer.
- Parameters
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[in] ch
A DMA channel. [in] transfer
The initialization structure used to configure the transfer. [in] descriptor
The transfer descriptor, which can be an array of descriptors linked together.