PRS_TypeDef Struct ReferenceDevices > EFR32MG13P932F512GM48 > Peripheral TypeDefsDevices > EFR32MG13P932F512GM48 > | Bit Fields > PRSDevices > | PRS
PRS Register Declaration
Definition at line
435
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efr32mg13p932f512gm48.h
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#include <
efr32mg13p932f512gm48.h
>
Data Fields |
|
PRS_CH_TypeDef | CH [12] |
__IOM uint32_t | CTRL |
__IOM uint32_t | DMAREQ0 |
__IOM uint32_t | DMAREQ1 |
__IM uint32_t | PEEK |
uint32_t | RESERVED0 [1] |
uint32_t | RESERVED1 [5] |
uint32_t | RESERVED2 [1] |
uint32_t | RESERVED3 [3] |
__IOM uint32_t | ROUTELOC0 |
__IOM uint32_t | ROUTELOC1 |
__IOM uint32_t | ROUTELOC2 |
__IOM uint32_t | ROUTEPEN |
__IOM uint32_t | SWLEVEL |
__IOM uint32_t | SWPULSE |
Field Documentation
PRS_CH_TypeDef PRS_TypeDef::CH |
Channel registers
Definition at line
452
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efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::CTRL |
Control Register
Definition at line
445
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efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::DMAREQ0 |
DMA Request 0 Register
Definition at line
446
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efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::DMAREQ1 |
DMA Request 1 Register
Definition at line
447
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efr32mg13p932f512gm48.h
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__IM uint32_t PRS_TypeDef::PEEK |
PRS Channel Values
Definition at line
449
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efr32mg13p932f512gm48.h
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uint32_t PRS_TypeDef::RESERVED0 |
Reserved for future use
Definition at line
439
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efr32mg13p932f512gm48.h
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uint32_t PRS_TypeDef::RESERVED1 |
Reserved for future use
Definition at line
444
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efr32mg13p932f512gm48.h
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uint32_t PRS_TypeDef::RESERVED2 |
Reserved for future use
Definition at line
448
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efr32mg13p932f512gm48.h
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uint32_t PRS_TypeDef::RESERVED3 |
Reserved registers
Definition at line
451
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efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::ROUTELOC0 |
I/O Routing Location Register
Definition at line
440
of file
efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::ROUTELOC1 |
I/O Routing Location Register
Definition at line
441
of file
efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::ROUTELOC2 |
I/O Routing Location Register
Definition at line
442
of file
efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::ROUTEPEN |
I/O Routing Pin Enable Register
Definition at line
438
of file
efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::SWLEVEL |
Software Level Register
Definition at line
437
of file
efr32mg13p932f512gm48.h
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__IOM uint32_t PRS_TypeDef::SWPULSE |
Software Pulse Register
Definition at line
436
of file
efr32mg13p932f512gm48.h
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The documentation for this struct was generated from the following files:
-
C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFR32MG13P/Include/
efr32mg13p932f512gm48.h
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C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFR32MG13P/Include/
efr32mg13p_prs.h