Peripheral DeclarationsDevices > EFR32BG12P433F1024GL125

Macros

#define ACMP0 (( ACMP_TypeDef *) ACMP0_BASE )
#define ACMP1 (( ACMP_TypeDef *) ACMP1_BASE )
#define ADC0 (( ADC_TypeDef *) ADC0_BASE )
#define CMU (( CMU_TypeDef *) CMU_BASE )
#define CRYOTIMER (( CRYOTIMER_TypeDef *) CRYOTIMER_BASE )
#define CRYPTO CRYPTO0
#define CRYPTO0 (( CRYPTO_TypeDef *) CRYPTO0_BASE )
#define CRYPTO1 (( CRYPTO_TypeDef *) CRYPTO1_BASE )
#define CSEN (( CSEN_TypeDef *) CSEN_BASE )
#define DEVINFO (( DEVINFO_TypeDef *) DEVINFO_BASE )
#define EMU (( EMU_TypeDef *) EMU_BASE )
#define ETM (( ETM_TypeDef *) ETM_BASE )
#define FPUEH (( FPUEH_TypeDef *) FPUEH_BASE )
#define GPCRC (( GPCRC_TypeDef *) GPCRC_BASE )
#define GPIO (( GPIO_TypeDef *) GPIO_BASE )
#define I2C0 (( I2C_TypeDef *) I2C0_BASE )
#define I2C1 (( I2C_TypeDef *) I2C1_BASE )
#define IDAC0 (( IDAC_TypeDef *) IDAC0_BASE )
#define LDMA (( LDMA_TypeDef *) LDMA_BASE )
#define LESENSE (( LESENSE_TypeDef *) LESENSE_BASE )
#define LETIMER0 (( LETIMER_TypeDef *) LETIMER0_BASE )
#define LEUART0 (( LEUART_TypeDef *) LEUART0_BASE )
#define MSC (( MSC_TypeDef *) MSC_BASE )
#define PCNT0 (( PCNT_TypeDef *) PCNT0_BASE )
#define PCNT1 (( PCNT_TypeDef *) PCNT1_BASE )
#define PCNT2 (( PCNT_TypeDef *) PCNT2_BASE )
#define PRS (( PRS_TypeDef *) PRS_BASE )
#define RMU (( RMU_TypeDef *) RMU_BASE )
#define ROMTABLE (( ROMTABLE_TypeDef *) ROMTABLE_BASE )
#define RTCC (( RTCC_TypeDef *) RTCC_BASE )
#define SMU (( SMU_TypeDef *) SMU_BASE )
#define TIMER0 (( TIMER_TypeDef *) TIMER0_BASE )
#define TIMER1 (( TIMER_TypeDef *) TIMER1_BASE )
#define TRNG0 (( TRNG_TypeDef *) TRNG0_BASE )
#define USART0 (( USART_TypeDef *) USART0_BASE )
#define USART1 (( USART_TypeDef *) USART1_BASE )
#define USART2 (( USART_TypeDef *) USART2_BASE )
#define USART3 (( USART_TypeDef *) USART3_BASE )
#define VDAC0 (( VDAC_TypeDef *) VDAC0_BASE )
#define WDOG0 (( WDOG_TypeDef *) WDOG0_BASE )
#define WDOG1 (( WDOG_TypeDef *) WDOG1_BASE )
#define WTIMER0 (( TIMER_TypeDef *) WTIMER0_BASE )
#define WTIMER1 (( TIMER_TypeDef *) WTIMER1_BASE )

Macro Definition Documentation

#define ACMP0   (( ACMP_TypeDef *) ACMP0_BASE )

ACMP0 base pointer

Definition at line 478 of file efr32bg12p433f1024gl125.h .

Referenced by CAPLESENSE_setupACMP() .

#define ACMP1   (( ACMP_TypeDef *) ACMP1_BASE )

ACMP1 base pointer

Definition at line 479 of file efr32bg12p433f1024gl125.h .

Referenced by CAPLESENSE_setupACMP() .

#define ADC0   (( ADC_TypeDef *) ADC0_BASE )

ADC0 base pointer

Definition at line 477 of file efr32bg12p433f1024gl125.h .

Referenced by ADC0_IRQHandler() , adcInit() , getAdcSample() , MIC_init() , MIC_start() , TOUCH_GetPos() , and TOUCH_Init() .

#define CRYPTO CRYPTO0

Alias for CRYPTO0 base pointer

Definition at line 454 of file efr32bg12p433f1024gl125.h .

#define CRYPTO0   (( CRYPTO_TypeDef *) CRYPTO0_BASE )

CRYPTO0 base pointer

Definition at line 453 of file efr32bg12p433f1024gl125.h .

#define CRYPTO1   (( CRYPTO_TypeDef *) CRYPTO1_BASE )

CRYPTO1 base pointer

Definition at line 455 of file efr32bg12p433f1024gl125.h .

#define CSEN   (( CSEN_TypeDef *) CSEN_BASE )

CSEN base pointer

Definition at line 482 of file efr32bg12p433f1024gl125.h .

#define ETM   (( ETM_TypeDef *) ETM_BASE )

ETM base pointer

Definition at line 487 of file efr32bg12p433f1024gl125.h .

#define FPUEH   (( FPUEH_TypeDef *) FPUEH_BASE )

FPUEH base pointer

Definition at line 459 of file efr32bg12p433f1024gl125.h .

#define GPCRC   (( GPCRC_TypeDef *) GPCRC_BASE )

GPCRC base pointer

Definition at line 460 of file efr32bg12p433f1024gl125.h .

#define I2C0   (( I2C_TypeDef *) I2C0_BASE )

I2C0 base pointer

Definition at line 475 of file efr32bg12p433f1024gl125.h .

Referenced by I2C_Transfer() , I2C_TransferInit() , I2CSPM_Init() , performI2CTransfer() , and setupI2C() .

#define I2C1   (( I2C_TypeDef *) I2C1_BASE )

I2C1 base pointer

Definition at line 476 of file efr32bg12p433f1024gl125.h .

Referenced by BOARD_i2cBusSelect() , BOARD_init() , I2C_Transfer() , I2C_TransferInit() , and I2CSPM_Init() .

#define IDAC0   (( IDAC_TypeDef *) IDAC0_BASE )

IDAC0 base pointer

Definition at line 480 of file efr32bg12p433f1024gl125.h .

Referenced by IDAC_RangeSet() .

#define LETIMER0   (( LETIMER_TypeDef *) LETIMER0_BASE )

LETIMER0 base pointer

Definition at line 470 of file efr32bg12p433f1024gl125.h .

#define LEUART0   (( LEUART_TypeDef *) LEUART0_BASE )

LEUART0 base pointer

Definition at line 469 of file efr32bg12p433f1024gl125.h .

Referenced by LEUART_BaudrateGet() , LEUART_BaudrateSet() , and UARTDRV_InitLeuart() .

#define PCNT0   (( PCNT_TypeDef *) PCNT0_BASE )

PCNT0 base pointer

Definition at line 472 of file efr32bg12p433f1024gl125.h .

Referenced by PCNT_CounterTopSet() , PCNT_Init() , and PCNT_TopSet() .

#define PCNT1   (( PCNT_TypeDef *) PCNT1_BASE )

PCNT1 base pointer

Definition at line 473 of file efr32bg12p433f1024gl125.h .

Referenced by PCNT_CounterTopSet() , PCNT_Init() , and PCNT_TopSet() .

#define PCNT2   (( PCNT_TypeDef *) PCNT2_BASE )

PCNT2 base pointer

Definition at line 474 of file efr32bg12p433f1024gl125.h .

Referenced by PCNT_CounterTopSet() , PCNT_Init() , and PCNT_TopSet() .

#define PRS   (( PRS_TypeDef *) PRS_BASE )

PRS base pointer

Definition at line 457 of file efr32bg12p433f1024gl125.h .

Referenced by CAPSENSE_Init() , ezradio_hal_GpioInit() , PRS_LevelSet() , PRS_PulseTrigger() , PRS_SourceAsyncSignalSet() , and PRS_SourceSignalSet() .

#define RMU   (( RMU_TypeDef *) RMU_BASE )

RMU base pointer

Definition at line 451 of file efr32bg12p433f1024gl125.h .

Referenced by RMU_ResetCauseClear() , RMU_ResetCauseGet() , RMU_ResetControl() , RMU_UserResetStateGet() , and RMU_UserResetStateSet() .

#define ROMTABLE   (( ROMTABLE_TypeDef *) ROMTABLE_BASE )

ROMTABLE base pointer

Definition at line 491 of file efr32bg12p433f1024gl125.h .

Referenced by SYSTEM_ChipRevisionGet() .

#define TIMER1   (( TIMER_TypeDef *) TIMER1_BASE )

TIMER1 base pointer

Definition at line 462 of file efr32bg12p433f1024gl125.h .

Referenced by CAPSENSE_Init() , CAPSENSE_Measure() , TIMER0_IRQHandler() , and TIMER_Valid() .

#define TRNG0   (( TRNG_TypeDef *) TRNG0_BASE )

TRNG0 base pointer

Definition at line 489 of file efr32bg12p433f1024gl125.h .

#define USART0   (( USART_TypeDef *) USART0_BASE )

USART0 base pointer

Definition at line 465 of file efr32bg12p433f1024gl125.h .

Referenced by SPIDRV_Init() , UARTDRV_InitUart() , and USART_InitIrDA() .

#define USART1   (( USART_TypeDef *) USART1_BASE )

USART1 base pointer

Definition at line 466 of file efr32bg12p433f1024gl125.h .

Referenced by SPI_TFT_Init() , SPI_TFT_WriteRegister() , SPIDRV_Init() , UARTDRV_InitUart() , and USART_InitIrDA() .

#define USART2   (( USART_TypeDef *) USART2_BASE )

USART2 base pointer

Definition at line 467 of file efr32bg12p433f1024gl125.h .

Referenced by SPIDRV_Init() , and UARTDRV_InitUart() .

#define USART3   (( USART_TypeDef *) USART3_BASE )

USART3 base pointer

Definition at line 468 of file efr32bg12p433f1024gl125.h .

Referenced by SPIDRV_Init() , and UARTDRV_InitUart() .

#define VDAC0   (( VDAC_TypeDef *) VDAC0_BASE )

VDAC0 base pointer

Definition at line 481 of file efr32bg12p433f1024gl125.h .

#define WDOG0   (( WDOG_TypeDef *) WDOG0_BASE )

WDOG0 base pointer

Definition at line 485 of file efr32bg12p433f1024gl125.h .

#define WDOG1   (( WDOG_TypeDef *) WDOG1_BASE )

WDOG1 base pointer

Definition at line 486 of file efr32bg12p433f1024gl125.h .

#define WTIMER0   (( TIMER_TypeDef *) WTIMER0_BASE )

WTIMER0 base pointer

Definition at line 463 of file efr32bg12p433f1024gl125.h .

Referenced by TIMER_MaxCount() , and TIMER_Valid() .

#define WTIMER1   (( TIMER_TypeDef *) WTIMER1_BASE )

WTIMER1 base pointer

Definition at line 464 of file efr32bg12p433f1024gl125.h .

Referenced by TIMER_MaxCount() , and TIMER_Valid() .