Packet Trace Interface (PTI) Utility
RAIL PTI Utility
This optional software component can be enabled to configure the PTI interface. The PTI interface allows the user to collect receive and transmit packet data in real time over a dedicated serial interface for debugging network activity.
When using a Silicon Labs radio board, the configuration options for this software component are set up automatically to match the pin mapping on that board. When using a custom board these options can be set any way that makes sense to the user. Keep in mind that the Silicon Labs WSTK is able to capture and parse this data but currently requires UART mode and defaults to a 1.6Mbps data rate.
Configuration Options
The following configuration options can be changed:
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PTI mode
- RAIL_PTI_MODE_UART : In this mode two pins will be used. One for normal 8 bit UART data (no parity, one stop bit, LSB first) and one for a framing signal to indicate when a packet begins and ends.
- RAIL_PTI_MODE_SPI : In SPI mode three pins will be used. One for data, one for the clock, and one for the framing signal.
- RAIL_PTI_MODE_UART_ONEWIRE : In this mode one pin will be used for 9 bit UART data (no parity, one stop bit, LSB first) where the 9th bit is 1 for control bytes and 0 for normal data. This along with knowledge of the control bytes can be used to parse the data stream.
- RAIL_PTI_MODE_DISABLED : Turn off the peripheral.
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PTI baudrate
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The PTI buadrate is created using an 8 bit integer divisor on the radio clock (HFXO) frequency. This limits the selectable range of baud rate values but also means that as the frequency increases the achievable baud rates will be spaced further apart. For this reason SPI mode is preferred at high data rates. Valid ranges for different crystal frequencies are shown below:
- 38.4 MHz HFXO: Baud rates in the range [149.4kbps, 19.2Mbps]
- 39.0 MHz HFXO: Baud rates in the range [151.8kbps, 19.5Mbps]
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The PTI buadrate is created using an 8 bit integer divisor on the radio clock (HFXO) frequency. This limits the selectable range of baud rate values but also means that as the frequency increases the achievable baud rates will be spaced further apart. For this reason SPI mode is preferred at high data rates. Valid ranges for different crystal frequencies are shown below:
The following hardware options can be changed:
- Configure the DOUT GPIO pin. DOUT is needed for all PTI modes (UART, UART Onewire, SPI) and contains the actual serial data.
- Configure the DFRAME GPIO pin. DFRAME is needed for UART and SPI modes only and is used to frame the start and end of packets. This is not used for UART Onewire mode.
- Configure the DCLK GPIO pin. DCLK is needed for SPI mode only.