Peripheral Memory MapDevices > EFM32JG12B500F1024GL125
Macros |
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#define | ACMP0_BASE (0x40000000UL) |
#define | ACMP1_BASE (0x40000400UL) |
#define | ADC0_BASE (0x40002000UL) |
#define | CMU_BASE (0x400E4000UL) |
#define | CRYOTIMER_BASE (0x4001E000UL) |
#define | CRYPTO0_BASE (0x400F0000UL) |
#define | CRYPTO1_BASE (0x400F0400UL) |
#define | CRYPTO_BASE CRYPTO0_BASE |
#define | CSEN_BASE (0x4001F000UL) |
#define | DEVINFO_BASE (0x0FE081B0UL) |
#define | EMU_BASE (0x400E3000UL) |
#define | ETM_BASE (0xE0041000UL) |
#define | GPCRC_BASE (0x4001C000UL) |
#define | GPIO_BASE (0x4000A000UL) |
#define | I2C0_BASE (0x4000C000UL) |
#define | I2C1_BASE (0x4000C400UL) |
#define | IDAC0_BASE (0x40006000UL) |
#define | LDMA_BASE (0x400E2000UL) |
#define | LESENSE_BASE (0x40055000UL) |
#define | LETIMER0_BASE (0x40046000UL) |
#define | LEUART0_BASE (0x4004A000UL) |
#define | LOCKBITS_BASE (0x0FE04000UL) |
#define | MSC_BASE (0x400E0000UL) |
#define | PCNT0_BASE (0x4004E000UL) |
#define | PCNT1_BASE (0x4004E400UL) |
#define | PCNT2_BASE (0x4004E800UL) |
#define | PRS_BASE (0x400E6000UL) |
#define | RMU_BASE (0x400E5000UL) |
#define | ROMTABLE_BASE (0xE00FFFD0UL) |
#define | RTCC_BASE (0x40042000UL) |
#define | SMU_BASE (0x40022000UL) |
#define | TIMER0_BASE (0x40018000UL) |
#define | TIMER1_BASE (0x40018400UL) |
#define | TRNG0_BASE (0x4001D000UL) |
#define | USART0_BASE (0x40010000UL) |
#define | USART1_BASE (0x40010400UL) |
#define | USART2_BASE (0x40010800UL) |
#define | USART3_BASE (0x40010C00UL) |
#define | USERDATA_BASE (0x0FE00000UL) |
#define | VDAC0_BASE (0x40008000UL) |
#define | WDOG0_BASE (0x40052000UL) |
#define | WDOG1_BASE (0x40052400UL) |
#define | WTIMER0_BASE (0x4001A000UL) |
#define | WTIMER1_BASE (0x4001A400UL) |
Macro Definition Documentation
#define ACMP0_BASE (0x40000000UL) |
ACMP0 base address
Definition at line
405
of file
efm32jg12b500f1024gl125.h
.
#define ACMP1_BASE (0x40000400UL) |
ACMP1 base address
Definition at line
406
of file
efm32jg12b500f1024gl125.h
.
#define ADC0_BASE (0x40002000UL) |
ADC0 base address
Definition at line
404
of file
efm32jg12b500f1024gl125.h
.
#define CMU_BASE (0x400E4000UL) |
CMU base address
Definition at line
380
of file
efm32jg12b500f1024gl125.h
.
Referenced by CHIP_Init() .
#define CRYOTIMER_BASE (0x4001E000UL) |
CRYOTIMER base address
Definition at line
398
of file
efm32jg12b500f1024gl125.h
.
#define CRYPTO0_BASE (0x400F0000UL) |
CRYPTO0 base address
Definition at line
381
of file
efm32jg12b500f1024gl125.h
.
#define CRYPTO1_BASE (0x400F0400UL) |
CRYPTO1 base address
Definition at line
383
of file
efm32jg12b500f1024gl125.h
.
#define CRYPTO_BASE CRYPTO0_BASE |
Alias for CRYPTO0 base address
Definition at line
382
of file
efm32jg12b500f1024gl125.h
.
#define CSEN_BASE (0x4001F000UL) |
CSEN base address
Definition at line
409
of file
efm32jg12b500f1024gl125.h
.
#define DEVINFO_BASE (0x0FE081B0UL) |
DEVINFO base address
Definition at line
417
of file
efm32jg12b500f1024gl125.h
.
Referenced by SYSTEM_GetCalibrationValue() .
#define EMU_BASE (0x400E3000UL) |
EMU base address
Definition at line
378
of file
efm32jg12b500f1024gl125.h
.
Referenced by CHIP_Init() , EMU_EnterEM4() , and RMU_ResetCauseGet() .
#define ETM_BASE (0xE0041000UL) |
ETM base address
Definition at line
414
of file
efm32jg12b500f1024gl125.h
.
#define GPCRC_BASE (0x4001C000UL) |
GPCRC base address
Definition at line
387
of file
efm32jg12b500f1024gl125.h
.
#define GPIO_BASE (0x4000A000UL) |
GPIO base address
Definition at line
384
of file
efm32jg12b500f1024gl125.h
.
#define I2C0_BASE (0x4000C000UL) |
I2C0 base address
Definition at line
402
of file
efm32jg12b500f1024gl125.h
.
#define I2C1_BASE (0x4000C400UL) |
I2C1 base address
Definition at line
403
of file
efm32jg12b500f1024gl125.h
.
#define IDAC0_BASE (0x40006000UL) |
IDAC0 base address
Definition at line
407
of file
efm32jg12b500f1024gl125.h
.
#define LDMA_BASE (0x400E2000UL) |
LDMA base address
Definition at line
386
of file
efm32jg12b500f1024gl125.h
.
#define LESENSE_BASE (0x40055000UL) |
LESENSE base address
Definition at line
410
of file
efm32jg12b500f1024gl125.h
.
#define LETIMER0_BASE (0x40046000UL) |
LETIMER0 base address
Definition at line
397
of file
efm32jg12b500f1024gl125.h
.
#define LEUART0_BASE (0x4004A000UL) |
LEUART0 base address
Definition at line
396
of file
efm32jg12b500f1024gl125.h
.
#define LOCKBITS_BASE (0x0FE04000UL) |
Lock-bits page base address
Definition at line
419
of file
efm32jg12b500f1024gl125.h
.
#define MSC_BASE (0x400E0000UL) |
MSC base address
Definition at line
377
of file
efm32jg12b500f1024gl125.h
.
#define PCNT0_BASE (0x4004E000UL) |
PCNT0 base address
Definition at line
399
of file
efm32jg12b500f1024gl125.h
.
#define PCNT1_BASE (0x4004E400UL) |
PCNT1 base address
Definition at line
400
of file
efm32jg12b500f1024gl125.h
.
#define PCNT2_BASE (0x4004E800UL) |
PCNT2 base address
Definition at line
401
of file
efm32jg12b500f1024gl125.h
.
#define PRS_BASE (0x400E6000UL) |
PRS base address
Definition at line
385
of file
efm32jg12b500f1024gl125.h
.
#define RMU_BASE (0x400E5000UL) |
RMU base address
Definition at line
379
of file
efm32jg12b500f1024gl125.h
.
#define ROMTABLE_BASE (0xE00FFFD0UL) |
ROMTABLE base address
Definition at line
418
of file
efm32jg12b500f1024gl125.h
.
#define RTCC_BASE (0x40042000UL) |
RTCC base address
Definition at line
411
of file
efm32jg12b500f1024gl125.h
.
#define SMU_BASE (0x40022000UL) |
SMU base address
Definition at line
415
of file
efm32jg12b500f1024gl125.h
.
#define TIMER0_BASE (0x40018000UL) |
TIMER0 base address
Definition at line
388
of file
efm32jg12b500f1024gl125.h
.
#define TIMER1_BASE (0x40018400UL) |
TIMER1 base address
Definition at line
389
of file
efm32jg12b500f1024gl125.h
.
#define TRNG0_BASE (0x4001D000UL) |
TRNG0 base address
Definition at line
416
of file
efm32jg12b500f1024gl125.h
.
#define USART0_BASE (0x40010000UL) |
USART0 base address
Definition at line
392
of file
efm32jg12b500f1024gl125.h
.
#define USART1_BASE (0x40010400UL) |
USART1 base address
Definition at line
393
of file
efm32jg12b500f1024gl125.h
.
#define USART2_BASE (0x40010800UL) |
USART2 base address
Definition at line
394
of file
efm32jg12b500f1024gl125.h
.
#define USART3_BASE (0x40010C00UL) |
USART3 base address
Definition at line
395
of file
efm32jg12b500f1024gl125.h
.
#define USERDATA_BASE (0x0FE00000UL) |
User data page base address
Definition at line
420
of file
efm32jg12b500f1024gl125.h
.
#define VDAC0_BASE (0x40008000UL) |
VDAC0 base address
Definition at line
408
of file
efm32jg12b500f1024gl125.h
.
#define WDOG0_BASE (0x40052000UL) |
WDOG0 base address
Definition at line
412
of file
efm32jg12b500f1024gl125.h
.
#define WDOG1_BASE (0x40052400UL) |
WDOG1 base address
Definition at line
413
of file
efm32jg12b500f1024gl125.h
.
#define WTIMER0_BASE (0x4001A000UL) |
WTIMER0 base address
Definition at line
390
of file
efm32jg12b500f1024gl125.h
.
#define WTIMER1_BASE (0x4001A400UL) |
WTIMER1 base address
Definition at line
391
of file
efm32jg12b500f1024gl125.h
.