LCD_TypeDef Struct ReferenceDevices > EFM32G_LCD

Definition at line 48 of file efm32g_lcd.h .

Data Fields

__IOM uint32_t AREGA
__IOM uint32_t AREGB
__IOM uint32_t BACTRL
__IOM uint32_t CTRL
__IOM uint32_t DISPCTRL
__IOM uint32_t FREEZE
__IOM uint32_t IEN
__IM uint32_t IF
__IOM uint32_t IFC
__IOM uint32_t IFS
uint32_t RESERVED0 [5]
__IOM uint32_t SEGD0H
__IOM uint32_t SEGD0L
__IOM uint32_t SEGD1H
__IOM uint32_t SEGD1L
__IOM uint32_t SEGD2H
__IOM uint32_t SEGD2L
__IOM uint32_t SEGD3H
__IOM uint32_t SEGD3L
__IOM uint32_t SEGEN
__IM uint32_t STATUS
__IM uint32_t SYNCBUSY

Field Documentation

__IOM uint32_t LCD_TypeDef::AREGA

Animation Register A

Definition at line 54 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::AREGB

Animation Register B

Definition at line 55 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::BACTRL

Blink and Animation Control Register

Definition at line 52 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::CTRL

Control Register

Definition at line 49 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::DISPCTRL

Display Control Register

Definition at line 50 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::FREEZE

Freeze Register

Definition at line 70 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::IEN

Interrupt Enable Register

Definition at line 59 of file efm32g_lcd.h .

__IM uint32_t LCD_TypeDef::IF

Interrupt Flag Register

Definition at line 56 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 58 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 57 of file efm32g_lcd.h .

uint32_t LCD_TypeDef::RESERVED0[5]

Reserved for future use

Definition at line 60 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD0H

Segment Data High Register 0

Definition at line 65 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD0L

Segment Data Low Register 0

Definition at line 61 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD1H

Segment Data High Register 1

Definition at line 66 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD1L

Segment Data Low Register 1

Definition at line 62 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD2H

Segment Data High Register 2

Definition at line 67 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD2L

Segment Data Low Register 2

Definition at line 63 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD3H

Segment Data High Register 3

Definition at line 68 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGD3L

Segment Data Low Register 3

Definition at line 64 of file efm32g_lcd.h .

__IOM uint32_t LCD_TypeDef::SEGEN

Segment Enable Register

Definition at line 51 of file efm32g_lcd.h .

__IM uint32_t LCD_TypeDef::STATUS

Status Register

Definition at line 53 of file efm32g_lcd.h .

__IM uint32_t LCD_TypeDef::SYNCBUSY

Synchronization Busy Register

Definition at line 71 of file efm32g_lcd.h .

The documentation for this struct was generated from the following file:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFM32G/Include/ efm32g_lcd.h