EFM32LG_PRS_BitFieldsDevices

Macros

#define _PRS_CH_CTRL_ASYNC_DEFAULT   0x00000000UL
 
#define _PRS_CH_CTRL_ASYNC_MASK   0x10000000UL
 
#define _PRS_CH_CTRL_ASYNC_SHIFT   28
 
#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL
 
#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL
 
#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL
 
#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL
 
#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL
 
#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL
 
#define _PRS_CH_CTRL_EDSEL_SHIFT   24
 
#define _PRS_CH_CTRL_MASK   0x133F0007UL
 
#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_BURTCCOMP0   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_BURTCOF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_DAC0CH0   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_DAC0CH1   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC0   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC1   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC2   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   0x00000005UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   0x00000006UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   0x00000007UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   0x00000005UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   0x00000006UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   0x00000007UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH0   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH1   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL
 
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_SHIFT   0
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER2OF   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER2UF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC0   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC1   0x00000003UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER3CC2   0x00000004UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER3OF   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_TIMER3UF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_UART0TXC   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_UART1RXDATAV   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_UART1TXC   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_USART0IRTX   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_USART0TXC   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV   0x00000002UL
 
#define _PRS_CH_CTRL_SIGSEL_USART2TXC   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_USBSOF   0x00000000UL
 
#define _PRS_CH_CTRL_SIGSEL_USBSOFSR   0x00000001UL
 
#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL
 
#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL
 
#define _PRS_CH_CTRL_SOURCESEL_ACMP1   0x00000003UL
 
#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL
 
#define _PRS_CH_CTRL_SOURCESEL_BURTC   0x00000037UL
 
#define _PRS_CH_CTRL_SOURCESEL_DAC0   0x00000006UL
 
#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL
 
#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL
 
#define _PRS_CH_CTRL_SOURCESEL_LESENSED   0x0000003BUL
 
#define _PRS_CH_CTRL_SOURCESEL_LESENSEH   0x0000003AUL
 
#define _PRS_CH_CTRL_SOURCESEL_LESENSEL   0x00000039UL
 
#define _PRS_CH_CTRL_SOURCESEL_LETIMER0   0x00000034UL
 
#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL
 
#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL
 
#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL
 
#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16
 
#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL
 
#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL
 
#define _PRS_CH_CTRL_SOURCESEL_TIMER2   0x0000001EUL
 
#define _PRS_CH_CTRL_SOURCESEL_TIMER3   0x0000001FUL
 
#define _PRS_CH_CTRL_SOURCESEL_UART0   0x00000029UL
 
#define _PRS_CH_CTRL_SOURCESEL_UART1   0x0000002AUL
 
#define _PRS_CH_CTRL_SOURCESEL_USART0   0x00000010UL
 
#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL
 
#define _PRS_CH_CTRL_SOURCESEL_USART2   0x00000012UL
 
#define _PRS_CH_CTRL_SOURCESEL_USB   0x00000024UL
 
#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL
 
#define _PRS_ROUTE_CH0PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH0PEN_MASK   0x1UL
 
#define _PRS_ROUTE_CH0PEN_SHIFT   0
 
#define _PRS_ROUTE_CH1PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH1PEN_MASK   0x2UL
 
#define _PRS_ROUTE_CH1PEN_SHIFT   1
 
#define _PRS_ROUTE_CH2PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH2PEN_MASK   0x4UL
 
#define _PRS_ROUTE_CH2PEN_SHIFT   2
 
#define _PRS_ROUTE_CH3PEN_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_CH3PEN_MASK   0x8UL
 
#define _PRS_ROUTE_CH3PEN_SHIFT   3
 
#define _PRS_ROUTE_LOCATION_DEFAULT   0x00000000UL
 
#define _PRS_ROUTE_LOCATION_LOC0   0x00000000UL
 
#define _PRS_ROUTE_LOCATION_LOC1   0x00000001UL
 
#define _PRS_ROUTE_LOCATION_MASK   0x700UL
 
#define _PRS_ROUTE_LOCATION_SHIFT   8
 
#define _PRS_ROUTE_MASK   0x0000070FUL
 
#define _PRS_ROUTE_RESETVALUE   0x00000000UL
 
#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL
 
#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0
 
#define _PRS_SWLEVEL_CH10LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH10LEVEL_MASK   0x400UL
 
#define _PRS_SWLEVEL_CH10LEVEL_SHIFT   10
 
#define _PRS_SWLEVEL_CH11LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH11LEVEL_MASK   0x800UL
 
#define _PRS_SWLEVEL_CH11LEVEL_SHIFT   11
 
#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL
 
#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1
 
#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL
 
#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2
 
#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL
 
#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3
 
#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH4LEVEL_MASK   0x10UL
 
#define _PRS_SWLEVEL_CH4LEVEL_SHIFT   4
 
#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH5LEVEL_MASK   0x20UL
 
#define _PRS_SWLEVEL_CH5LEVEL_SHIFT   5
 
#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH6LEVEL_MASK   0x40UL
 
#define _PRS_SWLEVEL_CH6LEVEL_SHIFT   6
 
#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH7LEVEL_MASK   0x80UL
 
#define _PRS_SWLEVEL_CH7LEVEL_SHIFT   7
 
#define _PRS_SWLEVEL_CH8LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH8LEVEL_MASK   0x100UL
 
#define _PRS_SWLEVEL_CH8LEVEL_SHIFT   8
 
#define _PRS_SWLEVEL_CH9LEVEL_DEFAULT   0x00000000UL
 
#define _PRS_SWLEVEL_CH9LEVEL_MASK   0x200UL
 
#define _PRS_SWLEVEL_CH9LEVEL_SHIFT   9
 
#define _PRS_SWLEVEL_MASK   0x00000FFFUL
 
#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL
 
#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL
 
#define _PRS_SWPULSE_CH0PULSE_SHIFT   0
 
#define _PRS_SWPULSE_CH10PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH10PULSE_MASK   0x400UL
 
#define _PRS_SWPULSE_CH10PULSE_SHIFT   10
 
#define _PRS_SWPULSE_CH11PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH11PULSE_MASK   0x800UL
 
#define _PRS_SWPULSE_CH11PULSE_SHIFT   11
 
#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL
 
#define _PRS_SWPULSE_CH1PULSE_SHIFT   1
 
#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL
 
#define _PRS_SWPULSE_CH2PULSE_SHIFT   2
 
#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL
 
#define _PRS_SWPULSE_CH3PULSE_SHIFT   3
 
#define _PRS_SWPULSE_CH4PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH4PULSE_MASK   0x10UL
 
#define _PRS_SWPULSE_CH4PULSE_SHIFT   4
 
#define _PRS_SWPULSE_CH5PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH5PULSE_MASK   0x20UL
 
#define _PRS_SWPULSE_CH5PULSE_SHIFT   5
 
#define _PRS_SWPULSE_CH6PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH6PULSE_MASK   0x40UL
 
#define _PRS_SWPULSE_CH6PULSE_SHIFT   6
 
#define _PRS_SWPULSE_CH7PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH7PULSE_MASK   0x80UL
 
#define _PRS_SWPULSE_CH7PULSE_SHIFT   7
 
#define _PRS_SWPULSE_CH8PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH8PULSE_MASK   0x100UL
 
#define _PRS_SWPULSE_CH8PULSE_SHIFT   8
 
#define _PRS_SWPULSE_CH9PULSE_DEFAULT   0x00000000UL
 
#define _PRS_SWPULSE_CH9PULSE_MASK   0x200UL
 
#define _PRS_SWPULSE_CH9PULSE_SHIFT   9
 
#define _PRS_SWPULSE_MASK   0x00000FFFUL
 
#define _PRS_SWPULSE_RESETVALUE   0x00000000UL
 
#define PRS_CH_CTRL_ASYNC   (0x1UL << 28)
 
#define PRS_CH_CTRL_ASYNC_DEFAULT   (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)
 
#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)
 
#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)
 
#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)
 
#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)
 
#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)
 
#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)
 
#define PRS_CH_CTRL_SIGSEL_ACMP1OUT   (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)
 
#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)
 
#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)
 
#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0   (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_BURTCOF   (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0)
 
#define PRS_CH_CTRL_SIGSEL_DAC0CH0   (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_DAC0CH1   (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)
 
#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER2CC0   (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER2CC1   (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER2CC2   (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER2OF   (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER2UF   (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER3CC0   (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER3CC1   (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER3CC2   (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER3OF   (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0)
 
#define PRS_CH_CTRL_SIGSEL_TIMER3UF   (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0)
 
#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0)
 
#define PRS_CH_CTRL_SIGSEL_UART0TXC   (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0)
 
#define PRS_CH_CTRL_SIGSEL_UART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART1RXDATAV << 0)
 
#define PRS_CH_CTRL_SIGSEL_UART1TXC   (_PRS_CH_CTRL_SIGSEL_UART1TXC << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART0IRTX   (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART0TXC   (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0)
 
#define PRS_CH_CTRL_SIGSEL_USART2TXC   (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0)
 
#define PRS_CH_CTRL_SIGSEL_USBSOF   (_PRS_CH_CTRL_SIGSEL_USBSOF << 0)
 
#define PRS_CH_CTRL_SIGSEL_USBSOFSR   (_PRS_CH_CTRL_SIGSEL_USBSOFSR << 0)
 
#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)
 
#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_ACMP1   (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_BURTC   (_PRS_CH_CTRL_SOURCESEL_BURTC << 16)
 
#define PRS_CH_CTRL_SOURCESEL_DAC0   (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)
 
#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)
 
#define PRS_CH_CTRL_SOURCESEL_LESENSED   (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16)
 
#define PRS_CH_CTRL_SOURCESEL_LESENSEH   (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16)
 
#define PRS_CH_CTRL_SOURCESEL_LESENSEL   (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16)
 
#define PRS_CH_CTRL_SOURCESEL_LETIMER0   (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)
 
#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)
 
#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_TIMER2   (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_TIMER3   (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_UART0   (_PRS_CH_CTRL_SOURCESEL_UART0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_UART1   (_PRS_CH_CTRL_SOURCESEL_UART1 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_USART0   (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_USART2   (_PRS_CH_CTRL_SOURCESEL_USART2 << 16)
 
#define PRS_CH_CTRL_SOURCESEL_USB   (_PRS_CH_CTRL_SOURCESEL_USB << 16)
 
#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)
 
#define PRS_ROUTE_CH0PEN   (0x1UL << 0)
 
#define PRS_ROUTE_CH0PEN_DEFAULT   (_PRS_ROUTE_CH0PEN_DEFAULT << 0)
 
#define PRS_ROUTE_CH1PEN   (0x1UL << 1)
 
#define PRS_ROUTE_CH1PEN_DEFAULT   (_PRS_ROUTE_CH1PEN_DEFAULT << 1)
 
#define PRS_ROUTE_CH2PEN   (0x1UL << 2)
 
#define PRS_ROUTE_CH2PEN_DEFAULT   (_PRS_ROUTE_CH2PEN_DEFAULT << 2)
 
#define PRS_ROUTE_CH3PEN   (0x1UL << 3)
 
#define PRS_ROUTE_CH3PEN_DEFAULT   (_PRS_ROUTE_CH3PEN_DEFAULT << 3)
 
#define PRS_ROUTE_LOCATION_DEFAULT   (_PRS_ROUTE_LOCATION_DEFAULT << 8)
 
#define PRS_ROUTE_LOCATION_LOC0   (_PRS_ROUTE_LOCATION_LOC0 << 8)
 
#define PRS_ROUTE_LOCATION_LOC1   (_PRS_ROUTE_LOCATION_LOC1 << 8)
 
#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)
 
#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)
 
#define PRS_SWLEVEL_CH10LEVEL   (0x1UL << 10)
 
#define PRS_SWLEVEL_CH10LEVEL_DEFAULT   (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10)
 
#define PRS_SWLEVEL_CH11LEVEL   (0x1UL << 11)
 
#define PRS_SWLEVEL_CH11LEVEL_DEFAULT   (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11)
 
#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)
 
#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)
 
#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)
 
#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)
 
#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)
 
#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)
 
#define PRS_SWLEVEL_CH4LEVEL   (0x1UL << 4)
 
#define PRS_SWLEVEL_CH4LEVEL_DEFAULT   (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)
 
#define PRS_SWLEVEL_CH5LEVEL   (0x1UL << 5)
 
#define PRS_SWLEVEL_CH5LEVEL_DEFAULT   (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)
 
#define PRS_SWLEVEL_CH6LEVEL   (0x1UL << 6)
 
#define PRS_SWLEVEL_CH6LEVEL_DEFAULT   (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)
 
#define PRS_SWLEVEL_CH7LEVEL   (0x1UL << 7)
 
#define PRS_SWLEVEL_CH7LEVEL_DEFAULT   (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)
 
#define PRS_SWLEVEL_CH8LEVEL   (0x1UL << 8)
 
#define PRS_SWLEVEL_CH8LEVEL_DEFAULT   (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8)
 
#define PRS_SWLEVEL_CH9LEVEL   (0x1UL << 9)
 
#define PRS_SWLEVEL_CH9LEVEL_DEFAULT   (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9)
 
#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)
 
#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)
 
#define PRS_SWPULSE_CH10PULSE   (0x1UL << 10)
 
#define PRS_SWPULSE_CH10PULSE_DEFAULT   (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10)
 
#define PRS_SWPULSE_CH11PULSE   (0x1UL << 11)
 
#define PRS_SWPULSE_CH11PULSE_DEFAULT   (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11)
 
#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)
 
#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)
 
#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)
 
#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)
 
#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)
 
#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)
 
#define PRS_SWPULSE_CH4PULSE   (0x1UL << 4)
 
#define PRS_SWPULSE_CH4PULSE_DEFAULT   (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)
 
#define PRS_SWPULSE_CH5PULSE   (0x1UL << 5)
 
#define PRS_SWPULSE_CH5PULSE_DEFAULT   (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)
 
#define PRS_SWPULSE_CH6PULSE   (0x1UL << 6)
 
#define PRS_SWPULSE_CH6PULSE_DEFAULT   (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)
 
#define PRS_SWPULSE_CH7PULSE   (0x1UL << 7)
 
#define PRS_SWPULSE_CH7PULSE_DEFAULT   (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)
 
#define PRS_SWPULSE_CH8PULSE   (0x1UL << 8)
 
#define PRS_SWPULSE_CH8PULSE_DEFAULT   (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8)
 
#define PRS_SWPULSE_CH9PULSE   (0x1UL << 9)
 
#define PRS_SWPULSE_CH9PULSE_DEFAULT   (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9)
 

Macro Definition Documentation

#define _PRS_CH_CTRL_ASYNC_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 455 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_ASYNC_MASK   0x10000000UL

Bit mask for PRS_ASYNC

Definition at line 454 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_ASYNC_SHIFT   28

Shift value for PRS_ASYNC

Definition at line 453 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_BOTHEDGES   0x00000003UL

Mode BOTHEDGES for PRS_CH_CTRL

Definition at line 446 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_CH_CTRL

Definition at line 442 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_MASK   0x3000000UL

Bit mask for PRS_EDSEL

Definition at line 441 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_NEGEDGE   0x00000002UL

Mode NEGEDGE for PRS_CH_CTRL

Definition at line 445 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_OFF   0x00000000UL

Mode OFF for PRS_CH_CTRL

Definition at line 443 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_POSEDGE   0x00000001UL

Mode POSEDGE for PRS_CH_CTRL

Definition at line 444 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_EDSEL_SHIFT   24

Shift value for PRS_EDSEL

Definition at line 440 of file efm32lg_prs.h.

Referenced by PRS_SourceSignalSet().

#define _PRS_CH_CTRL_MASK   0x133F0007UL

Mask for PRS_CH_CTRL

Definition at line 223 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_RESETVALUE   0x00000000UL

Default value for PRS_CH_CTRL

Definition at line 222 of file efm32lg_prs.h.

Referenced by PRS_Reset().

#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT   0x00000000UL

Mode ACMP0OUT for PRS_CH_CTRL

Definition at line 227 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT   0x00000000UL

Mode ACMP1OUT for PRS_CH_CTRL

Definition at line 228 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN   0x00000001UL

Mode ADC0SCAN for PRS_CH_CTRL

Definition at line 246 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE   0x00000000UL

Mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 230 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_BURTCCOMP0   0x00000001UL

Mode BURTCCOMP0 for PRS_CH_CTRL

Definition at line 261 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_BURTCOF   0x00000000UL

Mode BURTCOF for PRS_CH_CTRL

Definition at line 241 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_DAC0CH0   0x00000000UL

Mode DAC0CH0 for PRS_CH_CTRL

Definition at line 229 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_DAC0CH1   0x00000001UL

Mode DAC0CH1 for PRS_CH_CTRL

Definition at line 245 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0   0x00000000UL

Mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 238 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1   0x00000001UL

Mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 258 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10   0x00000002UL

Mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 276 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11   0x00000003UL

Mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 285 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12   0x00000004UL

Mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 293 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13   0x00000005UL

Mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 297 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14   0x00000006UL

Mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 301 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15   0x00000007UL

Mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 305 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2   0x00000002UL

Mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 275 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3   0x00000003UL

Mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 284 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4   0x00000004UL

Mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 292 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5   0x00000005UL

Mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 296 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6   0x00000006UL

Mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 300 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7   0x00000007UL

Mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 304 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8   0x00000000UL

Mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 239 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9   0x00000001UL

Mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 259 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC0   0x00000000UL

Mode LESENSEDEC0 for PRS_CH_CTRL

Definition at line 244 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC1   0x00000001UL

Mode LESENSEDEC1 for PRS_CH_CTRL

Definition at line 264 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSEDEC2   0x00000002UL

Mode LESENSEDEC2 for PRS_CH_CTRL

Definition at line 279 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   0x00000000UL

Mode LESENSESCANRES0 for PRS_CH_CTRL

Definition at line 242 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   0x00000001UL

Mode LESENSESCANRES1 for PRS_CH_CTRL

Definition at line 262 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   0x00000002UL

Mode LESENSESCANRES10 for PRS_CH_CTRL

Definition at line 278 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   0x00000003UL

Mode LESENSESCANRES11 for PRS_CH_CTRL

Definition at line 287 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   0x00000004UL

Mode LESENSESCANRES12 for PRS_CH_CTRL

Definition at line 295 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   0x00000005UL

Mode LESENSESCANRES13 for PRS_CH_CTRL

Definition at line 299 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   0x00000006UL

Mode LESENSESCANRES14 for PRS_CH_CTRL

Definition at line 303 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   0x00000007UL

Mode LESENSESCANRES15 for PRS_CH_CTRL

Definition at line 307 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   0x00000002UL

Mode LESENSESCANRES2 for PRS_CH_CTRL

Definition at line 277 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   0x00000003UL

Mode LESENSESCANRES3 for PRS_CH_CTRL

Definition at line 286 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   0x00000004UL

Mode LESENSESCANRES4 for PRS_CH_CTRL

Definition at line 294 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   0x00000005UL

Mode LESENSESCANRES5 for PRS_CH_CTRL

Definition at line 298 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   0x00000006UL

Mode LESENSESCANRES6 for PRS_CH_CTRL

Definition at line 302 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   0x00000007UL

Mode LESENSESCANRES7 for PRS_CH_CTRL

Definition at line 306 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   0x00000000UL

Mode LESENSESCANRES8 for PRS_CH_CTRL

Definition at line 243 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   0x00000001UL

Mode LESENSESCANRES9 for PRS_CH_CTRL

Definition at line 263 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH0   0x00000000UL

Mode LETIMER0CH0 for PRS_CH_CTRL

Definition at line 240 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_LETIMER0CH1   0x00000001UL

Mode LETIMER0CH1 for PRS_CH_CTRL

Definition at line 260 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_MASK   0x7UL

Bit mask for PRS_SIGSEL

Definition at line 225 of file efm32lg_prs.h.

Referenced by PRS_ConnectSignal(), and PRS_SourceSignalSet().

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0   0x00000001UL

Mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 255 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1   0x00000002UL

Mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 272 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_RTCOF   0x00000000UL

Mode RTCOF for PRS_CH_CTRL

Definition at line 237 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_SHIFT   0

Shift value for PRS_SIGSEL

Definition at line 224 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0   0x00000002UL

Mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 268 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1   0x00000003UL

Mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 280 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2   0x00000004UL

Mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 288 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0OF   0x00000001UL

Mode TIMER0OF for PRS_CH_CTRL

Definition at line 250 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER0UF   0x00000000UL

Mode TIMER0UF for PRS_CH_CTRL

Definition at line 232 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0   0x00000002UL

Mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 269 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1   0x00000003UL

Mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 281 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2   0x00000004UL

Mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 289 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1OF   0x00000001UL

Mode TIMER1OF for PRS_CH_CTRL

Definition at line 251 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER1UF   0x00000000UL

Mode TIMER1UF for PRS_CH_CTRL

Definition at line 233 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0   0x00000002UL

Mode TIMER2CC0 for PRS_CH_CTRL

Definition at line 270 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1   0x00000003UL

Mode TIMER2CC1 for PRS_CH_CTRL

Definition at line 282 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2   0x00000004UL

Mode TIMER2CC2 for PRS_CH_CTRL

Definition at line 290 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2OF   0x00000001UL

Mode TIMER2OF for PRS_CH_CTRL

Definition at line 252 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER2UF   0x00000000UL

Mode TIMER2UF for PRS_CH_CTRL

Definition at line 234 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3CC0   0x00000002UL

Mode TIMER3CC0 for PRS_CH_CTRL

Definition at line 271 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3CC1   0x00000003UL

Mode TIMER3CC1 for PRS_CH_CTRL

Definition at line 283 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3CC2   0x00000004UL

Mode TIMER3CC2 for PRS_CH_CTRL

Definition at line 291 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3OF   0x00000001UL

Mode TIMER3OF for PRS_CH_CTRL

Definition at line 253 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_TIMER3UF   0x00000000UL

Mode TIMER3UF for PRS_CH_CTRL

Definition at line 235 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV   0x00000002UL

Mode UART0RXDATAV for PRS_CH_CTRL

Definition at line 273 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_UART0TXC   0x00000001UL

Mode UART0TXC for PRS_CH_CTRL

Definition at line 256 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_UART1RXDATAV   0x00000002UL

Mode UART1RXDATAV for PRS_CH_CTRL

Definition at line 274 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_UART1TXC   0x00000001UL

Mode UART1TXC for PRS_CH_CTRL

Definition at line 257 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART0IRTX   0x00000000UL

Mode USART0IRTX for PRS_CH_CTRL

Definition at line 231 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV   0x00000002UL

Mode USART0RXDATAV for PRS_CH_CTRL

Definition at line 265 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART0TXC   0x00000001UL

Mode USART0TXC for PRS_CH_CTRL

Definition at line 247 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV   0x00000002UL

Mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 266 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART1TXC   0x00000001UL

Mode USART1TXC for PRS_CH_CTRL

Definition at line 248 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV   0x00000002UL

Mode USART2RXDATAV for PRS_CH_CTRL

Definition at line 267 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USART2TXC   0x00000001UL

Mode USART2TXC for PRS_CH_CTRL

Definition at line 249 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USBSOF   0x00000000UL

Mode USBSOF for PRS_CH_CTRL

Definition at line 236 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_USBSOFSR   0x00000001UL

Mode USBSOFSR for PRS_CH_CTRL

Definition at line 254 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SIGSEL_VCMPOUT   0x00000000UL

Mode VCMPOUT for PRS_CH_CTRL

Definition at line 226 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP0   0x00000002UL

Mode ACMP0 for PRS_CH_CTRL

Definition at line 394 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_ACMP1   0x00000003UL

Mode ACMP1 for PRS_CH_CTRL

Definition at line 395 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_ADC0   0x00000008UL

Mode ADC0 for PRS_CH_CTRL

Definition at line 397 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_BURTC   0x00000037UL

Mode BURTC for PRS_CH_CTRL

Definition at line 412 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_DAC0   0x00000006UL

Mode DAC0 for PRS_CH_CTRL

Definition at line 396 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOH   0x00000031UL

Mode GPIOH for PRS_CH_CTRL

Definition at line 410 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_GPIOL   0x00000030UL

Mode GPIOL for PRS_CH_CTRL

Definition at line 409 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_LESENSED   0x0000003BUL

Mode LESENSED for PRS_CH_CTRL

Definition at line 415 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_LESENSEH   0x0000003AUL

Mode LESENSEH for PRS_CH_CTRL

Definition at line 414 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_LESENSEL   0x00000039UL

Mode LESENSEL for PRS_CH_CTRL

Definition at line 413 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_LETIMER0   0x00000034UL

Mode LETIMER0 for PRS_CH_CTRL

Definition at line 411 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_MASK   0x3F0000UL

Bit mask for PRS_SOURCESEL

Definition at line 391 of file efm32lg_prs.h.

Referenced by PRS_ConnectSignal(), and PRS_SourceSignalSet().

#define _PRS_CH_CTRL_SOURCESEL_NONE   0x00000000UL

Mode NONE for PRS_CH_CTRL

Definition at line 392 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_RTC   0x00000028UL

Mode RTC for PRS_CH_CTRL

Definition at line 406 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_SHIFT   16

Shift value for PRS_SOURCESEL

Definition at line 390 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER0   0x0000001CUL

Mode TIMER0 for PRS_CH_CTRL

Definition at line 401 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER1   0x0000001DUL

Mode TIMER1 for PRS_CH_CTRL

Definition at line 402 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER2   0x0000001EUL

Mode TIMER2 for PRS_CH_CTRL

Definition at line 403 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_TIMER3   0x0000001FUL

Mode TIMER3 for PRS_CH_CTRL

Definition at line 404 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_UART0   0x00000029UL

Mode UART0 for PRS_CH_CTRL

Definition at line 407 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_UART1   0x0000002AUL

Mode UART1 for PRS_CH_CTRL

Definition at line 408 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_USART0   0x00000010UL

Mode USART0 for PRS_CH_CTRL

Definition at line 398 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_USART1   0x00000011UL

Mode USART1 for PRS_CH_CTRL

Definition at line 399 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_USART2   0x00000012UL

Mode USART2 for PRS_CH_CTRL

Definition at line 400 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_USB   0x00000024UL

Mode USB for PRS_CH_CTRL

Definition at line 405 of file efm32lg_prs.h.

#define _PRS_CH_CTRL_SOURCESEL_VCMP   0x00000001UL

Mode VCMP for PRS_CH_CTRL

Definition at line 393 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH0PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 195 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH0PEN_MASK   0x1UL

Bit mask for PRS_CH0PEN

Definition at line 194 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH0PEN_SHIFT   0

Shift value for PRS_CH0PEN

Definition at line 193 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH1PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 200 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH1PEN_MASK   0x2UL

Bit mask for PRS_CH1PEN

Definition at line 199 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH1PEN_SHIFT   1

Shift value for PRS_CH1PEN

Definition at line 198 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH2PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 205 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH2PEN_MASK   0x4UL

Bit mask for PRS_CH2PEN

Definition at line 204 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH2PEN_SHIFT   2

Shift value for PRS_CH2PEN

Definition at line 203 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH3PEN_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 210 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH3PEN_MASK   0x8UL

Bit mask for PRS_CH3PEN

Definition at line 209 of file efm32lg_prs.h.

#define _PRS_ROUTE_CH3PEN_SHIFT   3

Shift value for PRS_CH3PEN

Definition at line 208 of file efm32lg_prs.h.

#define _PRS_ROUTE_LOCATION_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_ROUTE

Definition at line 215 of file efm32lg_prs.h.

#define _PRS_ROUTE_LOCATION_LOC0   0x00000000UL

Mode LOC0 for PRS_ROUTE

Definition at line 214 of file efm32lg_prs.h.

#define _PRS_ROUTE_LOCATION_LOC1   0x00000001UL

Mode LOC1 for PRS_ROUTE

Definition at line 216 of file efm32lg_prs.h.

#define _PRS_ROUTE_LOCATION_MASK   0x700UL

Bit mask for PRS_LOCATION

Definition at line 213 of file efm32lg_prs.h.

#define _PRS_ROUTE_LOCATION_SHIFT   8

Shift value for PRS_LOCATION

Definition at line 212 of file efm32lg_prs.h.

Referenced by PRS_GpioOutputLocation().

#define _PRS_ROUTE_MASK   0x0000070FUL

Mask for PRS_ROUTE

Definition at line 191 of file efm32lg_prs.h.

#define _PRS_ROUTE_RESETVALUE   0x00000000UL

Default value for PRS_ROUTE

Definition at line 190 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH0LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 131 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH0LEVEL_MASK   0x1UL

Bit mask for PRS_CH0LEVEL

Definition at line 130 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH0LEVEL_SHIFT   0

Shift value for PRS_CH0LEVEL

Definition at line 129 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH10LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 181 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH10LEVEL_MASK   0x400UL

Bit mask for PRS_CH10LEVEL

Definition at line 180 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH10LEVEL_SHIFT   10

Shift value for PRS_CH10LEVEL

Definition at line 179 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH11LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 186 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH11LEVEL_MASK   0x800UL

Bit mask for PRS_CH11LEVEL

Definition at line 185 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH11LEVEL_SHIFT   11

Shift value for PRS_CH11LEVEL

Definition at line 184 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH1LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 136 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH1LEVEL_MASK   0x2UL

Bit mask for PRS_CH1LEVEL

Definition at line 135 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH1LEVEL_SHIFT   1

Shift value for PRS_CH1LEVEL

Definition at line 134 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH2LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 141 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH2LEVEL_MASK   0x4UL

Bit mask for PRS_CH2LEVEL

Definition at line 140 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH2LEVEL_SHIFT   2

Shift value for PRS_CH2LEVEL

Definition at line 139 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH3LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 146 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH3LEVEL_MASK   0x8UL

Bit mask for PRS_CH3LEVEL

Definition at line 145 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH3LEVEL_SHIFT   3

Shift value for PRS_CH3LEVEL

Definition at line 144 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH4LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 151 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH4LEVEL_MASK   0x10UL

Bit mask for PRS_CH4LEVEL

Definition at line 150 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH4LEVEL_SHIFT   4

Shift value for PRS_CH4LEVEL

Definition at line 149 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH5LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 156 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH5LEVEL_MASK   0x20UL

Bit mask for PRS_CH5LEVEL

Definition at line 155 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH5LEVEL_SHIFT   5

Shift value for PRS_CH5LEVEL

Definition at line 154 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH6LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 161 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH6LEVEL_MASK   0x40UL

Bit mask for PRS_CH6LEVEL

Definition at line 160 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH6LEVEL_SHIFT   6

Shift value for PRS_CH6LEVEL

Definition at line 159 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH7LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 166 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH7LEVEL_MASK   0x80UL

Bit mask for PRS_CH7LEVEL

Definition at line 165 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH7LEVEL_SHIFT   7

Shift value for PRS_CH7LEVEL

Definition at line 164 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH8LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 171 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH8LEVEL_MASK   0x100UL

Bit mask for PRS_CH8LEVEL

Definition at line 170 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH8LEVEL_SHIFT   8

Shift value for PRS_CH8LEVEL

Definition at line 169 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH9LEVEL_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWLEVEL

Definition at line 176 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH9LEVEL_MASK   0x200UL

Bit mask for PRS_CH9LEVEL

Definition at line 175 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_CH9LEVEL_SHIFT   9

Shift value for PRS_CH9LEVEL

Definition at line 174 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_MASK   0x00000FFFUL

Mask for PRS_SWLEVEL

Definition at line 127 of file efm32lg_prs.h.

#define _PRS_SWLEVEL_RESETVALUE   0x00000000UL

Default value for PRS_SWLEVEL

Definition at line 126 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH0PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 67 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH0PULSE_MASK   0x1UL

Bit mask for PRS_CH0PULSE

Definition at line 66 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH0PULSE_SHIFT   0

Shift value for PRS_CH0PULSE

Definition at line 65 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH10PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 117 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH10PULSE_MASK   0x400UL

Bit mask for PRS_CH10PULSE

Definition at line 116 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH10PULSE_SHIFT   10

Shift value for PRS_CH10PULSE

Definition at line 115 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH11PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 122 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH11PULSE_MASK   0x800UL

Bit mask for PRS_CH11PULSE

Definition at line 121 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH11PULSE_SHIFT   11

Shift value for PRS_CH11PULSE

Definition at line 120 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH1PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 72 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH1PULSE_MASK   0x2UL

Bit mask for PRS_CH1PULSE

Definition at line 71 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH1PULSE_SHIFT   1

Shift value for PRS_CH1PULSE

Definition at line 70 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH2PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 77 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH2PULSE_MASK   0x4UL

Bit mask for PRS_CH2PULSE

Definition at line 76 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH2PULSE_SHIFT   2

Shift value for PRS_CH2PULSE

Definition at line 75 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH3PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 82 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH3PULSE_MASK   0x8UL

Bit mask for PRS_CH3PULSE

Definition at line 81 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH3PULSE_SHIFT   3

Shift value for PRS_CH3PULSE

Definition at line 80 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH4PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 87 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH4PULSE_MASK   0x10UL

Bit mask for PRS_CH4PULSE

Definition at line 86 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH4PULSE_SHIFT   4

Shift value for PRS_CH4PULSE

Definition at line 85 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH5PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 92 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH5PULSE_MASK   0x20UL

Bit mask for PRS_CH5PULSE

Definition at line 91 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH5PULSE_SHIFT   5

Shift value for PRS_CH5PULSE

Definition at line 90 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH6PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 97 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH6PULSE_MASK   0x40UL

Bit mask for PRS_CH6PULSE

Definition at line 96 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH6PULSE_SHIFT   6

Shift value for PRS_CH6PULSE

Definition at line 95 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH7PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 102 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH7PULSE_MASK   0x80UL

Bit mask for PRS_CH7PULSE

Definition at line 101 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH7PULSE_SHIFT   7

Shift value for PRS_CH7PULSE

Definition at line 100 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH8PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 107 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH8PULSE_MASK   0x100UL

Bit mask for PRS_CH8PULSE

Definition at line 106 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH8PULSE_SHIFT   8

Shift value for PRS_CH8PULSE

Definition at line 105 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH9PULSE_DEFAULT   0x00000000UL

Mode DEFAULT for PRS_SWPULSE

Definition at line 112 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH9PULSE_MASK   0x200UL

Bit mask for PRS_CH9PULSE

Definition at line 111 of file efm32lg_prs.h.

#define _PRS_SWPULSE_CH9PULSE_SHIFT   9

Shift value for PRS_CH9PULSE

Definition at line 110 of file efm32lg_prs.h.

#define _PRS_SWPULSE_MASK   0x00000FFFUL

Mask for PRS_SWPULSE

Definition at line 63 of file efm32lg_prs.h.

Referenced by PRS_PulseTrigger().

#define _PRS_SWPULSE_RESETVALUE   0x00000000UL

Default value for PRS_SWPULSE

Definition at line 62 of file efm32lg_prs.h.

#define PRS_CH_CTRL_ASYNC   (0x1UL << 28)

Asynchronous reflex

Definition at line 452 of file efm32lg_prs.h.

Referenced by PRS_ConnectSignal().

#define PRS_CH_CTRL_ASYNC_DEFAULT   (_PRS_CH_CTRL_ASYNC_DEFAULT << 28)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 456 of file efm32lg_prs.h.

#define PRS_CH_CTRL_EDSEL_BOTHEDGES   (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24)

Shifted mode BOTHEDGES for PRS_CH_CTRL

Definition at line 451 of file efm32lg_prs.h.

#define PRS_CH_CTRL_EDSEL_DEFAULT   (_PRS_CH_CTRL_EDSEL_DEFAULT << 24)

Shifted mode DEFAULT for PRS_CH_CTRL

Definition at line 447 of file efm32lg_prs.h.

#define PRS_CH_CTRL_EDSEL_NEGEDGE   (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24)

Shifted mode NEGEDGE for PRS_CH_CTRL

Definition at line 450 of file efm32lg_prs.h.

#define PRS_CH_CTRL_EDSEL_OFF   (_PRS_CH_CTRL_EDSEL_OFF << 24)

Shifted mode OFF for PRS_CH_CTRL

Definition at line 448 of file efm32lg_prs.h.

Referenced by PRS_ConnectSignal().

#define PRS_CH_CTRL_EDSEL_POSEDGE   (_PRS_CH_CTRL_EDSEL_POSEDGE << 24)

Shifted mode POSEDGE for PRS_CH_CTRL

Definition at line 449 of file efm32lg_prs.h.

Referenced by CAPSENSE_Init().

#define PRS_CH_CTRL_SIGSEL_ACMP0OUT   (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0)

Shifted mode ACMP0OUT for PRS_CH_CTRL

Definition at line 309 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_ACMP1OUT   (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0)

Shifted mode ACMP1OUT for PRS_CH_CTRL

Definition at line 310 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SCAN   (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0)

Shifted mode ADC0SCAN for PRS_CH_CTRL

Definition at line 328 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE   (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0)

Shifted mode ADC0SINGLE for PRS_CH_CTRL

Definition at line 312 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_BURTCCOMP0   (_PRS_CH_CTRL_SIGSEL_BURTCCOMP0 << 0)

Shifted mode BURTCCOMP0 for PRS_CH_CTRL

Definition at line 343 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_BURTCOF   (_PRS_CH_CTRL_SIGSEL_BURTCOF << 0)

Shifted mode BURTCOF for PRS_CH_CTRL

Definition at line 323 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_DAC0CH0   (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0)

Shifted mode DAC0CH0 for PRS_CH_CTRL

Definition at line 311 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_DAC0CH1   (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0)

Shifted mode DAC0CH1 for PRS_CH_CTRL

Definition at line 327 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN0   (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0)

Shifted mode GPIOPIN0 for PRS_CH_CTRL

Definition at line 320 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN1   (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0)

Shifted mode GPIOPIN1 for PRS_CH_CTRL

Definition at line 340 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN10   (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0)

Shifted mode GPIOPIN10 for PRS_CH_CTRL

Definition at line 358 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN11   (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0)

Shifted mode GPIOPIN11 for PRS_CH_CTRL

Definition at line 367 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN12   (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0)

Shifted mode GPIOPIN12 for PRS_CH_CTRL

Definition at line 375 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN13   (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0)

Shifted mode GPIOPIN13 for PRS_CH_CTRL

Definition at line 379 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN14   (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0)

Shifted mode GPIOPIN14 for PRS_CH_CTRL

Definition at line 383 of file efm32lg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_CH_CTRL_SIGSEL_GPIOPIN15   (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0)

Shifted mode GPIOPIN15 for PRS_CH_CTRL

Definition at line 387 of file efm32lg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_CH_CTRL_SIGSEL_GPIOPIN2   (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0)

Shifted mode GPIOPIN2 for PRS_CH_CTRL

Definition at line 357 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN3   (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0)

Shifted mode GPIOPIN3 for PRS_CH_CTRL

Definition at line 366 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN4   (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0)

Shifted mode GPIOPIN4 for PRS_CH_CTRL

Definition at line 374 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN5   (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0)

Shifted mode GPIOPIN5 for PRS_CH_CTRL

Definition at line 378 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN6   (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0)

Shifted mode GPIOPIN6 for PRS_CH_CTRL

Definition at line 382 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN7   (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0)

Shifted mode GPIOPIN7 for PRS_CH_CTRL

Definition at line 386 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN8   (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0)

Shifted mode GPIOPIN8 for PRS_CH_CTRL

Definition at line 321 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_GPIOPIN9   (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0)

Shifted mode GPIOPIN9 for PRS_CH_CTRL

Definition at line 341 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSEDEC0   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC0 << 0)

Shifted mode LESENSEDEC0 for PRS_CH_CTRL

Definition at line 326 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSEDEC1   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC1 << 0)

Shifted mode LESENSEDEC1 for PRS_CH_CTRL

Definition at line 346 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSEDEC2   (_PRS_CH_CTRL_SIGSEL_LESENSEDEC2 << 0)

Shifted mode LESENSEDEC2 for PRS_CH_CTRL

Definition at line 361 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES0   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES0 << 0)

Shifted mode LESENSESCANRES0 for PRS_CH_CTRL

Definition at line 324 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES1   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES1 << 0)

Shifted mode LESENSESCANRES1 for PRS_CH_CTRL

Definition at line 344 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES10   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES10 << 0)

Shifted mode LESENSESCANRES10 for PRS_CH_CTRL

Definition at line 360 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES11   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES11 << 0)

Shifted mode LESENSESCANRES11 for PRS_CH_CTRL

Definition at line 369 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES12   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES12 << 0)

Shifted mode LESENSESCANRES12 for PRS_CH_CTRL

Definition at line 377 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES13   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES13 << 0)

Shifted mode LESENSESCANRES13 for PRS_CH_CTRL

Definition at line 381 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES14   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES14 << 0)

Shifted mode LESENSESCANRES14 for PRS_CH_CTRL

Definition at line 385 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES15   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES15 << 0)

Shifted mode LESENSESCANRES15 for PRS_CH_CTRL

Definition at line 389 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES2   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES2 << 0)

Shifted mode LESENSESCANRES2 for PRS_CH_CTRL

Definition at line 359 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES3   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES3 << 0)

Shifted mode LESENSESCANRES3 for PRS_CH_CTRL

Definition at line 368 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES4   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES4 << 0)

Shifted mode LESENSESCANRES4 for PRS_CH_CTRL

Definition at line 376 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES5   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES5 << 0)

Shifted mode LESENSESCANRES5 for PRS_CH_CTRL

Definition at line 380 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES6   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES6 << 0)

Shifted mode LESENSESCANRES6 for PRS_CH_CTRL

Definition at line 384 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES7   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES7 << 0)

Shifted mode LESENSESCANRES7 for PRS_CH_CTRL

Definition at line 388 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES8   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES8 << 0)

Shifted mode LESENSESCANRES8 for PRS_CH_CTRL

Definition at line 325 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LESENSESCANRES9   (_PRS_CH_CTRL_SIGSEL_LESENSESCANRES9 << 0)

Shifted mode LESENSESCANRES9 for PRS_CH_CTRL

Definition at line 345 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LETIMER0CH0   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH0 << 0)

Shifted mode LETIMER0CH0 for PRS_CH_CTRL

Definition at line 322 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_LETIMER0CH1   (_PRS_CH_CTRL_SIGSEL_LETIMER0CH1 << 0)

Shifted mode LETIMER0CH1 for PRS_CH_CTRL

Definition at line 342 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP0   (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0)

Shifted mode RTCCOMP0 for PRS_CH_CTRL

Definition at line 337 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_RTCCOMP1   (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0)

Shifted mode RTCCOMP1 for PRS_CH_CTRL

Definition at line 354 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_RTCOF   (_PRS_CH_CTRL_SIGSEL_RTCOF << 0)

Shifted mode RTCOF for PRS_CH_CTRL

Definition at line 319 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC0   (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0)

Shifted mode TIMER0CC0 for PRS_CH_CTRL

Definition at line 350 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC1   (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0)

Shifted mode TIMER0CC1 for PRS_CH_CTRL

Definition at line 362 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0CC2   (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0)

Shifted mode TIMER0CC2 for PRS_CH_CTRL

Definition at line 370 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0OF   (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0)

Shifted mode TIMER0OF for PRS_CH_CTRL

Definition at line 332 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER0UF   (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0)

Shifted mode TIMER0UF for PRS_CH_CTRL

Definition at line 314 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC0   (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0)

Shifted mode TIMER1CC0 for PRS_CH_CTRL

Definition at line 351 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC1   (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0)

Shifted mode TIMER1CC1 for PRS_CH_CTRL

Definition at line 363 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1CC2   (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0)

Shifted mode TIMER1CC2 for PRS_CH_CTRL

Definition at line 371 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1OF   (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0)

Shifted mode TIMER1OF for PRS_CH_CTRL

Definition at line 333 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER1UF   (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0)

Shifted mode TIMER1UF for PRS_CH_CTRL

Definition at line 315 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2CC0   (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0)

Shifted mode TIMER2CC0 for PRS_CH_CTRL

Definition at line 352 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2CC1   (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0)

Shifted mode TIMER2CC1 for PRS_CH_CTRL

Definition at line 364 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2CC2   (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0)

Shifted mode TIMER2CC2 for PRS_CH_CTRL

Definition at line 372 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2OF   (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0)

Shifted mode TIMER2OF for PRS_CH_CTRL

Definition at line 334 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER2UF   (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0)

Shifted mode TIMER2UF for PRS_CH_CTRL

Definition at line 316 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3CC0   (_PRS_CH_CTRL_SIGSEL_TIMER3CC0 << 0)

Shifted mode TIMER3CC0 for PRS_CH_CTRL

Definition at line 353 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3CC1   (_PRS_CH_CTRL_SIGSEL_TIMER3CC1 << 0)

Shifted mode TIMER3CC1 for PRS_CH_CTRL

Definition at line 365 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3CC2   (_PRS_CH_CTRL_SIGSEL_TIMER3CC2 << 0)

Shifted mode TIMER3CC2 for PRS_CH_CTRL

Definition at line 373 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3OF   (_PRS_CH_CTRL_SIGSEL_TIMER3OF << 0)

Shifted mode TIMER3OF for PRS_CH_CTRL

Definition at line 335 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_TIMER3UF   (_PRS_CH_CTRL_SIGSEL_TIMER3UF << 0)

Shifted mode TIMER3UF for PRS_CH_CTRL

Definition at line 317 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0)

Shifted mode UART0RXDATAV for PRS_CH_CTRL

Definition at line 355 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_UART0TXC   (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0)

Shifted mode UART0TXC for PRS_CH_CTRL

Definition at line 338 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_UART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_UART1RXDATAV << 0)

Shifted mode UART1RXDATAV for PRS_CH_CTRL

Definition at line 356 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_UART1TXC   (_PRS_CH_CTRL_SIGSEL_UART1TXC << 0)

Shifted mode UART1TXC for PRS_CH_CTRL

Definition at line 339 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART0IRTX   (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0)

Shifted mode USART0IRTX for PRS_CH_CTRL

Definition at line 313 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0)

Shifted mode USART0RXDATAV for PRS_CH_CTRL

Definition at line 347 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART0TXC   (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0)

Shifted mode USART0TXC for PRS_CH_CTRL

Definition at line 329 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0)

Shifted mode USART1RXDATAV for PRS_CH_CTRL

Definition at line 348 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART1TXC   (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0)

Shifted mode USART1TXC for PRS_CH_CTRL

Definition at line 330 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV   (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0)

Shifted mode USART2RXDATAV for PRS_CH_CTRL

Definition at line 349 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USART2TXC   (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0)

Shifted mode USART2TXC for PRS_CH_CTRL

Definition at line 331 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USBSOF   (_PRS_CH_CTRL_SIGSEL_USBSOF << 0)

Shifted mode USBSOF for PRS_CH_CTRL

Definition at line 318 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_USBSOFSR   (_PRS_CH_CTRL_SIGSEL_USBSOFSR << 0)

Shifted mode USBSOFSR for PRS_CH_CTRL

Definition at line 336 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SIGSEL_VCMPOUT   (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0)

Shifted mode VCMPOUT for PRS_CH_CTRL

Definition at line 308 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP0   (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16)

Shifted mode ACMP0 for PRS_CH_CTRL

Definition at line 418 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_ACMP1   (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16)

Shifted mode ACMP1 for PRS_CH_CTRL

Definition at line 419 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_ADC0   (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16)

Shifted mode ADC0 for PRS_CH_CTRL

Definition at line 421 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_BURTC   (_PRS_CH_CTRL_SOURCESEL_BURTC << 16)

Shifted mode BURTC for PRS_CH_CTRL

Definition at line 436 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_DAC0   (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16)

Shifted mode DAC0 for PRS_CH_CTRL

Definition at line 420 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_GPIOH   (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16)

Shifted mode GPIOH for PRS_CH_CTRL

Definition at line 434 of file efm32lg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_CH_CTRL_SOURCESEL_GPIOL   (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16)

Shifted mode GPIOL for PRS_CH_CTRL

Definition at line 433 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_LESENSED   (_PRS_CH_CTRL_SOURCESEL_LESENSED << 16)

Shifted mode LESENSED for PRS_CH_CTRL

Definition at line 439 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_LESENSEH   (_PRS_CH_CTRL_SOURCESEL_LESENSEH << 16)

Shifted mode LESENSEH for PRS_CH_CTRL

Definition at line 438 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_LESENSEL   (_PRS_CH_CTRL_SOURCESEL_LESENSEL << 16)

Shifted mode LESENSEL for PRS_CH_CTRL

Definition at line 437 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_LETIMER0   (_PRS_CH_CTRL_SOURCESEL_LETIMER0 << 16)

Shifted mode LETIMER0 for PRS_CH_CTRL

Definition at line 435 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_NONE   (_PRS_CH_CTRL_SOURCESEL_NONE << 16)

Shifted mode NONE for PRS_CH_CTRL

Definition at line 416 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_RTC   (_PRS_CH_CTRL_SOURCESEL_RTC << 16)

Shifted mode RTC for PRS_CH_CTRL

Definition at line 430 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER0   (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16)

Shifted mode TIMER0 for PRS_CH_CTRL

Definition at line 425 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER1   (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16)

Shifted mode TIMER1 for PRS_CH_CTRL

Definition at line 426 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER2   (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16)

Shifted mode TIMER2 for PRS_CH_CTRL

Definition at line 427 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_TIMER3   (_PRS_CH_CTRL_SOURCESEL_TIMER3 << 16)

Shifted mode TIMER3 for PRS_CH_CTRL

Definition at line 428 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_UART0   (_PRS_CH_CTRL_SOURCESEL_UART0 << 16)

Shifted mode UART0 for PRS_CH_CTRL

Definition at line 431 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_UART1   (_PRS_CH_CTRL_SOURCESEL_UART1 << 16)

Shifted mode UART1 for PRS_CH_CTRL

Definition at line 432 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_USART0   (_PRS_CH_CTRL_SOURCESEL_USART0 << 16)

Shifted mode USART0 for PRS_CH_CTRL

Definition at line 422 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_USART1   (_PRS_CH_CTRL_SOURCESEL_USART1 << 16)

Shifted mode USART1 for PRS_CH_CTRL

Definition at line 423 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_USART2   (_PRS_CH_CTRL_SOURCESEL_USART2 << 16)

Shifted mode USART2 for PRS_CH_CTRL

Definition at line 424 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_USB   (_PRS_CH_CTRL_SOURCESEL_USB << 16)

Shifted mode USB for PRS_CH_CTRL

Definition at line 429 of file efm32lg_prs.h.

#define PRS_CH_CTRL_SOURCESEL_VCMP   (_PRS_CH_CTRL_SOURCESEL_VCMP << 16)

Shifted mode VCMP for PRS_CH_CTRL

Definition at line 417 of file efm32lg_prs.h.

#define PRS_ROUTE_CH0PEN   (0x1UL << 0)

CH0 Pin Enable

Definition at line 192 of file efm32lg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_ROUTE_CH0PEN_DEFAULT   (_PRS_ROUTE_CH0PEN_DEFAULT << 0)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 196 of file efm32lg_prs.h.

#define PRS_ROUTE_CH1PEN   (0x1UL << 1)

CH1 Pin Enable

Definition at line 197 of file efm32lg_prs.h.

Referenced by ezradio_hal_GpioInit().

#define PRS_ROUTE_CH1PEN_DEFAULT   (_PRS_ROUTE_CH1PEN_DEFAULT << 1)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 201 of file efm32lg_prs.h.

#define PRS_ROUTE_CH2PEN   (0x1UL << 2)

CH2 Pin Enable

Definition at line 202 of file efm32lg_prs.h.

#define PRS_ROUTE_CH2PEN_DEFAULT   (_PRS_ROUTE_CH2PEN_DEFAULT << 2)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 206 of file efm32lg_prs.h.

#define PRS_ROUTE_CH3PEN   (0x1UL << 3)

CH3 Pin Enable

Definition at line 207 of file efm32lg_prs.h.

#define PRS_ROUTE_CH3PEN_DEFAULT   (_PRS_ROUTE_CH3PEN_DEFAULT << 3)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 211 of file efm32lg_prs.h.

#define PRS_ROUTE_LOCATION_DEFAULT   (_PRS_ROUTE_LOCATION_DEFAULT << 8)

Shifted mode DEFAULT for PRS_ROUTE

Definition at line 218 of file efm32lg_prs.h.

#define PRS_ROUTE_LOCATION_LOC0   (_PRS_ROUTE_LOCATION_LOC0 << 8)

Shifted mode LOC0 for PRS_ROUTE

Definition at line 217 of file efm32lg_prs.h.

#define PRS_ROUTE_LOCATION_LOC1   (_PRS_ROUTE_LOCATION_LOC1 << 8)

Shifted mode LOC1 for PRS_ROUTE

Definition at line 219 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH0LEVEL   (0x1UL << 0)

Channel 0 Software Level

Definition at line 128 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH0LEVEL_DEFAULT   (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 132 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH10LEVEL   (0x1UL << 10)

Channel 10 Software Level

Definition at line 178 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH10LEVEL_DEFAULT   (_PRS_SWLEVEL_CH10LEVEL_DEFAULT << 10)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 182 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH11LEVEL   (0x1UL << 11)

Channel 11 Software Level

Definition at line 183 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH11LEVEL_DEFAULT   (_PRS_SWLEVEL_CH11LEVEL_DEFAULT << 11)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 187 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH1LEVEL   (0x1UL << 1)

Channel 1 Software Level

Definition at line 133 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH1LEVEL_DEFAULT   (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 137 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH2LEVEL   (0x1UL << 2)

Channel 2 Software Level

Definition at line 138 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH2LEVEL_DEFAULT   (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 142 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH3LEVEL   (0x1UL << 3)

Channel 3 Software Level

Definition at line 143 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH3LEVEL_DEFAULT   (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 147 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH4LEVEL   (0x1UL << 4)

Channel 4 Software Level

Definition at line 148 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH4LEVEL_DEFAULT   (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 152 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH5LEVEL   (0x1UL << 5)

Channel 5 Software Level

Definition at line 153 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH5LEVEL_DEFAULT   (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 157 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH6LEVEL   (0x1UL << 6)

Channel 6 Software Level

Definition at line 158 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH6LEVEL_DEFAULT   (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 162 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH7LEVEL   (0x1UL << 7)

Channel 7 Software Level

Definition at line 163 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH7LEVEL_DEFAULT   (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 167 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH8LEVEL   (0x1UL << 8)

Channel 8 Software Level

Definition at line 168 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH8LEVEL_DEFAULT   (_PRS_SWLEVEL_CH8LEVEL_DEFAULT << 8)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 172 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH9LEVEL   (0x1UL << 9)

Channel 9 Software Level

Definition at line 173 of file efm32lg_prs.h.

#define PRS_SWLEVEL_CH9LEVEL_DEFAULT   (_PRS_SWLEVEL_CH9LEVEL_DEFAULT << 9)

Shifted mode DEFAULT for PRS_SWLEVEL

Definition at line 177 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH0PULSE   (0x1UL << 0)

Channel 0 Pulse Generation

Definition at line 64 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH0PULSE_DEFAULT   (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 68 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH10PULSE   (0x1UL << 10)

Channel 10 Pulse Generation

Definition at line 114 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH10PULSE_DEFAULT   (_PRS_SWPULSE_CH10PULSE_DEFAULT << 10)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 118 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH11PULSE   (0x1UL << 11)

Channel 11 Pulse Generation

Definition at line 119 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH11PULSE_DEFAULT   (_PRS_SWPULSE_CH11PULSE_DEFAULT << 11)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 123 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH1PULSE   (0x1UL << 1)

Channel 1 Pulse Generation

Definition at line 69 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH1PULSE_DEFAULT   (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 73 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH2PULSE   (0x1UL << 2)

Channel 2 Pulse Generation

Definition at line 74 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH2PULSE_DEFAULT   (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 78 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH3PULSE   (0x1UL << 3)

Channel 3 Pulse Generation

Definition at line 79 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH3PULSE_DEFAULT   (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 83 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH4PULSE   (0x1UL << 4)

Channel 4 Pulse Generation

Definition at line 84 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH4PULSE_DEFAULT   (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 88 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH5PULSE   (0x1UL << 5)

Channel 5 Pulse Generation

Definition at line 89 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH5PULSE_DEFAULT   (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 93 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH6PULSE   (0x1UL << 6)

Channel 6 Pulse Generation

Definition at line 94 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH6PULSE_DEFAULT   (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 98 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH7PULSE   (0x1UL << 7)

Channel 7 Pulse Generation

Definition at line 99 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH7PULSE_DEFAULT   (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 103 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH8PULSE   (0x1UL << 8)

Channel 8 Pulse Generation

Definition at line 104 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH8PULSE_DEFAULT   (_PRS_SWPULSE_CH8PULSE_DEFAULT << 8)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 108 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH9PULSE   (0x1UL << 9)

Channel 9 Pulse Generation

Definition at line 109 of file efm32lg_prs.h.

#define PRS_SWPULSE_CH9PULSE_DEFAULT   (_PRS_SWPULSE_CH9PULSE_DEFAULT << 9)

Shifted mode DEFAULT for PRS_SWPULSE

Definition at line 113 of file efm32lg_prs.h.