MSC - Memory System Controller

Clear one or more pending MSC interrupts.

Parameters

[in]

flags

Pending MSC intterupt source to clear. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).

Disable one or more MSC interrupts.

Parameters

[in]

flags

MSC interrupt sources to disable. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).

Enable one or more MSC interrupts.

Note

Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. To ignore a pending interrupt, consider using MSC_IntClear() prior to enabling the interrupt.

Parameters

[in]

flags

MSC interrupt sources to enable. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).

Get pending MSC interrupt flags.

Note

The event bits are not cleared by the use of this function.

Returns

MSC interrupt sources pending. A bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).

Get enabled and pending MSC interrupt flags.

Useful for handling more interrupt sources in the same interrupt handler.

Note

Interrupt flags are not cleared by the use of this function.

Returns

Pending and enabled MSC interrupt sources. The return value is the bitwise AND of

• the enabled interrupt sources in MSC_IEN and
• the pending interrupt flags MSC_IF

Set one or more pending MSC interrupts from SW.

Parameters

[in]

flags

MSC interrupt sources to set to pending. Use a bitwise logic OR combination of valid interrupt flags for the MSC module (MSC_IF_nnn).

Starts measuring cache hit ratio.

Starts performance counters. It is defined inline to minimize the impact of this code on the measurement itself.

Stops measuring hit rate.

Note

Defined inline to minimize the impact of this code on the measurement itself. Only works for relatively short sections of code. To measure longer sections of code, implement an IRQ Handler for the CHOF and CMOF overflow interrupts. These overflows need to be counted and included in the total. Functions can then be implemented as follows:

* volatile uint32_t hitOverflows
* volatile uint32_t missOverflows
*
* void MSC_IRQHandler(void)
* {
*   uint32_t flags;
*   flags = MSC->IF;
*   if (flags & MSC_IF_CHOF) {
*      MSC->IFC = MSC_IF_CHOF;
*      hitOverflows++;
*   }
*   if (flags & MSC_IF_CMOF) {
*     MSC->IFC = MSC_IF_CMOF;
*     missOverflows++;
*   }
* }
*
* void startPerformanceCounters(void)
* {
*   hitOverflows = 0;
*   missOverflows = 0;
*
*   MSC_IntEnable(MSC_IF_CHOF | MSC_IF_CMOF);
*   NVIC_EnableIRQ(MSC_IRQn);
*
*   MSC_StartCacheMeasurement();
* }
* 

Returns

Returns -1 if there has been no cache accesses. Returns -2 if there has been an overflow in the performance counters. If not, it will return the percentage of hits versus misses.

Flush contents of instruction cache.

Enable or disable instruction cache functionality.

Parameters

[in]

enable

Enable instruction cache. Default is on.

Enable or disable instruction cache functionality in IRQs.

Parameters

[in]

enable

Enable instruction cache. Default is on.

Enable or disable instruction cache flushing when writing to flash.

Parameters

[in]

enable

Enable automatic cache flushing. Default is on.

Enables the flash controller for writing.

Note

This function must be called before flash operations when AUXHFRCO clock has been changed from a default band.

Disables the flash controller for writing.

Set the MSC code execution configuration.

Parameters

[in]

execConfig

The code execution configuration.

Configure Error Correcting Code (ECC).

This function configures ECC support according to the configuration input parameter. If the user requests enabling ECC for a given RAM bank this function will initialize ECC memory (syndromes) for the bank by reading and writing the existing values in memory. I.e. all data is preserved. The initialization process runs in a critical section disallowing interrupts and thread scheduling, and will consume a considerable amount of clock cycles. Therefore the user should carefully assess where to call this function. The user can consider to increase the clock frequency in order to reduce the execution time. This function makes use of 2 DMA channels to move data to/from RAM in an efficient way. The user can select which 2 DMA channels to use in order to avoid conflicts with the application. However the user must make sure that no other DMA operations takes place while this function is executing. If the application has been using the DMA controller prior to calling this function, the application will need to reinitialize DMA registers after this function has completed.

Note

This function protects the ECC initialization procedure from interrupts and other threads by using a critical section (defined by em_core.h) When running on RTOS the user may need to override CORE_EnterCritical CORE_ExitCritical which are declared as 'SL_WEAK' in em_core.c.

Parameters

[in]

eccConfig

ECC configuration

Writes data to flash memory.

This function is interrupt-safe, but slower than MSC_WriteWordFast() , which writes to flash with interrupts disabled. Write data must be aligned to words and contain a number of bytes that is divisible by four.

Note

It is recommended to erase the flash page before performing a write.

For the Gecko family, it is required to run this function from RAM.

For IAR Embedded Workbench, Simplicity Studio and GCC, this is done automatically by using attributes in the function proctype. For Keil uVision IDE, define a section called "ram_code" and place it manually in the project's scatter file.

This function requires a system core clock at 1 MHz or higher.

Parameters

[in]	address	A pointer to the flash word to write to. Must be aligned to words.
[in]	data	Data to write to flash.
[in]	numBytes	A number of bytes to write from flash. NB: Must be divisible by four.

Returns

Returns the status of the write operation.

*   flashReturnOk - The operation completed successfully.
*   flashReturnInvalidAddr - The operation tried to erase a non-flash area.
*   flashReturnLocked - The operation tried to erase a locked area of the Flash.
*   flashReturnTimeOut - The operation timed out waiting for the flash operation
*       to complete, or the MSC module timed out waiting for the software to write
*       the next word into the DWORD register.
* 

Writes data to flash memory.

This function is faster than MSC_WriteWord() , but it disables interrupts. Write data must be aligned to words and contain a number of bytes that is divisible by four.

Warning

This function is only available for certain devices.

Note

It is recommended to erase the flash page before performing a write. It is required to run this function from RAM on parts that include a flash write buffer.

For IAR Embedded Workbench, Simplicity Studio and GCC, this is done automatically by using attributes in the function proctype. For Keil uVision IDE, define a section called "ram_code" and place this manually in the project's scatter file.

Parameters

[in]	address	A pointer to the flash word to write to. Must be aligned to words.
[in]	data	Data to write to flash.
[in]	numBytes	A number of bytes to write from the Flash. NB: Must be divisible by four.

Returns

Returns the status of the write operation.

*   flashReturnOk - The operation completed successfully.
*   flashReturnInvalidAddr - The operation tried to erase a non-flash area.
*   flashReturnLocked - The operation tried to erase a locked area of the flash.
*   flashReturnTimeOut - The operation timed out waiting for flash operation
*       to complete. Or the MSC timed out waiting for the software to write
*       the next word into the DWORD register.
* 

Erases a page in flash memory.

Note

For the Gecko family, it is required to run this function from RAM.

For IAR Embedded Workbench, Simplicity Studio and GCC, this is achieved automatically by using attributes in the function proctype. For Keil uVision IDE, define a section called "ram_code" and place this manually in the project's scatter file.

Parameters

[in]

startAddress

A pointer to the flash page to erase. Must be aligned to the beginning of the page boundary.

Returns

Returns the status of erase operation, MSC_Status_TypeDef

*   mscReturnOk - The operation completed successfully.
*   mscReturnInvalidAddr - The operation tried to erase a non-flash area.
*   mscReturnLocked - The operation tried to erase a locked area of the flash.
*   mscReturnTimeOut - The operation timed out waiting for the flash operation
*       to complete.
* 

Erase the entire Flash in one operation.

Note

This command will erase the entire contents of the device. Use with care, both a debug session and all contents of the flash will be lost. The lock bit, MLW will prevent this operation from executing and might prevent a successful mass erase.

Returns

Returns the status of the operation.

Writes data from RAM to flash memory using the DMA.

This function uses the LDMA to write data to the internal flash memory. This is the fastest way to write data to the flash and should be used when the application wants to achieve write speeds like they are reported in the datasheet. Note that this function only supports writing data from RAM to flash, it does not support writing data from flash to flash.

Note

This function requires that the LDMA clock is enabled.

Parameters

[in]	ch	DMA channel to use
[in]	address	A pointer to the flash word to write to. Must be aligned to words.
[in]	data	Data to write to flash. Note that this argument must be an address in RAM. This function does not support copying data from flash to flash on series-1 devices.
[in]	numBytes	A number of bytes to write from flash. NB: Must be divisible by four.

Returns

Returns the status of the write operation.

*   flashReturnOk - The operation completed successfully.
*   flashReturnInvalidAddr - The operation tried to erase a non-flash area.
* 

Timeout used while waiting for Flash to become ready after a write.

This number indicates the number of iterations to perform before issuing a timeout.

Note

Timeout is set very large (in the order of 100x longer than necessary). This is to avoid any corner case.

Default MSC ExecConfig initialization.

EFM32GG11B incorporates 2 memory banks including ECC support.

Default MSC EccConfig initialization.

Return codes for writing/erasing Flash.