EFR32MG14P733F256GM48Devices
| Modules | |
| Bit Fields | |
| Core | |
| Processor and Core Peripheral Section. | |
| Part | |
| Peripheral Declarations | |
| Peripheral Memory Map | |
| Peripheral Offsets | |
| Peripheral TypeDefs | |
| Device Specific Peripheral Register Structures. | |
| Macros | |
| #define | CRYPTO_IRQn CRYPTO0_IRQn | 
| Typedefs | |
| typedef enum IRQn | IRQn_Type | 
| Enumerations | |
| enum | IRQn
         
         { NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, EMU_IRQn = 0, FRC_PRI_IRQn = 1, WDOG0_IRQn = 2, WDOG1_IRQn = 3, FRC_IRQn = 4, MODEM_IRQn = 5, RAC_SEQ_IRQn = 6, RAC_RSM_IRQn = 7, BUFC_IRQn = 8, LDMA_IRQn = 9, GPIO_EVEN_IRQn = 10, TIMER0_IRQn = 11, USART0_RX_IRQn = 12, USART0_TX_IRQn = 13, ACMP0_IRQn = 14, ADC0_IRQn = 15, IDAC0_IRQn = 16, I2C0_IRQn = 17, GPIO_ODD_IRQn = 18, TIMER1_IRQn = 19, USART1_RX_IRQn = 20, USART1_TX_IRQn = 21, LEUART0_IRQn = 22, PCNT0_IRQn = 23, CMU_IRQn = 24, MSC_IRQn = 25, CRYPTO0_IRQn = 26, LETIMER0_IRQn = 27, AGC_IRQn = 28, PROTIMER_IRQn = 29, PRORTC_IRQn = 30, RTCC_IRQn = 31, SYNTH_IRQn = 32, CRYOTIMER_IRQn = 33, RFSENSE_IRQn = 34, FPUEH_IRQn = 35, SMU_IRQn = 36, WTIMER0_IRQn = 37, VDAC0_IRQn = 38, LESENSE_IRQn = 39, TRNG0_IRQn = 40 } | 
Macro Definition Documentation
| #define CRYPTO_IRQn CRYPTO0_IRQn | 
Alias for CRYPTO0_IRQn
        Definition at line
        
         115
        
        of file
        
         efr32mg14p733f256gm48.h
        
        .
       
Typedef Documentation
Enumeration Type Documentation
| enum IRQn | 
Interrupt Number Definition
        Definition at line
        
         58
        
        of file
        
         efr32mg14p733f256gm48.h
        
        .